2024-01-10 17:30:14

by Rob Herring (Arm)

Subject: [PATCH 1/2] arm64: Rename ARM64_WORKAROUND_2966298

In preparation to apply ARM64_WORKAROUND_2966298 for multiple errata,
rename the kconfig and capability. No functional change.

Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
arch/arm64/Kconfig | 4 ++++
arch/arm64/kernel/cpu_errata.c | 4 ++--
arch/arm64/kernel/entry.S | 2 +-
arch/arm64/tools/cpucaps | 2 +-
4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7b071a00425d..ba9f6ceddbbe 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1037,8 +1037,12 @@ config ARM64_ERRATUM_2645198

If unsure, say Y.

+config ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
+ bool
+
config ARM64_ERRATUM_2966298
bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load"
+ select ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
default y
help
This option adds the workaround for ARM Cortex-A520 erratum 2966298.
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index e29e0fea63fb..cb5e0622168d 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -713,10 +713,10 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),
},
#endif
-#ifdef CONFIG_ARM64_ERRATUM_2966298
+#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
{
.desc = "ARM erratum 2966298",
- .capability = ARM64_WORKAROUND_2966298,
+ .capability = ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD,
/* Cortex-A520 r0p0 - r0p1 */
ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A520, 0, 0, 1),
},
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index a6030913cd58..544ab46649f3 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -428,7 +428,7 @@ alternative_else_nop_endif
ldp x28, x29, [sp, #16 * 14]

.if \el == 0
-alternative_if ARM64_WORKAROUND_2966298
+alternative_if ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
tlbi vale1, xzr
dsb nsh
alternative_else_nop_endif
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index b98c38288a9d..3781ad1d0b26 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -84,7 +84,6 @@ WORKAROUND_2077057
WORKAROUND_2457168
WORKAROUND_2645198
WORKAROUND_2658417
-WORKAROUND_2966298
WORKAROUND_AMPERE_AC03_CPU_38
WORKAROUND_TRBE_OVERWRITE_FILL_MODE
WORKAROUND_TSB_FLUSH_FAILURE
@@ -100,3 +99,4 @@ WORKAROUND_NVIDIA_CARMEL_CNP
WORKAROUND_QCOM_FALKOR_E1003
WORKAROUND_REPEAT_TLBI
WORKAROUND_SPECULATIVE_AT
+WORKAROUND_SPECULATIVE_UNPRIV_LOAD

--
2.43.0

2024-01-11 13:46:23

by Mark Rutland

Subject: Re: [PATCH 1/2] arm64: Rename ARM64_WORKAROUND_2966298

On Wed, Jan 10, 2024 at 11:29:20AM -0600, Rob Herring wrote:
> In preparation to apply ARM64_WORKAROUND_2966298 for multiple errata,
> rename the kconfig and capability. No functional change.
>
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>

This looks good to me.

I applied this atop v6.7 and checked that with and without
CONFIG_ARM64_ERRATUM_2966298 selected the Kconfig bits looked right and the
kernel built cleanly and booted. I don't have a Cortex-A520 to test on, but I
cannot see any reason this would have a functional change.

Reviewed-by: Mark Rutland <[email protected]>

Mark.

> ---
> arch/arm64/Kconfig | 4 ++++
> arch/arm64/kernel/cpu_errata.c | 4 ++--
> arch/arm64/kernel/entry.S | 2 +-
> arch/arm64/tools/cpucaps | 2 +-
> 4 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 7b071a00425d..ba9f6ceddbbe 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -1037,8 +1037,12 @@ config ARM64_ERRATUM_2645198
>
> If unsure, say Y.
>
> +config ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
> + bool
> +
> config ARM64_ERRATUM_2966298
> bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load"
> + select ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
> default y
> help
> This option adds the workaround for ARM Cortex-A520 erratum 2966298.
> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
> index e29e0fea63fb..cb5e0622168d 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -713,10 +713,10 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
> MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),
> },
> #endif
> -#ifdef CONFIG_ARM64_ERRATUM_2966298
> +#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
> {
> .desc = "ARM erratum 2966298",
> - .capability = ARM64_WORKAROUND_2966298,
> + .capability = ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD,
> /* Cortex-A520 r0p0 - r0p1 */
> ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A520, 0, 0, 1),
> },
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index a6030913cd58..544ab46649f3 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -428,7 +428,7 @@ alternative_else_nop_endif
> ldp x28, x29, [sp, #16 * 14]
>
> .if \el == 0
> -alternative_if ARM64_WORKAROUND_2966298
> +alternative_if ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
> tlbi vale1, xzr
> dsb nsh
> alternative_else_nop_endif
> diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
> index b98c38288a9d..3781ad1d0b26 100644
> --- a/arch/arm64/tools/cpucaps
> +++ b/arch/arm64/tools/cpucaps
> @@ -84,7 +84,6 @@ WORKAROUND_2077057
> WORKAROUND_2457168
> WORKAROUND_2645198
> WORKAROUND_2658417
> -WORKAROUND_2966298
> WORKAROUND_AMPERE_AC03_CPU_38
> WORKAROUND_TRBE_OVERWRITE_FILL_MODE
> WORKAROUND_TSB_FLUSH_FAILURE
> @@ -100,3 +99,4 @@ WORKAROUND_NVIDIA_CARMEL_CNP
> WORKAROUND_QCOM_FALKOR_E1003
> WORKAROUND_REPEAT_TLBI
> WORKAROUND_SPECULATIVE_AT
> +WORKAROUND_SPECULATIVE_UNPRIV_LOAD
>
> --
> 2.43.0
>
>