In the RISC-V specification, the stimecmp register doesn't have a default
value. To prevent the timer interrupt from being triggered during timer
initialization, clear the timer interrupt by writing stimecmp with a
maximum value.
Signed-off-by: Ley Foon Tan <[email protected]>
---
drivers/clocksource/timer-riscv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index e66dcbd66566..a75a74647344 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void)
sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
+ /* Clear timer interrupt */
+ riscv_clock_event_stop();
+
error = request_percpu_irq(riscv_clock_event_irq,
riscv_timer_interrupt,
"riscv-timer", &riscv_clock_event);
--
2.43.0
On Thu, Jan 25, 2024 at 10:25 PM Ley Foon Tan
<[email protected]> wrote:
>
> In the RISC-V specification, the stimecmp register doesn't have a default
> value. To prevent the timer interrupt from being triggered during timer
> initialization, clear the timer interrupt by writing stimecmp with a
> maximum value.
>
> Signed-off-by: Ley Foon Tan <[email protected]>
> ---
> drivers/clocksource/timer-riscv.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index e66dcbd66566..a75a74647344 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void)
>
> sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
>
> + /* Clear timer interrupt */
> + riscv_clock_event_stop();
> +
The riscv_timer_init_common() is called only on boot HART.
I suggest doing riscv_clock_event_stop() in riscv_timer_starting_cpu()
just before enable_percpu_irq().
I also suggest adding an appropriate Fixes tag in the commit description.
Regards,
Anup
> error = request_percpu_irq(riscv_clock_event_irq,
> riscv_timer_interrupt,
> "riscv-timer", &riscv_clock_event);
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-riscv
> -----Original Message-----
> From: Anup Patel <[email protected]>
> Sent: Friday, January 26, 2024 1:00 AM
> To: Leyfoon Tan <[email protected]>
> Cc: Daniel Lezcano <[email protected]>; Thomas Gleixner
> <[email protected]>; Palmer Dabbelt <[email protected]>; Paul Walmsley
> <[email protected]>; Albert Ou <[email protected]>;
> [email protected]; [email protected]; linux-
> [email protected]; Ley Foon Tan <[email protected]>
> Subject: Re: [PATCH] clocksource: timer-riscv: Clear timer interrupt on timer
> initialization
>
> On Thu, Jan 25, 2024 at 10:25 PM Ley Foon Tan
> <[email protected]> wrote:
> >
> > In the RISC-V specification, the stimecmp register doesn't have a
> > default value. To prevent the timer interrupt from being triggered
> > during timer initialization, clear the timer interrupt by writing
> > stimecmp with a maximum value.
> >
> > Signed-off-by: Ley Foon Tan <[email protected]>
> > ---
> > drivers/clocksource/timer-riscv.c | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/clocksource/timer-riscv.c
> > b/drivers/clocksource/timer-riscv.c
> > index e66dcbd66566..a75a74647344 100644
> > --- a/drivers/clocksource/timer-riscv.c
> > +++ b/drivers/clocksource/timer-riscv.c
> > @@ -172,6 +172,9 @@ static int __init riscv_timer_init_common(void)
> >
> > sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
> >
> > + /* Clear timer interrupt */
> > + riscv_clock_event_stop();
> > +
>
> The riscv_timer_init_common() is called only on boot HART.
>
> I suggest doing riscv_clock_event_stop() in riscv_timer_starting_cpu() just
> before enable_percpu_irq().
>
> I also suggest adding an appropriate Fixes tag in the commit description.
>
> Regards,
> Anup
>
Okay, will change it.
Thanks.
Regards
Ley Foon