Add TI SERDES control registers compatible. This is a region found in the
TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
SERDES clock and lane select mux.
[0] https://www.ti.com/lit/pdf/spruid7
Signed-off-by: Andrew Davis <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
---
Changes for v2:
- Add Acked-by
- Split out this patch as standalone for MFD tree
- CC right maintainer for this
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 084b5c2a2a3c2..d8679a2ad4b10 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -73,6 +73,7 @@ properties:
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
- ti,am654-dss-oldi-io-ctrl
+ - ti,am654-serdes-ctrl
- const: syscon
--
2.39.2
On Mon, 05 Feb 2024 11:47:36 -0600, Andrew Davis wrote:
> Add TI SERDES control registers compatible. This is a region found in the
> TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
> SERDES clock and lane select mux.
>
> [0] https://www.ti.com/lit/pdf/spruid7
>
>
> [...]
Applied, thanks!
[1/1] dt-bindings: mfd: syscon: Add ti,am654-serdes-ctrl compatible
commit: 95e11742e8e46b049b574f99d919dd118362c49f
--
Lee Jones [李琼斯]