From: Jan Kiszka <[email protected]>
Calibrate the TSC and, where necessary, the APIC timer against the
TMTIMER. We need our own implementation as neither the PIC nor the HPET
are available, and the standard calibration routines try to make use of
them.
Signed-off-by: Jan Kiszka <[email protected]>
---
arch/x86/include/asm/tsc.h | 3 ++
arch/x86/kernel/jailhouse.c | 82 +++++++++++++++++++++++++++++++++++++++++++++
arch/x86/kernel/tsc.c | 14 ++++----
3 files changed, 92 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index cf5d53c3f9ea..be92e0c8ac17 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -71,4 +71,7 @@ extern void tsc_restore_sched_clock_state(void);
unsigned long cpu_khz_from_msr(void);
+u64 tsc_read_refs(u64 *ref, int hpet);
+unsigned long tsc_calc_pmtimer_ref(u64 deltatsc, u64 pm1, u64 pm2);
+
#endif /* _ASM_X86_TSC_H */
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
index f7e99f7a8873..8e5b2f0c8a34 100644
--- a/arch/x86/kernel/jailhouse.c
+++ b/arch/x86/kernel/jailhouse.c
@@ -50,6 +50,83 @@ static uint32_t __init jailhouse_detect(void)
return jailhouse_cpuid_base();
}
+#define MAX_RETRIES 5
+#define SMI_TRESHOLD 50000
+
+static unsigned long apic_timer_access(u64 *pmt, bool setup)
+{
+ unsigned long ret = 0;
+ unsigned int n;
+ u64 t1, t2;
+
+ for (n = 0; n < MAX_RETRIES; n++) {
+ t1 = get_cycles();
+ *pmt = acpi_pm_read_early();
+ if (setup)
+ apic_write(APIC_TMICT, 0xffffffff);
+ else
+ ret = apic_read(APIC_TMCCT);
+ t2 = get_cycles();
+
+ if ((t2 - t1) < SMI_TRESHOLD * 2)
+ return ret;
+ }
+
+ panic("Jailhouse: SMI disturbed APIC timer calibration");
+}
+
+static void jailhouse_timer_init(void)
+{
+ u64 divided_apic_freq;
+ unsigned long tmr;
+ u64 start, end;
+
+ if (boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
+ return;
+
+ apic_write(APIC_LVTT, APIC_LVT_MASKED);
+ apic_write(APIC_TDCR, APIC_TDR_DIV_16);
+
+ apic_timer_access(&start, true);
+ while ((acpi_pm_read_early() - start) < 100000)
+ cpu_relax();
+ tmr = apic_timer_access(&end, false);
+
+ divided_apic_freq =
+ tsc_calc_pmtimer_ref((0xffffffffU - tmr) * 1000000, start, end);
+
+ lapic_timer_frequency = divided_apic_freq * 16;
+ apic_write(APIC_TMICT, 0);
+}
+
+static unsigned long jailhouse_calibrate_cpu(void)
+{
+ u64 tsc1, tsc2, pm1, pm2;
+ unsigned long flags;
+
+ local_irq_save(flags);
+
+ tsc1 = tsc_read_refs(&pm1, 0);
+ while ((get_cycles() - tsc1) < 50000000)
+ cpu_relax();
+ tsc2 = tsc_read_refs(&pm2, 0);
+
+ local_irq_restore(flags);
+
+ /* Check, whether the sampling succeeded (SMI?) */
+ if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX) {
+ pr_err("Jailhouse: TSC calibration against PMTIMER failed\n");
+ return 0;
+ }
+
+ return tsc_calc_pmtimer_ref((tsc2 - tsc1) * 1000000, pm1, pm2);
+}
+
+static unsigned long jailhouse_calibrate_tsc(void)
+{
+ return 0;
+}
+
static unsigned int x2apic_get_apic_id(unsigned long id)
{
return id;
@@ -61,6 +138,11 @@ static void __init jailhouse_init_platform(void)
struct jailhouse_setup_data *data;
unsigned int cpu;
+ x86_init.timers.timer_init = jailhouse_timer_init;
+
+ x86_platform.calibrate_cpu = jailhouse_calibrate_cpu;
+ x86_platform.calibrate_tsc = jailhouse_calibrate_tsc;
+
data = early_memremap(pa_data, sizeof(*data));
if (data->header.type != SETUP_JAILHOUSE ||
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 8ea117f8142e..a61000cc4f21 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -286,7 +286,7 @@ __setup("tsc=", tsc_setup);
/*
* Read TSC and the reference counters. Take care of SMI disturbance
*/
-static u64 tsc_read_refs(u64 *p, int hpet)
+u64 tsc_read_refs(u64 *p, int hpet)
{
u64 t1, t2;
int i;
@@ -307,7 +307,7 @@ static u64 tsc_read_refs(u64 *p, int hpet)
/*
* Calculate the TSC frequency from HPET reference
*/
-static unsigned long calc_hpet_ref(u64 deltatsc, u64 hpet1, u64 hpet2)
+static unsigned long tsc_calc_hpet_ref(u64 deltatsc, u64 hpet1, u64 hpet2)
{
u64 tmp;
@@ -324,7 +324,7 @@ static unsigned long calc_hpet_ref(u64 deltatsc, u64 hpet1, u64 hpet2)
/*
* Calculate the TSC frequency from PMTimer reference
*/
-static unsigned long calc_pmtimer_ref(u64 deltatsc, u64 pm1, u64 pm2)
+unsigned long tsc_calc_pmtimer_ref(u64 deltatsc, u64 pm1, u64 pm2)
{
u64 tmp;
@@ -728,9 +728,9 @@ unsigned long native_calibrate_cpu(void)
tsc2 = (tsc2 - tsc1) * 1000000LL;
if (hpet)
- tsc2 = calc_hpet_ref(tsc2, ref1, ref2);
+ tsc2 = tsc_calc_hpet_ref(tsc2, ref1, ref2);
else
- tsc2 = calc_pmtimer_ref(tsc2, ref1, ref2);
+ tsc2 = tsc_calc_pmtimer_ref(tsc2, ref1, ref2);
tsc_ref_min = min(tsc_ref_min, (unsigned long) tsc2);
@@ -1200,9 +1200,9 @@ static void tsc_refine_calibration_work(struct work_struct *work)
delta = tsc_stop - tsc_start;
delta *= 1000000LL;
if (hpet)
- freq = calc_hpet_ref(delta, ref_start, ref_stop);
+ freq = tsc_calc_hpet_ref(delta, ref_start, ref_stop);
else
- freq = calc_pmtimer_ref(delta, ref_start, ref_stop);
+ freq = tsc_calc_pmtimer_ref(delta, ref_start, ref_stop);
/* Make sure we're within 1% */
if (abs(tsc_khz - freq) > tsc_khz/100)
--
2.12.3
From 1584897069097293453@xxx Thu Nov 23 22:20:28 +0000 2017
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