2024-04-24 07:54:52

by Kumar, Udit

[permalink] [raw]
Subject: [PATCH 0/2] Adding main esm Address range

This series adds address range for main domain esm
for J721S2 and J784S4 SOC.

Udit Kumar (2):
arm64: dts: ti: k3-j721s2: Add main esm address range
arm64: dts: ti: k3-j784s4: Add main esm address range

arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 1 +
2 files changed, 2 insertions(+)

--
2.34.1



2024-04-24 07:55:03

by Kumar, Udit

[permalink] [raw]
Subject: [PATCH 1/2] arm64: dts: ti: k3-j721s2: Add main esm address range

Main ESM address change was missing for J721S2 SOC,
So adding main ESM address mapping.

Signed-off-by: Udit Kumar <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
index be4502fe1c9d..568e6a04619d 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
@@ -117,6 +117,7 @@ cbass_main: bus@100000 {
#size-cells = <2>;
ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
+ <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */
<0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000>, /* PCIe Core*/
<0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */
--
2.34.1


2024-04-24 08:11:41

by Kumar, Udit

[permalink] [raw]
Subject: [PATCH 2/2] arm64: dts: ti: k3-j784s4: Add main esm address range

Main ESM address change was missing for J784S4 SOC,
So adding main ESM address mapping.

Signed-off-by: Udit Kumar <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
index 6e2e92ffe745..da7368ed6b52 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
@@ -234,6 +234,7 @@ cbass_main: bus@100000 {
#size-cells = <2>;
ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
+ <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */
<0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */
<0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */
--
2.34.1


2024-04-26 22:42:58

by Nishanth Menon

[permalink] [raw]
Subject: Re: [PATCH 0/2] Adding main esm Address range

Hi Udit Kumar,

On Wed, 24 Apr 2024 13:24:21 +0530, Udit Kumar wrote:
> This series adds address range for main domain esm
> for J721S2 and J784S4 SOC.
>
> Udit Kumar (2):
> arm64: dts: ti: k3-j721s2: Add main esm address range
> arm64: dts: ti: k3-j784s4: Add main esm address range
>
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/2] arm64: dts: ti: k3-j721s2: Add main esm address range
commit: db4d62037d90c6c8f70884651acb3b532c688e54
[2/2] arm64: dts: ti: k3-j784s4: Add main esm address range
commit: cc58233a29809aa841a29c2729a2786bc57abd9f

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D