The piix4 I2C bus can carry SPDs, register them if present.
Signed-off-by: Thomas Weißschuh <[email protected]>
---
For my test setup see [0].
While the spd5118 driver in that form shouldn't be probed this way, the
general principle holds true for the other SPD drivers.
Guenter offered to test it, too.
[0] https://lore.kernel.org/lkml/[email protected]/
---
drivers/i2c/busses/Kconfig | 1 +
drivers/i2c/busses/i2c-piix4.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index fe6e8a1bb607..ff66e883b348 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -195,6 +195,7 @@ config I2C_ISMT
config I2C_PIIX4
tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
depends on PCI && HAS_IOPORT
+ select I2C_SMBUS
help
If you say yes to this option, support will be included for the Intel
PIIX4 family of mainboard I2C interfaces. Specifically, the following
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 6a0392172b2f..f8d81f8c0cb3 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -29,6 +29,7 @@
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
#include <linux/slab.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
@@ -982,6 +983,8 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
return retval;
}
+ i2c_register_spd(adap);
+
*padap = adap;
return 0;
}
---
base-commit: 4a4be1ad3a6efea16c56615f31117590fd881358
change-id: 20240530-piix4-spd-39c156b22959
Best regards,
--
Thomas Weißschuh <[email protected]>
On 5/30/24 14:49, Thomas Weißschuh wrote:
> The piix4 I2C bus can carry SPDs, register them if present.
>
> Signed-off-by: Thomas Weißschuh <[email protected]>
> ---
> For my test setup see [0].
> While the spd5118 driver in that form shouldn't be probed this way, the
> general principle holds true for the other SPD drivers.
>
> Guenter offered to test it, too.
>
Perfect. With this patch in place, I see:
[ 6.679772] i2c i2c-0: Successfully instantiated SPD at 0x50
[ 6.680341] i2c i2c-0: Successfully instantiated SPD at 0x51
[ 6.680905] i2c i2c-0: Successfully instantiated SPD at 0x52
[ 6.681466] i2c i2c-0: Successfully instantiated SPD at 0x53
on multiple AMD based systems with DDR4.
Tested-by: Guenter Roeck <[email protected]>
Thanks!
Guenter
> Perfect. With this patch in place, I see:
>
> [ 6.679772] i2c i2c-0: Successfully instantiated SPD at 0x50
> [ 6.680341] i2c i2c-0: Successfully instantiated SPD at 0x51
> [ 6.680905] i2c i2c-0: Successfully instantiated SPD at 0x52
> [ 6.681466] i2c i2c-0: Successfully instantiated SPD at 0x53
>
> on multiple AMD based systems with DDR4.
>
> Tested-by: Guenter Roeck <[email protected]>
Yes, for DDR4 this should work out of the box.