Allow the user selection and building of this interrupt controller
driver as a module, for example, in some synaptics arm64 SoCs it is
used as a second level interrupt controller hanging off the ARM GIC
and is therefore loadable during boot.
However, this interrupt controller can also be used as the main
interrupt controller by other platforms, so we must keep this kind
of support by checking whether DW_APB_ICTL is builtin or not.
Signed-off-by: Jisheng Zhang <[email protected]>
---
drivers/irqchip/Kconfig | 2 +-
drivers/irqchip/irq-dw-apb-ictl.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 14464716bacb..cfd1102eb273 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -145,7 +145,7 @@ config DAVINCI_CP_INTC
select IRQ_DOMAIN
config DW_APB_ICTL
- bool
+ tristate "DesignWare APB Interrupt Controller"
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN_HIERARCHY
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c
index d5c1c750c8d2..5eda6c4689cf 100644
--- a/drivers/irqchip/irq-dw-apb-ictl.c
+++ b/drivers/irqchip/irq-dw-apb-ictl.c
@@ -122,7 +122,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
int ret, nrirqs, parent_irq, i;
u32 reg;
- if (!parent) {
+ if (!parent && IS_BUILTIN(CONFIG_DW_APB_ICTL)) {
/* Used as the primary interrupt controller */
parent_irq = 0;
domain_ops = &dw_apb_ictl_irq_domain_ops;
@@ -214,5 +214,12 @@ static int __init dw_apb_ictl_init(struct device_node *np,
release_mem_region(r.start, resource_size(&r));
return ret;
}
-IRQCHIP_DECLARE(dw_apb_ictl,
- "snps,dw-apb-ictl", dw_apb_ictl_init);
+#if IS_BUILTIN(CONFIG_DW_APB_ICTL)
+IRQCHIP_DECLARE(dw_apb_ictl, "snps,dw-apb-ictl", dw_apb_ictl_init);
+#else
+IRQCHIP_PLATFORM_DRIVER_BEGIN(dw_apb_ictl)
+IRQCHIP_MATCH("snps,dw-apb-ictl", dw_apb_ictl_init)
+IRQCHIP_PLATFORM_DRIVER_END(dw_apb_ictl)
+MODULE_DESCRIPTION("DesignWare APB Interrupt Controller");
+MODULE_LICENSE("GPL v2");
+#endif
--
2.43.0