Hi,
the objection of this patch series is to clean the output device
handling up. The end result should be saner code (not setting devices
that do not exist) as well as more powerfull control over existing
devices and easier addition of new devices.
This is the first part doing some structural changes and using those to
switch which of the 2 display data sources (IGA1 or IGA2) is used.
Things that are still missing and (hopefully) will come in follow up
series are device enable/disable following the same design and exporting
this flexability in an easy to use way to userspace.
These patches can also be found at
git://github.com/schandinat/linux-2.6.git viafb-s2v1
Some tests were performed on CLE266, VX800 and VX855.
Any opinions/suggestions?
Regards,
Florian Tobias Schandinat
Florian Tobias Schandinat (11):
viafb: reset correct PLL
viafb: remove lcdtbl.h
viafb: remove stub
viafb: unify output path configuration
viafb: enable second display channel at central place
viafb: rework output device routing
viafb: propagate __init and __devinit
viafb: reduce viafb_set_iga_path usage
viafb: add new output device management
viafb: use new device routing
viafb: merge the remaining output path with enable functions
viafb: reset correct PLL
Looks like we did reset the PLL of the (whatever) engine instead of
the PLL of the secondary display (IGA2, LCDCK). This patch fixes it.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 7dcb4d5..53b0651 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -1688,8 +1688,8 @@ void viafb_set_vclock(u32 clk, int set_iga)
}
if (set_iga == IGA2) {
- viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0);
- viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0);
+ viafb_write_reg_mask(SR40, VIASR, 0x04, BIT2);
+ viafb_write_reg_mask(SR40, VIASR, 0x00, BIT2);
}
/* Fire! */
--
1.6.3.2
viafb: remove lcdtbl.h
This patch moves the power on/off sequences to lcd.c as they are only
used there. This allows removing lcdtbl.h as the other stuff is not
used.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/lcd.c | 8 +-
drivers/video/via/lcdtbl.h | 591 --------------------------------------------
2 files changed, 7 insertions(+), 592 deletions(-)
delete mode 100644 drivers/video/via/lcdtbl.h
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index fc25ae3..bda1246 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -21,10 +21,16 @@
#include <linux/via-core.h>
#include <linux/via_i2c.h>
#include "global.h"
-#include "lcdtbl.h"
#define viafb_compact_res(x, y) (((x)<<16)|(y))
+/* CLE266 Software Power Sequence */
+/* {Mask}, {Data}, {Delay} */
+int PowerSequenceOn[3][3] = { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06},
+ {0x19, 0x1FE, 0x01} };
+int PowerSequenceOff[3][3] = { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00},
+ {0xD2, 0x19, 0x01} };
+
static struct _lcd_scaling_factor lcd_scaling_factor = {
/* LCD Horizontal Scaling Factor Register */
{LCD_HOR_SCALING_FACTOR_REG_NUM,
diff --git a/drivers/video/via/lcdtbl.h b/drivers/video/via/lcdtbl.h
deleted file mode 100644
index 6f3dd80..0000000
--- a/drivers/video/via/lcdtbl.h
+++ /dev/null
@@ -1,591 +0,0 @@
-/*
- * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
- * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
-
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public
- * License as published by the Free Software Foundation;
- * either version 2, or (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
- * the implied warranty of MERCHANTABILITY or FITNESS FOR
- * A PARTICULAR PURPOSE.See the GNU General Public License
- * for more details.
-
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-#ifndef __LCDTBL_H__
-#define __LCDTBL_H__
-
-#include "share.h"
-
-/* CLE266 Software Power Sequence */
-/* {Mask}, {Data}, {Delay} */
-int PowerSequenceOn[3][3] =
- { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} };
-int PowerSequenceOff[3][3] =
- { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} };
-
-/* ++++++ P880 ++++++ */
-/* Panel 1600x1200 */
-struct io_reg P880_LCD_RES_6X4_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x5E},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR44, 0xFF, 0x7D}, {VIASR, SR45, 0xFF, 0x8C},
- {VIASR, SR46, 0xFF, 0x02}
-
-};
-
-#define NUM_TOTAL_P880_LCD_RES_6X4_16X12 ARRAY_SIZE(P880_LCD_RES_6X4_16X12)
-
-struct io_reg P880_LCD_RES_7X4_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x78},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR44, 0xFF, 0x78}, {VIASR, SR45, 0xFF, 0x8C},
- {VIASR, SR46, 0xFF, 0x01}
-
-};
-
-#define NUM_TOTAL_P880_LCD_RES_7X4_16X12 ARRAY_SIZE(P880_LCD_RES_7X4_16X12)
-
-struct io_reg P880_LCD_RES_8X6_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x83},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR44, 0xFF, 0x6D}, {VIASR, SR45, 0xFF, 0x88},
- {VIASR, SR46, 0xFF, 0x03}
-
-};
-
-#define NUM_TOTAL_P880_LCD_RES_8X6_16X12 ARRAY_SIZE(P880_LCD_RES_8X6_16X12)
-
-struct io_reg P880_LCD_RES_10X7_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xAF},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR44, 0xFF, 0x92}, {VIASR, SR45, 0xFF, 0x88},
- {VIASR, SR46, 0xFF, 0x03}
-
-};
-
-#define NUM_TOTAL_P880_LCD_RES_10X7_16X12 ARRAY_SIZE(P880_LCD_RES_10X7_16X12)
-
-struct io_reg P880_LCD_RES_12X10_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xD4},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR44, 0xFF, 0xF6}, {VIASR, SR45, 0xFF, 0x88},
- {VIASR, SR46, 0xFF, 0x05}
-
-};
-
-#define NUM_TOTAL_P880_LCD_RES_12X10_16X12 ARRAY_SIZE(P880_LCD_RES_12X10_16X12)
-
-/* Panel 1400x1050 */
-struct io_reg P880_LCD_RES_6X4_14X10[] = {
- /* 640x480 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x63},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR44, 0xFF, 0xC6}, {VIASR, SR45, 0xFF, 0x8C},
- {VIASR, SR46, 0xFF, 0x05}
-};
-
-#define NUM_TOTAL_P880_LCD_RES_6X4_14X10 ARRAY_SIZE(P880_LCD_RES_6X4_14X10)
-
-struct io_reg P880_LCD_RES_8X6_14X10[] = {
- /* 800x600 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x83},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR44, 0xFF, 0x06}, {VIASR, SR45, 0xFF, 0x8D},
- {VIASR, SR46, 0xFF, 0x05}
-};
-
-#define NUM_TOTAL_P880_LCD_RES_8X6_14X10 ARRAY_SIZE(P880_LCD_RES_8X6_14X10)
-
-/* ++++++ K400 ++++++ */
-/* Panel 1600x1200 */
-struct io_reg K400_LCD_RES_6X4_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x5E},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x7F}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_6X4_16X12 ARRAY_SIZE(K400_LCD_RES_6X4_16X12)
-
-struct io_reg K400_LCD_RES_7X4_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x78},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x46}, {VIASR, SR47, 0xFF, 0x3D}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_7X4_16X12 ARRAY_SIZE(K400_LCD_RES_7X4_16X12)
-
-struct io_reg K400_LCD_RES_8X6_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x83},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x85}, {VIASR, SR47, 0xFF, 0x6F}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_8X6_16X12 ARRAY_SIZE(K400_LCD_RES_8X6_16X12)
-
-struct io_reg K400_LCD_RES_10X7_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xAF},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x45}, {VIASR, SR47, 0xFF, 0x4A}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_10X7_16X12 ARRAY_SIZE(K400_LCD_RES_10X7_16X12)
-
-struct io_reg K400_LCD_RES_12X10_16X12[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00},
- {VIACR, CR5D, 0x40, 0x40},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xD4},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x47}, {VIASR, SR47, 0xFF, 0x7C}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_12X10_16X12 ARRAY_SIZE(K400_LCD_RES_12X10_16X12)
-
-/* Panel 1400x1050 */
-struct io_reg K400_LCD_RES_6X4_14X10[] = {
- /* 640x400 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x63},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_6X4_14X10 ARRAY_SIZE(K400_LCD_RES_6X4_14X10)
-
-struct io_reg K400_LCD_RES_8X6_14X10[] = {
- /* 800x600 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x83},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_8X6_14X10 ARRAY_SIZE(K400_LCD_RES_8X6_14X10)
-
-struct io_reg K400_LCD_RES_10X7_14X10[] = {
- /* 1024x768 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xA7},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_10X7_14X10 ARRAY_SIZE(K400_LCD_RES_10X7_14X10)
-
-struct io_reg K400_LCD_RES_12X10_14X10[] = {
- /* 1280x768, 1280x960, 1280x1024 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xD2},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_12X10_14X10 ARRAY_SIZE(K400_LCD_RES_12X10_14X10)
-
-/* ++++++ K400 ++++++ */
-/* Panel 1366x768 */
-struct io_reg K400_LCD_RES_6X4_1366X7[] = {
- /* 640x400 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B},
- {VIACR, CR5D, 0x40, 0x13},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x64},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_6X4_1366X7 ARRAY_SIZE(K400_LCD_RES_6X4_1366X7)
-
-struct io_reg K400_LCD_RES_7X4_1366X7[] = {
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B},
- {VIACR, CR5D, 0x40, 0x13},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x75},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_7X4_1366X7 ARRAY_SIZE(K400_LCD_RES_7X4_1366X7)
-
-struct io_reg K400_LCD_RES_8X6_1366X7[] = {
- /* 800x600 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B},
- {VIACR, CR5D, 0x40, 0x13},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x82},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_8X6_1366X7 ARRAY_SIZE(K400_LCD_RES_8X6_1366X7)
-
-struct io_reg K400_LCD_RES_10X7_1366X7[] = {
- /* 1024x768 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xA7},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_10X7_1366X7 ARRAY_SIZE(K400_LCD_RES_10X7_1366X7)
-
-struct io_reg K400_LCD_RES_12X10_1366X7[] = {
- /* 1280x768, 1280x960, 1280x1024 */
- /* IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56},
- /* IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75},
- {VIACR, CR5D, 0x40, 0x24},
- /* IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44},
- /* IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xD2},
- /* IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04},
- /* VCLK */
- {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_12X10_1366X7\
- ARRAY_SIZE(K400_LCD_RES_12X10_1366X7)
-
-/* ++++++ K400 ++++++ */
-/* Panel 1280x1024 */
-struct io_reg K400_LCD_RES_6X4_12X10[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
- {VIACR, CR5D, 0x40, 0x1C},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x34},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x63},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xAA}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_6X4_12X10 ARRAY_SIZE(K400_LCD_RES_6X4_12X10)
-
-struct io_reg K400_LCD_RES_7X4_12X10[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
- {VIACR, CR5D, 0x40, 0x1C},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x68}, {VIACR, CR71, 0x08, 0x34},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x6C},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xA8}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0xED}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_7X4_12X10 ARRAY_SIZE(K400_LCD_RES_7X4_12X10)
-
-struct io_reg K400_LCD_RES_8X6_12X10[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
- {VIACR, CR5D, 0x40, 0x1C},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x34},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x83},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_8X6_12X10 ARRAY_SIZE(K400_LCD_RES_8X6_12X10)
-
-struct io_reg K400_LCD_RES_10X7_12X10[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74},
- {VIACR, CR5D, 0x40, 0x1C},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x34},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0xA7},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x04},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_10X7_12X10 ARRAY_SIZE(K400_LCD_RES_10X7_12X10)
-
-/* ++++++ K400 ++++++ */
-/* Panel 1024x768 */
-struct io_reg K400_LCD_RES_6X4_10X7[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B},
- {VIACR, CR5D, 0x40, 0x13},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x64},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_6X4_10X7 ARRAY_SIZE(K400_LCD_RES_6X4_10X7)
-
-struct io_reg K400_LCD_RES_7X4_10X7[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B},
- {VIACR, CR5D, 0x40, 0x13},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x75},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_7X4_10X7 ARRAY_SIZE(K400_LCD_RES_7X4_10X7)
-
-struct io_reg K400_LCD_RES_8X6_10X7[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B},
- {VIACR, CR5D, 0x40, 0x13},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x82},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_8X6_10X7 ARRAY_SIZE(K400_LCD_RES_8X6_10X7)
-
-/* ++++++ K400 ++++++ */
-/* Panel 800x600 */
-struct io_reg K400_LCD_RES_6X4_8X6[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x1A}, {VIACR, CR55, 0x0F, 0x34},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x1A}, {VIACR, CR54, 0x38, 0xE3},
- {VIACR, CR5D, 0x40, 0x12},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x22},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x63},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x6E}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0x86}, {VIASR, SR47, 0xFF, 0xB3}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_6X4_8X6 ARRAY_SIZE(K400_LCD_RES_6X4_8X6)
-
-struct io_reg K400_LCD_RES_7X4_8X6[] = {
- /*IGA2 Horizontal Total */
- {VIACR, CR50, 0xFF, 0x1F}, {VIACR, CR55, 0x0F, 0x34},
- /*IGA2 Horizontal Blank End */
- {VIACR, CR53, 0xFF, 0x1F}, {VIACR, CR54, 0x38, 0xE3},
- {VIACR, CR5D, 0x40, 0x12},
- /*IGA2 Horizontal Total Shadow */
- {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x22},
- /*IGA2 Horizontal Blank End Shadow */
- {VIACR, CR6E, 0xFF, 0x83},
- /*IGA2 Offset */
- {VIACR, CR66, 0xFF, 0x78}, {VIACR, CR67, 0x03, 0x00},
- /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x59}
-};
-
-#define NUM_TOTAL_K400_LCD_RES_7X4_8X6 ARRAY_SIZE(K400_LCD_RES_7X4_8X6)
-
-#endif /* __LCDTBL_H__ */
--
1.6.3.2
viafb: unify output path configuration
Move all output path routing directly in the viafb_setmode. This
gives a better overview and allows to factor similar parts out.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/dvi.c | 2 --
drivers/video/via/hw.c | 19 +++++++++++++++++--
drivers/video/via/lcd.c | 3 ---
3 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index 39b040b..92a2027 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -208,8 +208,6 @@ void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp,
}
}
viafb_fill_crtc_timing(pDviTiming, mode, mode_bpp / 8, set_iga);
- viafb_set_output_path(DEVICE_DVI, set_iga,
- viaparinfo->chip_info->tmds_chip_info.output_interface);
}
/* Sense DVI Connector */
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 63b6722..a3db804 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -2377,8 +2377,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
viaparinfo->crt_setting_info->iga_path);
}
- set_crt_output_path(viaparinfo->crt_setting_info->iga_path);
-
/* Patch if set_hres is not 8 alignment (1366) to viafb_setmode
to 8 alignment (1368),there is several pixels (2 pixels)
on right side of screen. */
@@ -2388,6 +2386,9 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
viafb_read_reg(VIACR, CR02) - 1);
viafb_lock_crt();
}
+
+ viafb_set_output_path(DEVICE_CRT,
+ viaparinfo->crt_setting_info->iga_path, 0);
}
if (viafb_DVI_ON) {
@@ -2407,6 +2408,10 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
video_bpp, viaparinfo->
tmds_setting_info->iga_path);
}
+
+ viafb_set_output_path(DEVICE_DVI,
+ viaparinfo->tmds_setting_info->iga_path,
+ viaparinfo->chip_info->tmds_chip_info.output_interface);
}
if (viafb_LCD_ON) {
@@ -2427,6 +2432,11 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
lvds_setting_info,
&viaparinfo->chip_info->lvds_chip_info);
}
+
+ viafb_set_output_path(DEVICE_LCD,
+ viaparinfo->lvds_setting_info->iga_path,
+ viaparinfo->chip_info->
+ lvds_chip_info.output_interface);
}
if (viafb_LCD2_ON) {
if (viafb_SAMM_ON &&
@@ -2446,6 +2456,11 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
lvds_setting_info2,
&viaparinfo->chip_info->lvds_chip_info2);
}
+
+ viafb_set_output_path(DEVICE_LCD,
+ viaparinfo->lvds_setting_info2->iga_path,
+ viaparinfo->chip_info->
+ lvds_chip_info2.output_interface);
}
if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700)
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index bda1246..e48117e 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -661,9 +661,6 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk);
DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N);
viafb_set_vclock(pll_D_N, set_iga);
-
- viafb_set_output_path(DEVICE_LCD, set_iga,
- plvds_chip_info->output_interface);
lcd_patch_skew(plvds_setting_info, plvds_chip_info);
/* If K8M800, enable LCD Prefetch Mode. */
--
1.6.3.2
viafb: remove stub
This is a nop so removing it is safe.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 17 -----------------
1 files changed, 0 insertions(+), 17 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 53b0651..63b6722 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -720,7 +720,6 @@ static struct rgbLUT palLUT_table[] = {
static void set_crt_output_path(int set_iga);
static void dvi_patch_skew_dvp0(void);
-static void dvi_patch_skew_dvp1(void);
static void dvi_patch_skew_dvp_low(void);
static void set_dvi_output_path(int set_iga, int output_interface);
static void set_lcd_output_path(int set_iga, int output_interface);
@@ -910,21 +909,6 @@ static void dvi_patch_skew_dvp0(void)
}
}
-static void dvi_patch_skew_dvp1(void)
-{
- switch (viaparinfo->chip_info->gfx_chip_name) {
- case UNICHROME_CX700:
- {
- break;
- }
-
- default:
- {
- break;
- }
- }
-}
-
static void dvi_patch_skew_dvp_low(void)
{
switch (viaparinfo->chip_info->gfx_chip_name) {
@@ -992,7 +976,6 @@ static void set_dvi_output_path(int set_iga, int output_interface)
}
viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
- dvi_patch_skew_dvp1();
break;
case INTERFACE_DFP_HIGH:
if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) {
--
1.6.3.2
viafb: enable second display channel at central place
Move the enabling of the second display channel to the generic
output routing function and do it exactly if something is using it.
This unifies a zoo of variants how to do it and does no longer
disable it if LCD is not on the second display which is much saner
as there can be other users who need it. Probably this did not cause
any problems so far as we only recently started dual fb support and
otherwise there won't be other users and LCD is preferred assigned to
second display channel.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 35 +++++------------------------------
1 files changed, 5 insertions(+), 30 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index a3db804..1ce2c21 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -733,7 +733,6 @@ static void set_display_channel(void);
static void device_off(void);
static void device_on(void);
static void enable_second_display_channel(void);
-static void disable_second_display_channel(void);
void viafb_lock_crt(void)
{
@@ -856,6 +855,9 @@ void viafb_set_output_path(int device, int set_iga, int output_interface)
set_lcd_output_path(set_iga, output_interface);
break;
}
+
+ if (set_iga == IGA2)
+ enable_second_display_channel();
}
static void set_crt_output_path(int set_iga)
@@ -867,7 +869,6 @@ static void set_crt_output_path(int set_iga)
viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6);
break;
case IGA2:
- viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7);
viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6);
break;
}
@@ -1017,7 +1018,6 @@ static void set_dvi_output_path(int set_iga, int output_interface)
}
if (set_iga == IGA2) {
- enable_second_display_channel();
/* Disable LCD Scaling */
viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0);
}
@@ -1028,21 +1028,9 @@ static void set_lcd_output_path(int set_iga, int output_interface)
DEBUG_MSG(KERN_INFO
"set_lcd_output_path, iga:%d,out_interface:%d\n",
set_iga, output_interface);
- switch (set_iga) {
- case IGA1:
- viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
- viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
- disable_second_display_channel();
- break;
-
- case IGA2:
- viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
- viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
-
- enable_second_display_channel();
- break;
- }
+ viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
+ viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
switch (output_interface) {
case INTERFACE_DVP0:
@@ -2480,10 +2468,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
viafb_DeviceStatus = CRT_Device;
}
device_on();
-
- if (viafb_SAMM_ON == 1)
- viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7);
-
device_screen_on();
return 1;
}
@@ -2557,15 +2541,6 @@ static void enable_second_display_channel(void)
viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6);
}
-static void disable_second_display_channel(void)
-{
- /* to disable second display channel. */
- viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT6);
- viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT7);
- viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6);
-}
-
-
void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
*p_gfx_dpa_setting)
{
--
1.6.3.2
viafb: rework output device routing
This patch rips the device routing out of the 3 main functions to
separate functions to make them available for transition to a better
controlling scheme.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 183 +++++++++++++++++++++++++-----------------------
1 files changed, 94 insertions(+), 89 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 1ce2c21..2f7f640 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -860,18 +860,78 @@ void viafb_set_output_path(int device, int set_iga, int output_interface)
enable_second_display_channel();
}
-static void set_crt_output_path(int set_iga)
+static void set_source_common(u8 index, u8 offset, u8 iga)
{
- viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
+ u8 value, mask = 1 << offset;
- switch (set_iga) {
+ switch (iga) {
+ case IGA1:
+ value = 0x00;
+ break;
+ case IGA2:
+ value = mask;
+ break;
+ default:
+ printk(KERN_WARNING "viafb: Unsupported source: %d\n", iga);
+ return;
+ }
+
+ via_write_reg_mask(VIACR, index, value, mask);
+}
+
+static void set_crt_source(u8 iga)
+{
+ u8 value;
+
+ switch (iga) {
case IGA1:
- viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6);
+ value = 0x00;
break;
case IGA2:
- viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6);
+ value = 0x40;
break;
+ default:
+ printk(KERN_WARNING "viafb: Unsupported source: %d\n", iga);
+ return;
}
+
+ via_write_reg_mask(VIASR, 0x16, value, 0x40);
+}
+
+static inline void set_6C_source(u8 iga)
+{
+ set_source_common(0x6C, 7, iga);
+}
+
+static inline void set_93_source(u8 iga)
+{
+ set_source_common(0x93, 7, iga);
+}
+
+static inline void set_96_source(u8 iga)
+{
+ set_source_common(0x96, 4, iga);
+}
+
+static inline void set_dvp1_source(u8 iga)
+{
+ set_source_common(0x9B, 4, iga);
+}
+
+static inline void set_lvds1_source(u8 iga)
+{
+ set_source_common(0x99, 4, iga);
+}
+
+static inline void set_lvds2_source(u8 iga)
+{
+ set_source_common(0x97, 4, iga);
+}
+
+static void set_crt_output_path(int set_iga)
+{
+ viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
+ set_crt_source(set_iga);
}
static void dvi_patch_skew_dvp0(void)
@@ -944,76 +1004,45 @@ static void set_dvi_output_path(int set_iga, int output_interface)
{
switch (output_interface) {
case INTERFACE_DVP0:
+ set_96_source(set_iga);
+ set_6C_source(set_iga);
viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
-
- if (set_iga == IGA1) {
- viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
- viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 +
- BIT5 + BIT7);
- } else {
- viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
- viafb_write_reg_mask(CR6C, VIACR, 0xA1, BIT0 +
- BIT5 + BIT7);
- }
-
+ viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5);
viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
-
dvi_patch_skew_dvp0();
break;
case INTERFACE_DVP1:
if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR93, VIACR, 0x21,
- BIT0 + BIT5 + BIT7);
- else
- viafb_write_reg_mask(CR93, VIACR, 0xA1,
- BIT0 + BIT5 + BIT7);
+ set_93_source(set_iga);
+ viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
} else {
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4);
- else
- viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
+ set_dvp1_source(set_iga);
}
viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
break;
case INTERFACE_DFP_HIGH:
if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) {
- if (set_iga == IGA1) {
- viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
- viafb_write_reg_mask(CR97, VIACR, 0x03,
- BIT0 + BIT1 + BIT4);
- } else {
- viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
- viafb_write_reg_mask(CR97, VIACR, 0x13,
- BIT0 + BIT1 + BIT4);
- }
+ via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
+ set_lvds2_source(set_iga);
+ set_96_source(set_iga);
}
+
viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
break;
case INTERFACE_DFP_LOW:
if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
break;
-
- if (set_iga == IGA1) {
- viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
- viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4);
- } else {
- viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
- viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
- }
-
+ set_dvp1_source(set_iga);
+ set_lvds1_source(set_iga);
viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
dvi_patch_skew_dvp_low();
break;
case INTERFACE_TMDS:
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
- else
- viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
+ set_lvds1_source(set_iga);
break;
}
@@ -1031,45 +1060,31 @@ static void set_lcd_output_path(int set_iga, int output_interface)
viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
-
switch (output_interface) {
case INTERFACE_DVP0:
- if (set_iga == IGA1) {
- viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4);
- } else {
+ set_96_source(set_iga);
+ if (set_iga == IGA2)
viafb_write_reg(CR91, VIACR, 0x00);
- viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
- }
break;
case INTERFACE_DVP1:
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4);
- else {
+ set_dvp1_source(set_iga);
+ if (set_iga == IGA2)
viafb_write_reg(CR91, VIACR, 0x00);
- viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
- }
break;
case INTERFACE_DFP_HIGH:
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4);
- else {
+ set_lvds2_source(set_iga);
+ set_96_source(set_iga);
+ if (set_iga == IGA2)
viafb_write_reg(CR91, VIACR, 0x00);
- viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4);
- viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4);
- }
break;
case INTERFACE_DFP_LOW:
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
- else {
+ set_lvds1_source(set_iga);
+ set_dvp1_source(set_iga);
+ if (set_iga == IGA2)
viafb_write_reg(CR91, VIACR, 0x00);
- viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
- viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4);
- }
-
break;
case INTERFACE_DFP:
@@ -1078,30 +1093,20 @@ static void set_lcd_output_path(int set_iga, int output_interface)
viaparinfo->chip_info->gfx_chip_name))
viafb_write_reg_mask(CR97, VIACR, 0x84,
BIT7 + BIT2 + BIT1 + BIT0);
- if (set_iga == IGA1) {
- viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4);
- viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
- } else {
+
+ set_lvds1_source(set_iga);
+ set_lvds2_source(set_iga);
+ if (set_iga == IGA2)
viafb_write_reg(CR91, VIACR, 0x00);
- viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4);
- viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
- }
break;
case INTERFACE_LVDS0:
case INTERFACE_LVDS0LVDS1:
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4);
- else
- viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4);
-
+ set_lvds1_source(set_iga);
break;
case INTERFACE_LVDS1:
- if (set_iga == IGA1)
- viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4);
- else
- viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4);
+ set_lvds2_source(set_iga);
break;
}
}
--
1.6.3.2
viafb: propagate __init and __devinit
There are a lot of init functions which are not marked as such.
Fix this.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/dvi.c | 24 ++++++++++++++----------
drivers/video/via/dvi.h | 4 ++--
drivers/video/via/hw.c | 16 ++++++++--------
drivers/video/via/hw.h | 4 ++--
drivers/video/via/lcd.c | 10 +++++-----
drivers/video/via/lcd.h | 6 +++---
drivers/video/via/viafbdev.c | 8 ++++----
7 files changed, 38 insertions(+), 34 deletions(-)
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index 92a2027..ab6145d 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -25,10 +25,12 @@
static void tmds_register_write(int index, u8 data);
static int tmds_register_read(int index);
static int tmds_register_read_bytes(int index, u8 *buff, int buff_len);
-static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
- *tmds_chip, struct tmds_setting_information *tmds_setting);
-static void dvi_get_panel_size_from_DDCv2(struct tmds_chip_information
- *tmds_chip, struct tmds_setting_information *tmds_setting);
+static void __devinit dvi_get_panel_size_from_DDCv1(
+ struct tmds_chip_information *tmds_chip,
+ struct tmds_setting_information *tmds_setting);
+static void __devinit dvi_get_panel_size_from_DDCv2(
+ struct tmds_chip_information *tmds_chip,
+ struct tmds_setting_information *tmds_setting);
static int viafb_dvi_query_EDID(void);
static int check_tmds_chip(int device_id_subaddr, int device_id)
@@ -39,7 +41,7 @@ static int check_tmds_chip(int device_id_subaddr, int device_id)
return FAIL;
}
-void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
+void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting)
{
DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n");
@@ -60,7 +62,7 @@ void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
return;
}
-int viafb_tmds_trasmitter_identify(void)
+int __devinit viafb_tmds_trasmitter_identify(void)
{
unsigned char sr2a = 0, sr1e = 0, sr3e = 0;
@@ -311,8 +313,9 @@ static int viafb_dvi_query_EDID(void)
}
/* Get Panel Size Using EDID1 Table */
-static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
- *tmds_chip, struct tmds_setting_information *tmds_setting)
+static void __devinit dvi_get_panel_size_from_DDCv1(
+ struct tmds_chip_information *tmds_chip,
+ struct tmds_setting_information *tmds_setting)
{
int i, max_h = 0, tmp, restore;
unsigned char rData;
@@ -416,8 +419,9 @@ static void dvi_get_panel_size_from_DDCv1(struct tmds_chip_information
}
/* Get Panel Size Using EDID2 Table */
-static void dvi_get_panel_size_from_DDCv2(struct tmds_chip_information
- *tmds_chip, struct tmds_setting_information *tmds_setting)
+static void __devinit dvi_get_panel_size_from_DDCv2(
+ struct tmds_chip_information *tmds_chip,
+ struct tmds_setting_information *tmds_setting)
{
int restore;
unsigned char R_Buffer[2];
diff --git a/drivers/video/via/dvi.h b/drivers/video/via/dvi.h
index 0dffcfd..2c525c0 100644
--- a/drivers/video/via/dvi.h
+++ b/drivers/video/via/dvi.h
@@ -56,8 +56,8 @@
int viafb_dvi_sense(void);
void viafb_dvi_disable(void);
void viafb_dvi_enable(void);
-int viafb_tmds_trasmitter_identify(void);
-void viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
+int __devinit viafb_tmds_trasmitter_identify(void);
+void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
struct tmds_setting_information *tmds_setting);
void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp,
int set_iga);
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 2f7f640..4407943 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -724,9 +724,9 @@ static void dvi_patch_skew_dvp_low(void);
static void set_dvi_output_path(int set_iga, int output_interface);
static void set_lcd_output_path(int set_iga, int output_interface);
static void load_fix_bit_crtc_reg(void);
-static void init_gfx_chip_info(int chip_type);
-static void init_tmds_chip_info(void);
-static void init_lvds_chip_info(void);
+static void __devinit init_gfx_chip_info(int chip_type);
+static void __devinit init_tmds_chip_info(void);
+static void __devinit init_lvds_chip_info(void);
static void device_screen_off(void);
static void device_screen_on(void);
static void set_display_channel(void);
@@ -1980,7 +1980,7 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
}
-void viafb_init_chip_info(int chip_type)
+void __devinit viafb_init_chip_info(int chip_type)
{
init_gfx_chip_info(chip_type);
init_tmds_chip_info();
@@ -2047,7 +2047,7 @@ void viafb_update_device_setting(int hres, int vres,
}
}
-static void init_gfx_chip_info(int chip_type)
+static void __devinit init_gfx_chip_info(int chip_type)
{
u8 tmp;
@@ -2099,7 +2099,7 @@ static void init_gfx_chip_info(int chip_type)
}
}
-static void init_tmds_chip_info(void)
+static void __devinit init_tmds_chip_info(void)
{
viafb_tmds_trasmitter_identify();
@@ -2144,7 +2144,7 @@ static void init_tmds_chip_info(void)
&viaparinfo->shared->tmds_setting_info);
}
-static void init_lvds_chip_info(void)
+static void __devinit init_lvds_chip_info(void)
{
viafb_lvds_trasmitter_identify();
viafb_init_lcd_size();
@@ -2178,7 +2178,7 @@ static void init_lvds_chip_info(void)
viaparinfo->chip_info->lvds_chip_info.output_interface);
}
-void viafb_init_dac(int set_iga)
+void __devinit viafb_init_dac(int set_iga)
{
int i;
u8 tmp;
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index c443998..39f3a69 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -908,8 +908,8 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
struct VideoModeTable *vmode_tbl1, int video_bpp1);
void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
struct VideoModeTable *vmode_tbl);
-void viafb_init_chip_info(int chip_type);
-void viafb_init_dac(int set_iga);
+void __devinit viafb_init_chip_info(int chip_type);
+void __devinit viafb_init_dac(int set_iga);
int viafb_get_pixclock(int hres, int vres, int vmode_refresh);
int viafb_get_refresh(int hres, int vres, u32 float_refresh);
void viafb_update_device_setting(int hres, int vres, int bpp,
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index e48117e..c7de164 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -48,7 +48,7 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
static int check_lvds_chip(int device_id_subaddr, int device_id);
static bool lvds_identify_integratedlvds(void);
-static void fp_id_to_vindex(int panel_id);
+static void __devinit fp_id_to_vindex(int panel_id);
static int lvds_register_read(int index);
static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
int panel_vres);
@@ -90,7 +90,7 @@ static int check_lvds_chip(int device_id_subaddr, int device_id)
return FAIL;
}
-void viafb_init_lcd_size(void)
+void __devinit viafb_init_lcd_size(void)
{
DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n");
@@ -150,7 +150,7 @@ static bool lvds_identify_integratedlvds(void)
return true;
}
-int viafb_lvds_trasmitter_identify(void)
+int __devinit viafb_lvds_trasmitter_identify(void)
{
if (viafb_lvds_identify_vt1636(VIA_PORT_31)) {
viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31;
@@ -191,7 +191,7 @@ int viafb_lvds_trasmitter_identify(void)
return FAIL;
}
-static void fp_id_to_vindex(int panel_id)
+static void __devinit fp_id_to_vindex(int panel_id)
{
DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n");
@@ -996,7 +996,7 @@ static void check_diport_of_integrated_lvds(
plvds_chip_info->output_interface);
}
-void viafb_init_lvds_output_interface(struct lvds_chip_information
+void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
*plvds_chip_info,
struct lvds_setting_information
*plvds_setting_info)
diff --git a/drivers/video/via/lcd.h b/drivers/video/via/lcd.h
index b348efc..c7909fe 100644
--- a/drivers/video/via/lcd.h
+++ b/drivers/video/via/lcd.h
@@ -71,15 +71,15 @@ void viafb_enable_lvds_vt1636(struct lvds_setting_information
struct lvds_chip_information *plvds_chip_info);
void viafb_lcd_disable(void);
void viafb_lcd_enable(void);
-void viafb_init_lcd_size(void);
-void viafb_init_lvds_output_interface(struct lvds_chip_information
+void __devinit viafb_init_lcd_size(void);
+void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
*plvds_chip_info,
struct lvds_setting_information
*plvds_setting_info);
void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
struct lvds_setting_information *plvds_setting_info,
struct lvds_chip_information *plvds_chip_info);
-int viafb_lvds_trasmitter_identify(void);
+int __devinit viafb_lvds_trasmitter_identify(void);
void viafb_init_lvds_output_interface(struct lvds_chip_information
*plvds_chip_info,
struct lvds_setting_information
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index bdd0e41..5a947b0 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -961,7 +961,7 @@ static void retrieve_device_setting(struct viafb_ioctl_setting
setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode;
}
-static int parse_active_dev(void)
+static int __init parse_active_dev(void)
{
viafb_CRT_ON = STATE_OFF;
viafb_DVI_ON = STATE_OFF;
@@ -1031,7 +1031,7 @@ static int parse_active_dev(void)
return 0;
}
-static int parse_port(char *opt_str, int *output_interface)
+static int __devinit parse_port(char *opt_str, int *output_interface)
{
if (!strncmp(opt_str, "DVP0", 4))
*output_interface = INTERFACE_DVP0;
@@ -1048,7 +1048,7 @@ static int parse_port(char *opt_str, int *output_interface)
return 0;
}
-static void parse_lcd_port(void)
+static void __devinit parse_lcd_port(void)
{
parse_port(viafb_lcd_port, &viaparinfo->chip_info->lvds_chip_info.
output_interface);
@@ -1061,7 +1061,7 @@ static void parse_lcd_port(void)
output_interface);
}
-static void parse_dvi_port(void)
+static void __devinit parse_dvi_port(void)
{
parse_port(viafb_dvi_port, &viaparinfo->chip_info->tmds_chip_info.
output_interface);
--
1.6.3.2
viafb: add new output device management
This patch adds a new output device management that stores for each
IGA which output devices are routed to it and a compatiblity layer
that converts the old per-output device values in the new format.
Bounding the output devices to each IGA is a central idea of the
cleanup. Doing it this way should be easier and make much more sense
than the old format which happily mixed different output devices
together and did not even take into account that some devices are no
longer available on newer chipsets.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 102 ++++++++++++++++++++++++++++++++++++++++++
drivers/video/via/hw.h | 9 ++++
drivers/video/via/viafbdev.h | 3 +
3 files changed, 114 insertions(+), 0 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 638cf96..30cc2f0 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -753,6 +753,66 @@ void write_dac_reg(u8 index, u8 r, u8 g, u8 b)
outb(b, LUT_DATA);
}
+static u32 get_dvi_devices(int output_interface)
+{
+ switch (output_interface) {
+ case INTERFACE_DVP0:
+ return VIA_96 | VIA_6C;
+
+ case INTERFACE_DVP1:
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+ return VIA_93;
+ else
+ return VIA_DVP1;
+
+ case INTERFACE_DFP_HIGH:
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+ return 0;
+ else
+ return VIA_LVDS2 | VIA_96;
+
+ case INTERFACE_DFP_LOW:
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+ return 0;
+ else
+ return VIA_DVP1 | VIA_LVDS1;
+
+ case INTERFACE_TMDS:
+ return VIA_LVDS1;
+ }
+
+ return 0;
+}
+
+static u32 get_lcd_devices(int output_interface)
+{
+ switch (output_interface) {
+ case INTERFACE_DVP0:
+ return VIA_96;
+
+ case INTERFACE_DVP1:
+ return VIA_DVP1;
+
+ case INTERFACE_DFP_HIGH:
+ return VIA_LVDS2 | VIA_96;
+
+ case INTERFACE_DFP_LOW:
+ return VIA_LVDS1 | VIA_DVP1;
+
+ case INTERFACE_DFP:
+ return VIA_LVDS1 | VIA_LVDS2;
+
+ case INTERFACE_LVDS0:
+ case INTERFACE_LVDS0LVDS1:
+ return VIA_LVDS1;
+
+ case INTERFACE_LVDS1:
+ return VIA_LVDS2;
+ }
+
+ return 0;
+}
+
/*Set IGA path for each device*/
void viafb_set_iga_path(void)
{
@@ -819,6 +879,48 @@ void viafb_set_iga_path(void)
viaparinfo->tmds_setting_info->iga_path = IGA1;
}
}
+
+ viaparinfo->shared->iga1_devices = 0;
+ viaparinfo->shared->iga2_devices = 0;
+ if (viafb_CRT_ON) {
+ if (viaparinfo->crt_setting_info->iga_path == IGA1)
+ viaparinfo->shared->iga1_devices |= VIA_CRT;
+ else
+ viaparinfo->shared->iga2_devices |= VIA_CRT;
+ }
+
+ if (viafb_DVI_ON) {
+ if (viaparinfo->tmds_setting_info->iga_path == IGA1)
+ viaparinfo->shared->iga1_devices |= get_dvi_devices(
+ viaparinfo->chip_info->
+ tmds_chip_info.output_interface);
+ else
+ viaparinfo->shared->iga2_devices |= get_dvi_devices(
+ viaparinfo->chip_info->
+ tmds_chip_info.output_interface);
+ }
+
+ if (viafb_LCD_ON) {
+ if (viaparinfo->lvds_setting_info->iga_path == IGA1)
+ viaparinfo->shared->iga1_devices |= get_lcd_devices(
+ viaparinfo->chip_info->
+ lvds_chip_info.output_interface);
+ else
+ viaparinfo->shared->iga2_devices |= get_lcd_devices(
+ viaparinfo->chip_info->
+ lvds_chip_info.output_interface);
+ }
+
+ if (viafb_LCD2_ON) {
+ if (viaparinfo->lvds_setting_info2->iga_path == IGA1)
+ viaparinfo->shared->iga1_devices |= get_lcd_devices(
+ viaparinfo->chip_info->
+ lvds_chip_info2.output_interface);
+ else
+ viaparinfo->shared->iga2_devices |= get_lcd_devices(
+ viaparinfo->chip_info->
+ lvds_chip_info2.output_interface);
+ }
}
static void set_color_register(u8 index, u8 red, u8 green, u8 blue)
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index 39f3a69..c52a1d5 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -30,6 +30,15 @@
#define viafb_write_reg(i, p, d) via_write_reg(p, i, d)
#define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m)
+/* VIA output devices */
+#define VIA_6C 0x00000001
+#define VIA_93 0x00000002
+#define VIA_96 0x00000004
+#define VIA_CRT 0x00000010
+#define VIA_DVP1 0x00000020
+#define VIA_LVDS1 0x00000040
+#define VIA_LVDS2 0x00000080
+
/***************************************************
* Definition IGA1 Design Method of CRTC Registers *
****************************************************/
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h
index 52a35fa..945a47a 100644
--- a/drivers/video/via/viafbdev.h
+++ b/drivers/video/via/viafbdev.h
@@ -40,6 +40,9 @@
#define VIAFB_NUM_I2C 5
struct viafb_shared {
+ u32 iga1_devices;
+ u32 iga2_devices;
+
struct proc_dir_entry *proc_entry; /*viafb proc entry */
struct viafb_dev *vdev; /* Global dev info */
--
1.6.3.2
viafb: use new device routing
This patch uses the iga{1,2}_devices variables to select which IGA
should be the source. Doing this is convinient, more powerfull
than the older scheme and easy extendable to support further output
devices. It is not yet completed as the device on/off selection needs
to be converted to the same scheme to take full advantage.
No visible changes yet as we want to complete the transition before
anouncing any unstabke interface.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 101 ++++++++++++++++++------------------------------
1 files changed, 38 insertions(+), 63 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 30cc2f0..c8f2405 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -718,7 +718,6 @@ static struct rgbLUT palLUT_table[] = {
0x00}
};
-static void set_crt_output_path(int set_iga);
static void dvi_patch_skew_dvp0(void);
static void dvi_patch_skew_dvp_low(void);
static void set_dvi_output_path(int set_iga, int output_interface);
@@ -733,6 +732,7 @@ static void set_display_channel(void);
static void device_off(void);
static void device_on(void);
static void enable_second_display_channel(void);
+static void disable_second_display_channel(void);
void viafb_lock_crt(void)
{
@@ -948,7 +948,7 @@ void viafb_set_output_path(int device, int set_iga, int output_interface)
{
switch (device) {
case DEVICE_CRT:
- set_crt_output_path(set_iga);
+ viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
break;
case DEVICE_DVI:
set_dvi_output_path(set_iga, output_interface);
@@ -957,9 +957,6 @@ void viafb_set_output_path(int device, int set_iga, int output_interface)
set_lcd_output_path(set_iga, output_interface);
break;
}
-
- if (set_iga == IGA2)
- enable_second_display_channel();
}
static void set_source_common(u8 index, u8 offset, u8 iga)
@@ -1030,10 +1027,22 @@ static inline void set_lvds2_source(u8 iga)
set_source_common(0x97, 4, iga);
}
-static void set_crt_output_path(int set_iga)
+void via_set_source(u32 devices, u8 iga)
{
- viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
- set_crt_source(set_iga);
+ if (devices & VIA_6C)
+ set_6C_source(iga);
+ if (devices & VIA_93)
+ set_93_source(iga);
+ if (devices & VIA_96)
+ set_96_source(iga);
+ if (devices & VIA_CRT)
+ set_crt_source(iga);
+ if (devices & VIA_DVP1)
+ set_dvp1_source(iga);
+ if (devices & VIA_LVDS1)
+ set_lvds1_source(iga);
+ if (devices & VIA_LVDS2)
+ set_lvds2_source(iga);
}
static void dvi_patch_skew_dvp0(void)
@@ -1106,8 +1115,6 @@ static void set_dvi_output_path(int set_iga, int output_interface)
{
switch (output_interface) {
case INTERFACE_DVP0:
- set_96_source(set_iga);
- set_6C_source(set_iga);
viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5);
viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
@@ -1115,21 +1122,14 @@ static void set_dvi_output_path(int set_iga, int output_interface)
break;
case INTERFACE_DVP1:
- if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
- set_93_source(set_iga);
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
- } else {
- set_dvp1_source(set_iga);
- }
viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
break;
case INTERFACE_DFP_HIGH:
- if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) {
+ if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
- set_lvds2_source(set_iga);
- set_96_source(set_iga);
- }
viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
break;
@@ -1137,15 +1137,9 @@ static void set_dvi_output_path(int set_iga, int output_interface)
case INTERFACE_DFP_LOW:
if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
break;
- set_dvp1_source(set_iga);
- set_lvds1_source(set_iga);
viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
dvi_patch_skew_dvp_low();
break;
-
- case INTERFACE_TMDS:
- set_lvds1_source(set_iga);
- break;
}
if (set_iga == IGA2) {
@@ -1163,53 +1157,19 @@ static void set_lcd_output_path(int set_iga, int output_interface)
viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
switch (output_interface) {
- case INTERFACE_DVP0:
- set_96_source(set_iga);
- if (set_iga == IGA2)
- viafb_write_reg(CR91, VIACR, 0x00);
- break;
-
- case INTERFACE_DVP1:
- set_dvp1_source(set_iga);
- if (set_iga == IGA2)
- viafb_write_reg(CR91, VIACR, 0x00);
- break;
-
- case INTERFACE_DFP_HIGH:
- set_lvds2_source(set_iga);
- set_96_source(set_iga);
- if (set_iga == IGA2)
- viafb_write_reg(CR91, VIACR, 0x00);
- break;
-
- case INTERFACE_DFP_LOW:
- set_lvds1_source(set_iga);
- set_dvp1_source(set_iga);
- if (set_iga == IGA2)
- viafb_write_reg(CR91, VIACR, 0x00);
- break;
-
case INTERFACE_DFP:
if ((UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)
|| (UNICHROME_P4M890 ==
viaparinfo->chip_info->gfx_chip_name))
viafb_write_reg_mask(CR97, VIACR, 0x84,
BIT7 + BIT2 + BIT1 + BIT0);
-
- set_lvds1_source(set_iga);
- set_lvds2_source(set_iga);
+ case INTERFACE_DVP0:
+ case INTERFACE_DVP1:
+ case INTERFACE_DFP_HIGH:
+ case INTERFACE_DFP_LOW:
if (set_iga == IGA2)
viafb_write_reg(CR91, VIACR, 0x00);
break;
-
- case INTERFACE_LVDS0:
- case INTERFACE_LVDS0LVDS1:
- set_lvds1_source(set_iga);
- break;
-
- case INTERFACE_LVDS1:
- set_lvds2_source(set_iga);
- break;
}
}
@@ -2454,6 +2414,13 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
via_set_primary_color_depth(viaparinfo->depth);
via_set_secondary_color_depth(viafb_dual_fb ? viaparinfo1->depth
: viaparinfo->depth);
+ via_set_source(viaparinfo->shared->iga1_devices, IGA1);
+ via_set_source(viaparinfo->shared->iga2_devices, IGA2);
+ if (viaparinfo->shared->iga2_devices)
+ enable_second_display_channel();
+ else
+ disable_second_display_channel();
+
/* Update Refresh Rate Setting */
/* Clear On Screen */
@@ -2647,6 +2614,14 @@ static void enable_second_display_channel(void)
viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6);
}
+static void disable_second_display_channel(void)
+{
+ /* to disable second display channel. */
+ viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT6);
+ viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT7);
+ viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6);
+}
+
void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\
*p_gfx_dpa_setting)
{
--
1.6.3.2
viafb: merge the remaining output path with enable functions
This patch merges the remaining functionality of the output path
function in the associated enabling functions. This is very natural as
most of the remaining code does actually enable the device.
Just some more or less intelligent code merge. If no stupid mistakes
occured there should be no regressions.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/dvi.c | 146 +++++++++++++++++++++++++++++++-----------
drivers/video/via/hw.c | 164 -----------------------------------------------
drivers/video/via/hw.h | 3 -
drivers/video/via/lcd.c | 28 ++++++++
4 files changed, 136 insertions(+), 205 deletions(-)
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index ab6145d..7c82f6f 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -496,38 +496,103 @@ void viafb_dvi_disable(void)
viafb_read_reg(VIACR, CRD2) | 0x08);
}
+static void dvi_patch_skew_dvp0(void)
+{
+ /* Reset data driving first: */
+ viafb_write_reg_mask(SR1B, VIASR, 0, BIT1);
+ viafb_write_reg_mask(SR2A, VIASR, 0, BIT4);
+
+ switch (viaparinfo->chip_info->gfx_chip_name) {
+ case UNICHROME_P4M890:
+ {
+ if ((viaparinfo->tmds_setting_info->h_active == 1600) &&
+ (viaparinfo->tmds_setting_info->v_active ==
+ 1200))
+ viafb_write_reg_mask(CR96, VIACR, 0x03,
+ BIT0 + BIT1 + BIT2);
+ else
+ viafb_write_reg_mask(CR96, VIACR, 0x07,
+ BIT0 + BIT1 + BIT2);
+ break;
+ }
+
+ case UNICHROME_P4M900:
+ {
+ viafb_write_reg_mask(CR96, VIACR, 0x07,
+ BIT0 + BIT1 + BIT2 + BIT3);
+ viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1);
+ viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4);
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+}
+
+static void dvi_patch_skew_dvp_low(void)
+{
+ switch (viaparinfo->chip_info->gfx_chip_name) {
+ case UNICHROME_K8M890:
+ {
+ viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1);
+ break;
+ }
+
+ case UNICHROME_P4M900:
+ {
+ viafb_write_reg_mask(CR99, VIACR, 0x08,
+ BIT0 + BIT1 + BIT2 + BIT3);
+ break;
+ }
+
+ case UNICHROME_P4M890:
+ {
+ viafb_write_reg_mask(CR99, VIACR, 0x0F,
+ BIT0 + BIT1 + BIT2 + BIT3);
+ break;
+ }
+
+ default:
+ {
+ break;
+ }
+ }
+}
+
/* If Enable DVI, turn off pad */
void viafb_dvi_enable(void)
{
u8 data;
- if (viaparinfo->chip_info->
- tmds_chip_info.output_interface == INTERFACE_DVP0) {
- viafb_write_reg(SR1E, VIASR,
- viafb_read_reg(VIASR, SR1E) | 0xC0);
+ switch (viaparinfo->chip_info->tmds_chip_info.output_interface) {
+ case INTERFACE_DVP0:
+ viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
+ viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5);
+ viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
+ dvi_patch_skew_dvp0();
if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
tmds_register_write(0x88, 0x3b);
else
/*clear CR91[5] to direct on display period
in the secondary diplay path */
- viafb_write_reg(CR91, VIACR,
- viafb_read_reg(VIACR, CR91) & 0xDF);
- }
+ via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
+ break;
- if (viaparinfo->chip_info->
- tmds_chip_info.output_interface == INTERFACE_DVP1) {
- viafb_write_reg(SR1E, VIASR,
- viafb_read_reg(VIASR, SR1E) | 0x30);
+ case INTERFACE_DVP1:
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+ viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
+ viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
/*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */
- if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
tmds_register_write(0x88, 0x3b);
- } else {
+ else
/*clear CR91[5] to direct on display period
in the secondary diplay path */
- viafb_write_reg(CR91, VIACR,
- viafb_read_reg(VIACR, CR91) & 0xDF);
- }
+ via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
/*fix DVI cannot enable on EPIA-M board */
if (viafb_platform_epia_dvi == 1) {
@@ -539,36 +604,41 @@ void viafb_dvi_enable(void)
else
data = 0x37;
viafb_i2c_writebyte(viaparinfo->chip_info->
- tmds_chip_info.i2c_port,
- viaparinfo->chip_info->
- tmds_chip_info.tmds_chip_slave_addr,
- 0x08, data);
+ tmds_chip_info.i2c_port,
+ viaparinfo->chip_info->
+ tmds_chip_info.tmds_chip_slave_addr,
+ 0x08, data);
}
}
- }
+ break;
- if (viaparinfo->chip_info->
- tmds_chip_info.output_interface == INTERFACE_DFP_HIGH) {
- viafb_write_reg(SR2A, VIASR,
- viafb_read_reg(VIASR, SR2A) | 0x0C);
- viafb_write_reg(CR91, VIACR,
- viafb_read_reg(VIACR, CR91) & 0xDF);
- }
+ case INTERFACE_DFP_HIGH:
+ if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
+ via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
- if (viaparinfo->chip_info->
- tmds_chip_info.output_interface == INTERFACE_DFP_LOW) {
- viafb_write_reg(SR2A, VIASR,
- viafb_read_reg(VIASR, SR2A) | 0x03);
- viafb_write_reg(CR91, VIACR,
- viafb_read_reg(VIACR, CR91) & 0xDF);
- }
- if (viaparinfo->chip_info->
- tmds_chip_info.output_interface == INTERFACE_TMDS) {
+ viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
+ via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
+ break;
+
+ case INTERFACE_DFP_LOW:
+ if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
+ break;
+ viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
+ dvi_patch_skew_dvp_low();
+ via_write_reg_mask(VIACR, 0x91, 0x00, 0x20);
+ break;
+
+ case INTERFACE_TMDS:
/* Turn on Display period in the panel path. */
viafb_write_reg_mask(CR91, VIACR, 0, BIT7);
/* Turn on TMDS power. */
viafb_write_reg_mask(CRD2, VIACR, 0, BIT3);
+ break;
}
-}
+ if (viaparinfo->tmds_setting_info->iga_path == IGA2) {
+ /* Disable LCD Scaling */
+ viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0);
+ }
+}
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index c8f2405..0330323 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -718,10 +718,6 @@ static struct rgbLUT palLUT_table[] = {
0x00}
};
-static void dvi_patch_skew_dvp0(void);
-static void dvi_patch_skew_dvp_low(void);
-static void set_dvi_output_path(int set_iga, int output_interface);
-static void set_lcd_output_path(int set_iga, int output_interface);
static void load_fix_bit_crtc_reg(void);
static void __devinit init_gfx_chip_info(int chip_type);
static void __devinit init_tmds_chip_info(void);
@@ -944,21 +940,6 @@ void viafb_set_secondary_color_register(u8 index, u8 red, u8 green, u8 blue)
set_color_register(index, red, green, blue);
}
-void viafb_set_output_path(int device, int set_iga, int output_interface)
-{
- switch (device) {
- case DEVICE_CRT:
- viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5);
- break;
- case DEVICE_DVI:
- set_dvi_output_path(set_iga, output_interface);
- break;
- case DEVICE_LCD:
- set_lcd_output_path(set_iga, output_interface);
- break;
- }
-}
-
static void set_source_common(u8 index, u8 offset, u8 iga)
{
u8 value, mask = 1 << offset;
@@ -1045,134 +1026,6 @@ void via_set_source(u32 devices, u8 iga)
set_lvds2_source(iga);
}
-static void dvi_patch_skew_dvp0(void)
-{
- /* Reset data driving first: */
- viafb_write_reg_mask(SR1B, VIASR, 0, BIT1);
- viafb_write_reg_mask(SR2A, VIASR, 0, BIT4);
-
- switch (viaparinfo->chip_info->gfx_chip_name) {
- case UNICHROME_P4M890:
- {
- if ((viaparinfo->tmds_setting_info->h_active == 1600) &&
- (viaparinfo->tmds_setting_info->v_active ==
- 1200))
- viafb_write_reg_mask(CR96, VIACR, 0x03,
- BIT0 + BIT1 + BIT2);
- else
- viafb_write_reg_mask(CR96, VIACR, 0x07,
- BIT0 + BIT1 + BIT2);
- break;
- }
-
- case UNICHROME_P4M900:
- {
- viafb_write_reg_mask(CR96, VIACR, 0x07,
- BIT0 + BIT1 + BIT2 + BIT3);
- viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1);
- viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4);
- break;
- }
-
- default:
- {
- break;
- }
- }
-}
-
-static void dvi_patch_skew_dvp_low(void)
-{
- switch (viaparinfo->chip_info->gfx_chip_name) {
- case UNICHROME_K8M890:
- {
- viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1);
- break;
- }
-
- case UNICHROME_P4M900:
- {
- viafb_write_reg_mask(CR99, VIACR, 0x08,
- BIT0 + BIT1 + BIT2 + BIT3);
- break;
- }
-
- case UNICHROME_P4M890:
- {
- viafb_write_reg_mask(CR99, VIACR, 0x0F,
- BIT0 + BIT1 + BIT2 + BIT3);
- break;
- }
-
- default:
- {
- break;
- }
- }
-}
-
-static void set_dvi_output_path(int set_iga, int output_interface)
-{
- switch (output_interface) {
- case INTERFACE_DVP0:
- viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0);
- viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5);
- viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6);
- dvi_patch_skew_dvp0();
- break;
-
- case INTERFACE_DVP1:
- if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
- viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5);
-
- viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5);
- break;
- case INTERFACE_DFP_HIGH:
- if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266)
- via_write_reg_mask(VIACR, CR97, 0x03, 0x03);
-
- viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3);
- break;
-
- case INTERFACE_DFP_LOW:
- if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)
- break;
- viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1);
- dvi_patch_skew_dvp_low();
- break;
- }
-
- if (set_iga == IGA2) {
- /* Disable LCD Scaling */
- viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0);
- }
-}
-
-static void set_lcd_output_path(int set_iga, int output_interface)
-{
- DEBUG_MSG(KERN_INFO
- "set_lcd_output_path, iga:%d,out_interface:%d\n",
- set_iga, output_interface);
-
- viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
- viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
- switch (output_interface) {
- case INTERFACE_DFP:
- if ((UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)
- || (UNICHROME_P4M890 ==
- viaparinfo->chip_info->gfx_chip_name))
- viafb_write_reg_mask(CR97, VIACR, 0x84,
- BIT7 + BIT2 + BIT1 + BIT0);
- case INTERFACE_DVP0:
- case INTERFACE_DVP1:
- case INTERFACE_DFP_HIGH:
- case INTERFACE_DFP_LOW:
- if (set_iga == IGA2)
- viafb_write_reg(CR91, VIACR, 0x00);
- break;
- }
-}
-
static void load_fix_bit_crtc_reg(void)
{
/* always set to 1 */
@@ -2447,9 +2300,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
viafb_read_reg(VIACR, CR02) - 1);
viafb_lock_crt();
}
-
- viafb_set_output_path(DEVICE_CRT,
- viaparinfo->crt_setting_info->iga_path, 0);
}
if (viafb_DVI_ON) {
@@ -2469,10 +2319,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
video_bpp, viaparinfo->
tmds_setting_info->iga_path);
}
-
- viafb_set_output_path(DEVICE_DVI,
- viaparinfo->tmds_setting_info->iga_path,
- viaparinfo->chip_info->tmds_chip_info.output_interface);
}
if (viafb_LCD_ON) {
@@ -2493,11 +2339,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
lvds_setting_info,
&viaparinfo->chip_info->lvds_chip_info);
}
-
- viafb_set_output_path(DEVICE_LCD,
- viaparinfo->lvds_setting_info->iga_path,
- viaparinfo->chip_info->
- lvds_chip_info.output_interface);
}
if (viafb_LCD2_ON) {
if (viafb_SAMM_ON &&
@@ -2517,11 +2358,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
lvds_setting_info2,
&viaparinfo->chip_info->lvds_chip_info2);
}
-
- viafb_set_output_path(DEVICE_LCD,
- viaparinfo->lvds_setting_info2->iga_path,
- viaparinfo->chip_info->
- lvds_chip_info2.output_interface);
}
if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700)
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index c52a1d5..45dee39 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -890,9 +890,6 @@ extern int viafb_LCD_ON;
extern int viafb_DVI_ON;
extern int viafb_hotplug;
-void viafb_set_output_path(int device, int set_iga,
- int output_interface);
-
void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
struct VideoModeTable *video_mode, int bpp_byte, int set_iga);
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index c7de164..e99f933 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -833,8 +833,36 @@ void viafb_lcd_disable(void)
}
+static void set_lcd_output_path(int set_iga, int output_interface)
+{
+ switch (output_interface) {
+ case INTERFACE_DFP:
+ if ((UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)
+ || (UNICHROME_P4M890 ==
+ viaparinfo->chip_info->gfx_chip_name))
+ viafb_write_reg_mask(CR97, VIACR, 0x84,
+ BIT7 + BIT2 + BIT1 + BIT0);
+ case INTERFACE_DVP0:
+ case INTERFACE_DVP1:
+ case INTERFACE_DFP_HIGH:
+ case INTERFACE_DFP_LOW:
+ if (set_iga == IGA2)
+ viafb_write_reg(CR91, VIACR, 0x00);
+ break;
+ }
+}
+
void viafb_lcd_enable(void)
{
+ viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3);
+ viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3);
+ set_lcd_output_path(viaparinfo->lvds_setting_info->iga_path,
+ viaparinfo->chip_info->lvds_chip_info.output_interface);
+ if (viafb_LCD2_ON)
+ set_lcd_output_path(viaparinfo->lvds_setting_info2->iga_path,
+ viaparinfo->chip_info->
+ lvds_chip_info2.output_interface);
+
if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) {
/* DI1 pad on */
viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30);
--
1.6.3.2
viafb: reduce viafb_set_iga_path usage
The result of viafb_set_iga_path can change after init only in the
hotplug ioctl. So we can move it there rather than doing it always
when a new mode is set. The setup during init is done via a call
from the init chip funtion.
This change enables a stable mapping between the old device scheme
and a new more powerfull one.
Signed-off-by: Florian Tobias Schandinat <[email protected]>
Cc: Joseph Chan <[email protected]>
---
drivers/video/via/hw.c | 1 -
drivers/video/via/ioctl.c | 2 ++
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 4407943..638cf96 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -2313,7 +2313,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
via_write_reg(VIASR, i, VPIT.SR[i - 1]);
viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2);
- viafb_set_iga_path();
/* Write CRTC */
viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, IGA1);
diff --git a/drivers/video/via/ioctl.c b/drivers/video/via/ioctl.c
index da03c07..455b39f 100644
--- a/drivers/video/via/ioctl.c
+++ b/drivers/video/via/ioctl.c
@@ -92,6 +92,7 @@ int viafb_ioctl_hotplug(int hres, int vres, int bpp)
viafb_CRT_ON = 0;
viafb_LCD_ON = 0;
viafb_DeviceStatus = DVI_Device;
+ viafb_set_iga_path();
return viafb_DeviceStatus;
}
status = 1;
@@ -105,6 +106,7 @@ int viafb_ioctl_hotplug(int hres, int vres, int bpp)
viafb_LCD_ON = 0;
viafb_DeviceStatus = CRT_Device;
+ viafb_set_iga_path();
return viafb_DeviceStatus;
}
--
1.6.3.2