From: Stephen Warren <[email protected]>
This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
Such a binding would allow the creation of a "reset subsystem", which
could replace APIs such as the following Tegra-specific API:
void tegra_periph_reset_deassert(struct clk *c);
void tegra_periph_reset_assert(struct clk *c);
(Note that at present, Tegra couples reset assertion with the clock for
the affected peripheral module. However, reset and clocking are two
separate, yet admittedly related, concepts).
Signed-off-by: Stephen Warren <[email protected]>
---
What do people think of this? Does it sound like a good idea to go ahead
with a reset subsystem? Should we simply add a new API to the common clock
subsystem instead (and assume that reset and clock domains match 1:1).
Should this be implemented as part of the generic power management domains;
see include/linux/pm_domain.h instead?
Documentation/devicetree/bindings/reset/reset.txt | 75 +++++++++++++++++++++
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create mode 100644 Documentation/devicetree/bindings/reset/reset.txt
diff --git a/Documentation/devicetree/bindings/reset/reset.txt b/Documentation/devicetree/bindings/reset/reset.txt
new file mode 100644
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+= Reset Signal Device Tree Bindings =
+
+This binding is intended to represent the hardware reset signals present
+internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
+standalone chips are most likely better represented as GPIOs, although there
+are likely to be exceptions to this rule.
+
+Hardware blocks typically receive a reset signal. This signal is generated by
+a reset provider (e.g. power management or clock module) and received by a
+reset consumer (the module being reset, or a module managing when a sub-
+ordinate module is reset). This binding exists to represent the provider and
+consumer, and provide a way to couple the two together.
+
+A reset signal is represented by the phandle of the provider, plus a reset
+specifier - a list of DT cells that represents the reset signal within the
+provider. The length (number of cells) and semantics of the reset specifier
+are dictated by the binding of the reset provider, although common schemes
+are described below.
+
+A word on where to place reset signal consumers in device tree: It is possible
+in hardware for a reset signal to affect multiple logically separate HW blocks
+at once. In this case, it would be unwise to represent this reset signal in
+the DT node of each affected HW block, since if activated, an unrelated block
+may be reset. Instead, reset signals should be represented in the DT node
+where it makes most sense to control it; this may be a bus node if all
+children of the bus are affected by the reset signal, or an individual HW
+block node for dedicated reset signals. The intent of this binding is to give
+appropriate software access to the reset signals in order to manage the HW,
+rather than to slavishly enumerate the reset signal that affects each HW
+block.
+
+= Reset providers =
+
+Required properties:
+#reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
+ with a single reset output and 1 for nodes with multiple
+ reset outputs.
+
+For example:
+
+ rst: reset-controller {
+ #reset-cells = <1>;
+ };
+
+= Reset consumers =
+
+Required properties:
+resets: List of phandle and reset specifier pairs, one pair
+ for each reset signal that affects the device, or that the
+ device manages. Note: if the reset provider specifies '0' for
+ #reset-cells, then only the phandle portion of the pair will
+ appear.
+
+Optional properties:
+reset-names: List of reset signal name strings sorted in the same order as
+ the resets property. Consumers drivers will use reset-names to
+ match reset signal names with reset specifiers.
+
+For example:
+
+ device {
+ resets = <&rst 20>;
+ reset-names = "reset";
+ };
+
+This represents a device with a single reset signal named "reset".
+
+ bus {
+ resets = <&rst 10> <&rst 11> <&rst 12> <&rst 11>;
+ reset-names = "i2s1", "i2s2", "dma", "mixer";
+ };
+
+This represents a bus that controls the reset signal of each of four sub-
+ordinate devices. Consider for example a bus that fails to operate unless no
+child device has reset asserted.
--
1.7.0.4
Quoting Stephen Warren (2012-10-23 14:45:56)
> What do people think of this? Does it sound like a good idea to go ahead
> with a reset subsystem? Should we simply add a new API to the common clock
> subsystem instead (and assume that reset and clock domains match 1:1).
> Should this be implemented as part of the generic power management domains;
> see include/linux/pm_domain.h instead?
>
Hi Stephen,
I'm not sure a "reset subsystem" is necessary, but I also do not like
using clocks as the keys for IP reset. I think it is more common to map
IPs to struct device, no?
And of course for clocks shared by multiple users this will not scale.
Regards,
Mike
On 10/29/2012 12:32 PM, Mike Turquette wrote:
> Quoting Stephen Warren (2012-10-23 14:45:56)
>> What do people think of this? Does it sound like a good idea to go ahead
>> with a reset subsystem? Should we simply add a new API to the common clock
>> subsystem instead (and assume that reset and clock domains match 1:1).
>> Should this be implemented as part of the generic power management domains;
>> see include/linux/pm_domain.h instead?
>>
>
> Hi Stephen,
>
> I'm not sure a "reset subsystem" is necessary, but I also do not like
> using clocks as the keys for IP reset.
I'm not sure what you're suggesting as an alternative to a reset
subsystem (or API if you want something that sounds smaller!) :-)
> I think it is more common to map IPs to struct device, no?
It is indeed probably common that there's a 1:1 mapping between IP
blocks and struct device. However, I'm sure there are plenty of
counter-examples; IP blocks with multiple reset domains (hence struct
devices that encompass multiple reset domains, or reset domains that
encompass multiple struct devices), just as there are many examples of
non-1:1 mappings between struct device and struct clk.
Even ignoring that, we'd still need to API say device_reset(struct
device *dev) or device_reset(struct device *dev, const char *conid)
wouldn't we? That's really all I meant by a reset subsystem.
An alternative here would be to simply move Tegra's
tegra_periph_reset_{de,}assert() function prototypes into a header in
include/linux rather than mach-tegra/include/mach. However, I imagine at
least some other SoC needs a similar API, so a common API might be useful?
On 10/31/2012 04:32 AM, Mike Turquette wrote:
> Quoting Stephen Warren (2012-10-30 11:02:05)
>> On 10/29/2012 12:32 PM, Mike Turquette wrote:
>>> Quoting Stephen Warren (2012-10-23 14:45:56)
>>>> What do people think of this? Does it sound like a good idea to go ahead
>>>> with a reset subsystem? Should we simply add a new API to the common clock
>>>> subsystem instead (and assume that reset and clock domains match 1:1).
>>>> Should this be implemented as part of the generic power management domains;
>>>> see include/linux/pm_domain.h instead?
>>>>
>>>
>>> Hi Stephen,
>>>
>>> I'm not sure a "reset subsystem" is necessary, but I also do not like
>>> using clocks as the keys for IP reset.
>>
>> I'm not sure what you're suggesting as an alternative to a reset
>> subsystem (or API if you want something that sounds smaller!) :-)
>
> My point was that I do not know if a new subsystem is necessary or not.
> Your suggestion to "simply add a new API to the common clock subsystem"
> is an example of an alternative to a whole new subsystem. However I
> instinctively feel that the clock api is not the right place for
> reseting devices.
driver/base/power is about the only related place I can think of given a
quick look. However, in a similar way to clocks, I don't think there's
necessarily a 1:1 relationship between power domains and reset domains
either, so driver/base/power doesn't feel like a good fit in just the
same way that drivers/clk doesn't.
I wonder if a drivers/base/reset/ or drivers/base/reset.c would be
appropriate?
>>> I think it is more common to map IPs to struct device, no?
>>
>> It is indeed probably common that there's a 1:1 mapping between IP
>> blocks and struct device. However, I'm sure there are plenty of
>> counter-examples; IP blocks with multiple reset domains (hence struct
>> devices that encompass multiple reset domains, or reset domains that
>> encompass multiple struct devices), just as there are many examples of
>> non-1:1 mappings between struct device and struct clk.
>
> In OMAP code we handle IP resets through the hwmod code and I prefer
> that IP-centric approach to associating IP resets with a clock node.
> Perhaps the hwmod approach could serve as inspiration for a new generic
> way to reset modules.
OK, I'm not even slightly familiar with the hwmod code, but I keep
hearing about it, so I'll go take a quick look.