RvR test is not good when ANT control bit is not set so
enable ANT diversity only when ANT control bit is set.
Signed-off-by: Bala Shanmugam <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 22 +++++++++++++++++-----
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 ++
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 189aeb2..d2e44c3 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3630,15 +3630,21 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
regval &= (~AR_ANT_DIV_CTRL_ALL);
regval |= (value & 0x3f) << AR_ANT_DIV_CTRL_ALL_S;
- /* enable_lnadiv */
- regval &= (~AR_PHY_ANT_DIV_LNADIV);
- regval |= ((value >> 6) & 0x1) << AR_PHY_ANT_DIV_LNADIV_S;
+
+ if (AR_SREV_9485(ah)) {
+ /* enable_lnadiv */
+ regval &= (~AR_PHY_ANT_DIV_LNADIV);
+ regval |= ((value >> 6) & 0x1) <<
+ AR_PHY_ANT_DIV_LNADIV_S;
+ }
if (AR_SREV_9565(ah)) {
- if (ah->shared_chain_lnadiv) {
+ if (ah->shared_chain_lnadiv &&
+ (value & AR_EEP_ANT_DIV_ENABLE)) {
+ regval |= AR_ANT_DIV_ENABLE;
regval |= (1 << AR_PHY_ANT_SW_RX_PROT_S);
} else {
- regval &= ~(1 << AR_PHY_ANT_DIV_LNADIV_S);
+ regval &= ~AR_ANT_DIV_ENABLE;
regval &= ~(1 << AR_PHY_ANT_SW_RX_PROT_S);
}
}
@@ -3649,6 +3655,12 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
regval = REG_READ(ah, AR_PHY_CCK_DETECT);
regval &= (~AR_FAST_DIV_ENABLE);
regval |= ((value >> 7) & 0x1) << AR_FAST_DIV_ENABLE_S;
+ if (ah->shared_chain_lnadiv &&
+ (AR_SREV_9485(ah) || (AR_SREV_9565(ah) &&
+ (value & AR_EEP_FAST_DIV_ENABLE))))
+ regval |= AR_FAST_DIV_ENABLE;
+ else
+ regval &= ~AR_FAST_DIV_ENABLE;
REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);
if (pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) {
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 9a48e3d..ecf5cc7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -299,6 +299,8 @@
#define AR_PHY_ANT_DIV_LNA2 0x1
#define AR_PHY_ANT_DIV_LNA1 0x2
#define AR_PHY_ANT_DIV_LNA1_PLUS_LNA2 0x3
+#define AR_EEP_ANT_DIV_ENABLE 0x80
+#define AR_EEP_FAST_DIV_ENABLE 0x40
#define AR_PHY_EXTCHN_PWRTHR1 (AR_AGC_BASE + 0x2c)
#define AR_PHY_EXT_CHN_WIN (AR_AGC_BASE + 0x30)
--
1.7.4.1
When LNA diversity shared chain is enabled set force
WLAN LNA diversity on bit and enable fast diversity m2flag
for AR9565.
Signed-off-by: Bala Shanmugam <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index d2e44c3..105390a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3643,9 +3643,20 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
(value & AR_EEP_ANT_DIV_ENABLE)) {
regval |= AR_ANT_DIV_ENABLE;
regval |= (1 << AR_PHY_ANT_SW_RX_PROT_S);
+ if (is2ghz) {
+ REG_SET_BIT(ah,
+ AR_PHY_RESTART,
+ AR_PHY_RESTART_ENABLE_DIV_M2FLAG);
+ }
+ REG_SET_BIT(ah,
+ AR_BTCOEX_WL_LNADIV,
+ AR_BTCOEX_WL_LNADIV_FORCE_ON);
} else {
regval &= ~AR_ANT_DIV_ENABLE;
regval &= ~(1 << AR_PHY_ANT_SW_RX_PROT_S);
+ REG_CLR_BIT(ah,
+ AR_BTCOEX_WL_LNADIV,
+ AR_BTCOEX_WL_LNADIV_FORCE_ON);
}
}
--
1.7.4.1
Restore main to LNA1 and ALT to LNA2 for AR9565 only
when shared LNA diversity is not enabled.
Signed-off-by: Bala Shanmugam <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 105390a..672530c 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3674,7 +3674,10 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
regval &= ~AR_FAST_DIV_ENABLE;
REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);
- if (pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) {
+ if ((AR_SREV_9485_11(ah) &&
+ pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) ||
+ (AR_SREV_9565(ah) &&
+ !ah->shared_chain_lnadiv)) {
regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
/*
* clear bits 25-30 main_lnaconf, alt_lnaconf,
--
1.7.4.1
> When LNA diversity shared chain is enabled set force
> WLAN LNA diversity on bit and enable fast diversity m2flag
> for AR9565.
>
> Signed-off-by: Bala Shanmugam <[email protected]>
> ---
> drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 11 +++++++++++
> 1 files changed, 11 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
> index d2e44c3..105390a 100644
> --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
> +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
> @@ -3643,9 +3643,20 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
> (value & AR_EEP_ANT_DIV_ENABLE)) {
> regval |= AR_ANT_DIV_ENABLE;
> regval |= (1 << AR_PHY_ANT_SW_RX_PROT_S);
> + if (is2ghz) {
> + REG_SET_BIT(ah,
> + AR_PHY_RESTART,
> + AR_PHY_RESTART_ENABLE_DIV_M2FLAG);
> + }
> + REG_SET_BIT(ah,
> + AR_BTCOEX_WL_LNADIV,
> + AR_BTCOEX_WL_LNADIV_FORCE_ON);
> } else {
> regval &= ~AR_ANT_DIV_ENABLE;
> regval &= ~(1 << AR_PHY_ANT_SW_RX_PROT_S);
> + REG_CLR_BIT(ah,
> + AR_BTCOEX_WL_LNADIV,
> + AR_BTCOEX_WL_LNADIV_FORCE_ON);
NACK. These bits are already taken care in
ar9003_hw_antctrl_shared_chain_lnadiv.
-Rajkumar
> Restore main to LNA1 and ALT to LNA2 for AR9565 only
> when shared LNA diversity is not enabled.
>
> Signed-off-by: Bala Shanmugam <[email protected]>
> ---
> drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 5 ++++-
> 1 files changed, 4 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
> index 105390a..672530c 100644
> --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
> +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
> @@ -3674,7 +3674,10 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
> regval &= ~AR_FAST_DIV_ENABLE;
> REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);
>
> - if (pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) {
> + if ((AR_SREV_9485_11(ah) &&
> + pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) ||
> + (AR_SREV_9565(ah) &&
> + !ah->shared_chain_lnadiv)) {
> regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
> /*
> * clear bits 25-30 main_lnaconf, alt_lnaconf,
This is not needed. Its already taken care, when lna is disabled manually, we clear
everything properly via ath_ant_comb_update()
-Rajkumar