Changes in v3:
- Disallowed mt8192 compatible in isolation
- Added maxItems to clocks
Changes in v2:
- Rebased over next-20240409 (because of merge issue for patch 1)
- Added ufs: prefix to patch 1
- Added forgotten ufs-rx-symbol clock to the binding
This series performs some fixes and cleanups for the MediaTek UFSHCI
controller driver.
In particular, while adding the MT8195 compatible to the mediatek,ufs
binding, I noticed that it was allowing just one clock, completely
ignoring the optional ones, including the crypt-xxx clocks, all of
the optional regulators, and other properties.
Between all the other properties, two are completely useless, as they
are there just to activate features that, on SoCs that don't support
these, won't anyway be activated because of missing clocks or missing
regulators, or missing other properties;
as for the other vendor-specific properties, like ufs-disable-ah8,
ufs-broken-vcc, ufs-pmc-via-fastauto, since the current merge window
is closing, I didn't do extensive research so I've left them in place
but didn't add them to the devicetree binding yet.
The plan is to check those later and eventually give them a removal
treatment, or add them to the bindings in a part two series.
For now, at least, this is already a big improvement.
P.S.: The only SoC having UFSHCI upstream is MT8183, which only has
just one clock, and *nothing else* uses properties, clocks, etc that
were renamed in this cleanup.
Cheers!
AngeloGioacchino Del Regno (8):
scsi: ufs: ufs-mediatek: Remove useless mediatek,ufs-support-va09
property
scsi: ufs: ufs-mediatek: Fix property name for crypt boost voltage
scsi: ufs: ufs-mediatek: Remove useless mediatek,ufs-boost-crypt
property
scsi: ufs: ufs-mediatek: Avoid underscores in crypt clock names
dt-bindings: ufs: mediatek,ufs: Document MT8192 compatible with MT8183
dt-bindings: ufs: mediatek,ufs: Document MT8195 compatible
dt-bindings: ufs: mediatek,ufs: Document additional clocks
dt-bindings: ufs: mediatek,ufs: Document optional dvfsrc/va09
regulators
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 25 ++++-
drivers/ufs/host/ufs-mediatek.c | 91 +++++++++++--------
2 files changed, 76 insertions(+), 40 deletions(-)
--
2.44.0
Change all of crypt_{mux,lp,perf} clock names to crypt-{mux,lp-perf}:
retaining compatibility with the old names is ignored as there is no
user of this driver declaring any of those clocks, and the binding
also doesn't allow these ones at all.
Fixes: 590b0d2372fe ("scsi: ufs-mediatek: Support performance mode for inline encryption engine")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 47f16e6720f4..5db6d27f75af 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -604,15 +604,15 @@ static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
return -ENOMEM;
cfg = host->crypt;
- ret = ufs_mtk_init_host_clk(hba, "crypt_mux", &cfg->clk_crypt_mux);
+ ret = ufs_mtk_init_host_clk(hba, "crypt-mux", &cfg->clk_crypt_mux);
if (ret)
goto out;
- ret = ufs_mtk_init_host_clk(hba, "crypt_lp", &cfg->clk_crypt_lp);
+ ret = ufs_mtk_init_host_clk(hba, "crypt-lp", &cfg->clk_crypt_lp);
if (ret)
goto out;
- ret = ufs_mtk_init_host_clk(hba, "crypt_perf", &cfg->clk_crypt_perf);
+ ret = ufs_mtk_init_host_clk(hba, "crypt-perf", &cfg->clk_crypt_perf);
if (ret)
goto out;
--
2.44.0
Remove checking the mediatek,ufs-support-va09 property to decide
whether to try to support the VA09 regulator handling and change
the ufs_mtk_init_va09_pwr_ctrl() function to make it call
devm_regulator_get_optional(): if the regulator is present, then
we set the UFS_MTK_CAP_VA09_PWR_CTRL, effectively enabling the
handling of the VA09 regulator based on that.
Also, make sure to pass the return value of the call to
devm_regulator_get_optional() to the probe function, so that
if it returns a probe deferral, the appropriate action will be
taken.
While at it, remove the error print (disguised as info...) when
the va09 regulator was not found.
Fixes: ac8c2459091c ("scsi: ufs-mediatek: Decouple features from platform bindings")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 34 +++++++++++++++++++++++----------
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 0b0c923b1d7b..e4643ac49033 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -622,27 +622,38 @@ static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
return;
}
-static void ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
+static int ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+ int ret;
- host->reg_va09 = regulator_get(hba->dev, "va09");
- if (IS_ERR(host->reg_va09))
- dev_info(hba->dev, "failed to get va09");
- else
- host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL;
+ host->reg_va09 = devm_regulator_get_optional(hba->dev, "va09");
+ if (IS_ERR(host->reg_va09)) {
+ ret = PTR_ERR(host->reg_va09);
+
+ /* Return an error only if this is a deferral */
+ if (ret == -EPROBE_DEFER)
+ return ret;
+
+ return 0;
+ }
+
+ host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL;
+ return 0;
}
-static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
+static int ufs_mtk_init_host_caps(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct device_node *np = hba->dev->of_node;
+ int ret;
if (of_property_read_bool(np, "mediatek,ufs-boost-crypt"))
ufs_mtk_init_boost_crypt(hba);
- if (of_property_read_bool(np, "mediatek,ufs-support-va09"))
- ufs_mtk_init_va09_pwr_ctrl(hba);
+ ret = ufs_mtk_init_va09_pwr_ctrl(hba);
+ if (ret)
+ return ret;
if (of_property_read_bool(np, "mediatek,ufs-disable-ah8"))
host->caps |= UFS_MTK_CAP_DISABLE_AH8;
@@ -663,6 +674,7 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
host->caps |= UFS_MTK_CAP_RTFF_MTCMOS;
dev_info(hba->dev, "caps: 0x%x", host->caps);
+ return 0;
}
static void ufs_mtk_scale_perf(struct ufs_hba *hba, bool scale_up)
@@ -985,7 +997,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
}
/* Initialize host capability */
- ufs_mtk_init_host_caps(hba);
+ err = ufs_mtk_init_host_caps(hba);
+ if (err)
+ goto out;
ufs_mtk_init_mcq_irq(hba);
--
2.44.0
Rename "boost-crypt-vcore-min" to "mediatek,boost-crypt-microvolt":
this is a vendor specific property and needs the "mediatek," prefix,
moreover, this is not defining a minimum voltage per-se;
Even if technically a call to regulator_set_voltage() does indeed
internally set a VMIN for a regulator, the API also supports other
calls to set VMIN-VMAX constraints, so this "vcore-min"->"microvolt"
rename is performed in order to avoid confusion, other than adding
the "microvolt" suffix to it (as this does take microvolts!).
Fixes: 590b0d2372fe ("scsi: ufs-mediatek: Support performance mode for inline encryption engine")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index e4643ac49033..688d85909ad6 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -595,9 +595,9 @@ static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
goto disable_caps;
}
- if (of_property_read_u32(dev->of_node, "boost-crypt-vcore-min",
+ if (of_property_read_u32(dev->of_node, "mediatek,boost-crypt-microvolt",
&volt)) {
- dev_info(dev, "failed to get boost-crypt-vcore-min");
+ dev_info(dev, "failed to get mediatek,boost-crypt-microvolt");
goto disable_caps;
}
--
2.44.0
Add the new mediatek,mt8195-ufshci string.
This SoC's UFSHCI controller is compatible with MT8183.
Acked-by: Conor Dooley <[email protected]>
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 2f4b0a40bd5e..92d7e48d5d6d 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -17,6 +17,7 @@ properties:
items:
- enum:
- mediatek,mt8192-ufshci
+ - mediatek,mt8195-ufshci
- const: mediatek,mt8183-ufshci
clocks:
--
2.44.0
There is no need to have a property that activates the inline crypto
boost feature, as this needs many things: a regulator, three clocks,
and the mediatek,boost-crypt-microvolt property to be set.
If any one of these is missing, the feature won't be activated,
hence, it is useless to have yet one more property to enable that.
While at it, also address another two issues:
1. Give back the return value to the caller and make sure to fail
probing if we get an -EPROBE_DEFER or -ENOMEM; and
2. Free the ufs_mtk_crypt_cfg structure allocated in the crypto
boost function if said functionality could not be enabled because
it's not supported, as that'd be only wasted memory.
Last but not least, move the devm_kzalloc() call for ufs_mtk_crypt_cfg
to after getting the dvfsrc-vcore regulator and the boost microvolt
property, as if those fail there's no reason to even allocate that.
Fixes: ac8c2459091c ("scsi: ufs-mediatek: Decouple features from platform bindings")
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
drivers/ufs/host/ufs-mediatek.c | 55 ++++++++++++++++++---------------
1 file changed, 30 insertions(+), 25 deletions(-)
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 688d85909ad6..47f16e6720f4 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -575,51 +575,55 @@ static int ufs_mtk_init_host_clk(struct ufs_hba *hba, const char *name,
return ret;
}
-static void ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
+static int ufs_mtk_init_boost_crypt(struct ufs_hba *hba)
{
struct ufs_mtk_host *host = ufshcd_get_variant(hba);
struct ufs_mtk_crypt_cfg *cfg;
struct device *dev = hba->dev;
struct regulator *reg;
u32 volt;
-
- host->crypt = devm_kzalloc(dev, sizeof(*(host->crypt)),
- GFP_KERNEL);
- if (!host->crypt)
- goto disable_caps;
+ int ret;
reg = devm_regulator_get_optional(dev, "dvfsrc-vcore");
if (IS_ERR(reg)) {
- dev_info(dev, "failed to get dvfsrc-vcore: %ld",
- PTR_ERR(reg));
- goto disable_caps;
+ ret = PTR_ERR(reg);
+ if (ret == -EPROBE_DEFER)
+ return ret;
+
+ return 0;
}
- if (of_property_read_u32(dev->of_node, "mediatek,boost-crypt-microvolt",
- &volt)) {
+ ret = of_property_read_u32(dev->of_node, "mediatek,boost-crypt-microvolt", &volt);
+ if (ret) {
dev_info(dev, "failed to get mediatek,boost-crypt-microvolt");
- goto disable_caps;
+ return 0;
}
+ host->crypt = devm_kzalloc(dev, sizeof(*host->crypt), GFP_KERNEL);
+ if (!host->crypt)
+ return -ENOMEM;
+
cfg = host->crypt;
- if (ufs_mtk_init_host_clk(hba, "crypt_mux",
- &cfg->clk_crypt_mux))
- goto disable_caps;
+ ret = ufs_mtk_init_host_clk(hba, "crypt_mux", &cfg->clk_crypt_mux);
+ if (ret)
+ goto out;
- if (ufs_mtk_init_host_clk(hba, "crypt_lp",
- &cfg->clk_crypt_lp))
- goto disable_caps;
+ ret = ufs_mtk_init_host_clk(hba, "crypt_lp", &cfg->clk_crypt_lp);
+ if (ret)
+ goto out;
- if (ufs_mtk_init_host_clk(hba, "crypt_perf",
- &cfg->clk_crypt_perf))
- goto disable_caps;
+ ret = ufs_mtk_init_host_clk(hba, "crypt_perf", &cfg->clk_crypt_perf);
+ if (ret)
+ goto out;
cfg->reg_vcore = reg;
cfg->vcore_volt = volt;
host->caps |= UFS_MTK_CAP_BOOST_CRYPT_ENGINE;
-disable_caps:
- return;
+out:
+ if (ret)
+ devm_kfree(dev, host->crypt);
+ return 0;
}
static int ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
@@ -648,8 +652,9 @@ static int ufs_mtk_init_host_caps(struct ufs_hba *hba)
struct device_node *np = hba->dev->of_node;
int ret;
- if (of_property_read_bool(np, "mediatek,ufs-boost-crypt"))
- ufs_mtk_init_boost_crypt(hba);
+ ret = ufs_mtk_init_boost_crypt(hba);
+ if (ret)
+ return ret;
ret = ufs_mtk_init_va09_pwr_ctrl(hba);
if (ret)
--
2.44.0
Add additional clocks, used on all MediaTek SoCs' UFSHCI controllers:
some of these clocks are optional and used only for scaling purposes
to save power, or to improve performance in the case of the crypt
clocks.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 92d7e48d5d6d..4df2358d440e 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -21,11 +21,24 @@ properties:
- const: mediatek,mt8183-ufshci
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 12
clock-names:
+ minItems: 1
items:
- const: ufs
+ - const: ufs-aes
+ - const: ufs-tick
+ - const: unipro-sys
+ - const: unipro-tick
+ - const: ufs-sap
+ - const: ufs-tx-symbol
+ - const: ufs-rx-symbol
+ - const: ufs-mem
+ - const: crypt-mux
+ - const: crypt-lp
+ - const: crypt-perf
phys:
maxItems: 1
--
2.44.0
Document the optional dvfsrc-vcore and va09 regulators used for,
respectively, crypt boost and internal MPHY power management in
when powering on/off the (external) MediaTek UFS PHY.
Acked-by: Conor Dooley <[email protected]>
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 4df2358d440e..4d42c44da061 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -46,6 +46,8 @@ properties:
reg:
maxItems: 1
+ dvfsrc-vcore-supply: true
+ va09-supply: true
vcc-supply: true
required:
--
2.44.0
The MT8192 UFS controller is compatible with the MT8183 one:
document this by allowing to assign both compatible strings
"mediatek,mt8192-ufshci", "mediatek,mt8183-ufshci" to the UFSHCI node.
Moreover, since no MT8192 devicetree ever declared any UFSHCI node,
disallow specifying only the MT8192 compatible.
In preparation for adding MT8195 to the mix, the MT8192 compatible
was added as enum instead of const.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
index 32fd535a514a..2f4b0a40bd5e 100644
--- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -14,9 +14,10 @@ allOf:
properties:
compatible:
- enum:
- - mediatek,mt8183-ufshci
- - mediatek,mt8192-ufshci
+ items:
+ - enum:
+ - mediatek,mt8192-ufshci
+ - const: mediatek,mt8183-ufshci
clocks:
maxItems: 1
--
2.44.0
On Mon, 2024-04-15 at 09:53 +0200, AngeloGioacchino Del Regno wrote:
> Remove checking the mediatek,ufs-support-va09 property to decide
> whether to try to support the VA09 regulator handling and change
> the ufs_mtk_init_va09_pwr_ctrl() function to make it call
> devm_regulator_get_optional(): if the regulator is present, then
> we set the UFS_MTK_CAP_VA09_PWR_CTRL, effectively enabling the
> handling of the VA09 regulator based on that.
>
> Also, make sure to pass the return value of the call to
> devm_regulator_get_optional() to the probe function, so that
> if it returns a probe deferral, the appropriate action will be
> taken.
>
> While at it, remove the error print (disguised as info...) when
> the va09 regulator was not found.
>
> Fixes: ac8c2459091c ("scsi: ufs-mediatek: Decouple features from
> platform bindings")
> Signed-off-by: AngeloGioacchino Del Regno <
> [email protected]>
> ---
> drivers/ufs/host/ufs-mediatek.c | 34 +++++++++++++++++++++++------
> ----
> 1 file changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-
> mediatek.c
> index 0b0c923b1d7b..e4643ac49033 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -622,27 +622,38 @@ static void ufs_mtk_init_boost_crypt(struct
> ufs_hba *hba)
> return;
> }
>
> -static void ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
> +static int ufs_mtk_init_va09_pwr_ctrl(struct ufs_hba *hba)
> {
> struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> + int ret;
>
> - host->reg_va09 = regulator_get(hba->dev, "va09");
> - if (IS_ERR(host->reg_va09))
> - dev_info(hba->dev, "failed to get va09");
> - else
> - host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL;
> + host->reg_va09 = devm_regulator_get_optional(hba->dev, "va09");
>
Hi Angelo,
Mediatek may have pmic va09 but is not used by ufs.
The real va09 use module will have abnormal behavior if ufs control his
power.
Thanks.
Peter
> + if (IS_ERR(host->reg_va09)) {
> + ret = PTR_ERR(host->reg_va09);
> +
> + /* Return an error only if this is a deferral */
> + if (ret == -EPROBE_DEFER)
> + return ret;
> +
> + return 0;
> + }
> +
> + host->caps |= UFS_MTK_CAP_VA09_PWR_CTRL;
> + return 0;
> }
>
> -static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
> +static int ufs_mtk_init_host_caps(struct ufs_hba *hba)
> {
> struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> struct device_node *np = hba->dev->of_node;
> + int ret;
>
> if (of_property_read_bool(np, "mediatek,ufs-boost-crypt"))
> ufs_mtk_init_boost_crypt(hba);
>
> - if (of_property_read_bool(np, "mediatek,ufs-support-va09"))
> - ufs_mtk_init_va09_pwr_ctrl(hba);
> + ret = ufs_mtk_init_va09_pwr_ctrl(hba);
> + if (ret)
> + return ret;
>
> if (of_property_read_bool(np, "mediatek,ufs-disable-ah8"))
> host->caps |= UFS_MTK_CAP_DISABLE_AH8;
> @@ -663,6 +674,7 @@ static void ufs_mtk_init_host_caps(struct ufs_hba
> *hba)
> host->caps |= UFS_MTK_CAP_RTFF_MTCMOS;
>
> dev_info(hba->dev, "caps: 0x%x", host->caps);
> + return 0;
> }
>
> static void ufs_mtk_scale_perf(struct ufs_hba *hba, bool scale_up)
> @@ -985,7 +997,9 @@ static int ufs_mtk_init(struct ufs_hba *hba)
> }
>
> /* Initialize host capability */
> - ufs_mtk_init_host_caps(hba);
> + err = ufs_mtk_init_host_caps(hba);
> + if (err)
> + goto out;
>
> ufs_mtk_init_mcq_irq(hba);
>
On Mon, 15 Apr 2024 09:54:03 +0200, AngeloGioacchino Del Regno wrote:
> The MT8192 UFS controller is compatible with the MT8183 one:
> document this by allowing to assign both compatible strings
> "mediatek,mt8192-ufshci", "mediatek,mt8183-ufshci" to the UFSHCI node.
>
> Moreover, since no MT8192 devicetree ever declared any UFSHCI node,
> disallow specifying only the MT8192 compatible.
>
> In preparation for adding MT8195 to the mix, the MT8192 compatible
> was added as enum instead of const.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/mediatek,ufs.example.dtb: ufs@ff3c0000: compatible:0: 'mediatek,mt8183-ufshci' is not one of ['mediatek,mt8192-ufshci']
from schema $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/mediatek,ufs.example.dtb: ufs@ff3c0000: compatible: ['mediatek,mt8183-ufshci'] is too short
from schema $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/mediatek,ufs.example.dtb: ufs@ff3c0000: Unevaluated properties are not allowed ('compatible' was unexpected)
from schema $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On Mon, 15 Apr 2024 09:54:04 +0200, AngeloGioacchino Del Regno wrote:
> Add the new mediatek,mt8195-ufshci string.
> This SoC's UFSHCI controller is compatible with MT8183.
>
> Acked-by: Conor Dooley <[email protected]>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/mediatek,ufs.example.dtb: ufs@ff3c0000: compatible:0: 'mediatek,mt8183-ufshci' is not one of ['mediatek,mt8192-ufshci', 'mediatek,mt8195-ufshci']
from schema $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/[email protected]
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.