2023-07-03 18:10:01

by Sricharan Ramabadhran

Subject: [PATCH V2] PCI: qcom: Use PARF_SLV_ADDR_SPACE_SIZE for ops_2_3_3

PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
2_3_3 post_init ops. pcie slave addr size was initially set
to 0x358, but was wrongly changed to 0x168 as a part of
"PCI: qcom: Remove PCIE20_ prefix from register definitions"
Fixing it, by using the right macro PARF_SLV_ADDR_SPACE_SIZE
and removing the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.

Without this pcie bring up on IPQ8074 is broken now.

Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
Signed-off-by: Sricharan Ramabadhran <[email protected]>
---
[V2] Fixed the 'fixes tag' correctly, subject, right macro usage

drivers/pci/controller/dwc/pcie-qcom.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 4ab30892f6ef..1689d072fe86 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -43,7 +43,6 @@
#define PARF_PHY_REFCLK 0x4c
#define PARF_CONFIG_BITS 0x50
#define PARF_DBI_BASE_ADDR 0x168
-#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
#define PARF_MHI_CLOCK_RESET_CTRL 0x174
#define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
#define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
@@ -811,7 +810,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
u32 val;

writel(SLV_ADDR_SPACE_SZ,
- pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
+ pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);

val = readl(pcie->parf + PARF_PHY_CTRL);
val &= ~PHY_TEST_PWR_DOWN;
--
2.34.1

2023-07-04 12:58:05

by Konrad Dybcio

Subject: Re: [PATCH V2] PCI: qcom: Use PARF_SLV_ADDR_SPACE_SIZE for ops_2_3_3

On 3.07.2023 19:57, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
> 2_3_3 post_init ops. pcie slave addr size was initially set
> to 0x358, but was wrongly changed to 0x168 as a part of
> "PCI: qcom: Remove PCIE20_ prefix from register definitions"
> Fixing it, by using the right macro PARF_SLV_ADDR_SPACE_SIZE
> and removing the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
>
> Without this pcie bring up on IPQ8074 is broken now.
>
> Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
> Signed-off-by: Sricharan Ramabadhran <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>

Konrad
> [V2] Fixed the 'fixes tag' correctly, subject, right macro usage
>
> drivers/pci/controller/dwc/pcie-qcom.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 4ab30892f6ef..1689d072fe86 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -43,7 +43,6 @@
> #define PARF_PHY_REFCLK 0x4c
> #define PARF_CONFIG_BITS 0x50
> #define PARF_DBI_BASE_ADDR 0x168
> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
> @@ -811,7 +810,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
> u32 val;
>
> writel(SLV_ADDR_SPACE_SZ,
> - pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
> + pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);
>
> val = readl(pcie->parf + PARF_PHY_CTRL);
> val &= ~PHY_TEST_PWR_DOWN;

2023-07-05 08:55:02

by Manivannan Sadhasivam

Subject: Re: [PATCH V2] PCI: qcom: Use PARF_SLV_ADDR_SPACE_SIZE for ops_2_3_3

On Mon, Jul 03, 2023 at 11:27:57PM +0530, Sricharan Ramabadhran wrote:
> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
> 2_3_3 post_init ops. pcie slave addr size was initially set

PCIe

> to 0x358, but was wrongly changed to 0x168 as a part of

commit 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")

> "PCI: qcom: Remove PCIE20_ prefix from register definitions"
> Fixing it, by using the right macro PARF_SLV_ADDR_SPACE_SIZE
> and removing the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
>

Commit message should be imperative.

> Without this pcie bring up on IPQ8074 is broken now.
>
> Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
> Signed-off-by: Sricharan Ramabadhran <[email protected]>
> ---
> [V2] Fixed the 'fixes tag' correctly, subject, right macro usage
>
> drivers/pci/controller/dwc/pcie-qcom.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 4ab30892f6ef..1689d072fe86 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -43,7 +43,6 @@
> #define PARF_PHY_REFCLK 0x4c
> #define PARF_CONFIG_BITS 0x50
> #define PARF_DBI_BASE_ADDR 0x168
> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
> @@ -811,7 +810,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
> u32 val;
>
> writel(SLV_ADDR_SPACE_SZ,
> - pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
> + pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);

This could be wrapped in the above line itself.

- Mani

>
> val = readl(pcie->parf + PARF_PHY_CTRL);
> val &= ~PHY_TEST_PWR_DOWN;
> --
> 2.34.1
>

--
மணிவண்ணன் சதாசிவம்

2023-07-06 06:12:28

by Sricharan Ramabadhran

Subject: Re: [PATCH V2] PCI: qcom: Use PARF_SLV_ADDR_SPACE_SIZE for ops_2_3_3

On 7/5/2023 2:14 PM, Manivannan Sadhasivam wrote:
> On Mon, Jul 03, 2023 at 11:27:57PM +0530, Sricharan Ramabadhran wrote:
>> PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074
>> 2_3_3 post_init ops. pcie slave addr size was initially set
>
> PCIe
>
>> to 0x358, but was wrongly changed to 0x168 as a part of
>
> commit 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
>

ok.

>> "PCI: qcom: Remove PCIE20_ prefix from register definitions"
>> Fixing it, by using the right macro PARF_SLV_ADDR_SPACE_SIZE
>> and removing the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
>>
>
> Commit message should be imperative.

ok, will send v3.

>
>> Without this pcie bring up on IPQ8074 is broken now.
>>
>> Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
>> Signed-off-by: Sricharan Ramabadhran <[email protected]>
>> ---
>> [V2] Fixed the 'fixes tag' correctly, subject, right macro usage
>>
>> drivers/pci/controller/dwc/pcie-qcom.c | 3 +--
>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 4ab30892f6ef..1689d072fe86 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -43,7 +43,6 @@
>> #define PARF_PHY_REFCLK 0x4c
>> #define PARF_CONFIG_BITS 0x50
>> #define PARF_DBI_BASE_ADDR 0x168
>> -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
>> #define PARF_MHI_CLOCK_RESET_CTRL 0x174
>> #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
>> #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
>> @@ -811,7 +810,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie)
>> u32 val;
>>
>> writel(SLV_ADDR_SPACE_SZ,
>> - pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
>> + pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);
>
> This could be wrapped in the above line itself.

sure, will post v3

Regards,
Sricharan