Hi,
This series adds support for CSI2RX capture support on J7 platforms,
series was tested for CSI2RX capture on OV5640 sensor and RPI camera
v2 IMX219 sensor on J721e Common Processor Board, J721E Starter kit,
J721S2 Common Processor Board, AM68 Starter Kit, J784s4 EVM and AM69
Starter kit.
Test logs:
J721E EVM OV5640 - https://gist.github.com/vaishnavachath/b08521386cfbe1939facf39b8b2d796b
J721S2 EVM OV5640 - https://gist.github.com/vaishnavachath/1b0d60da6b6464cf12334cd5e161a79b
J784s4 EVM OV5640 - https://gist.github.com/vaishnavachath/02b70df94d2d41662eff99f4ce966d67
TDA4VM SK IMX219 - https://gist.github.com/vaishnavachath/64fc6edd6cc060027812bebd6573df07
AM68 SK IMX219 - https://gist.github.com/vaishnavachath/d522254ff5e797bc853e0706fbea932a
AM69 SK IMX219 - https://gist.github.com/vaishnavachath/8dbd960cc89d691886df371c53aac399
Only a single set of overlays for RPI IMX219 is included in the series
for reference and other overlays to test OV5640 can be found here:
https://gist.github.com/vaishnavachath/d0a052106892fe9f3096733931e9ad5f
Patch 7/9 depends on :
https://lore.kernel.org/all/[email protected]/
Thanks and Regards,
Vaishnav
Vaishnav Achath (9):
arm64: dts: ti: k3-j721s2-common-proc-board: Enable camera peripherals
arm64: dts: ti: k3-j784s4-evm: Enable camera peripherals
arm64: dts: ti: k3-am68-sk-base-board: Enable camera peripherals
arm64: dts: ti: k3-am69-sk: Enable camera peripherals
arm64: dts: ti: k3-j721e-sk: Model CSI2RX connector mux
arm64: dts: ti: k3-j721e-main: Add CSI2RX capture nodes
arm64: dts: ti: k3-j721s2-main: Add CSI2RX capture nodes
arm64: dts: ti: k3-j784s4-main: Add CSI2RX capture nodes
arm64: dts: ti: k3-am69-sk: Add overlay for IMX219
arch/arm64/boot/dts/ti/Makefile | 6 +
.../boot/dts/ti/k3-am68-sk-base-board.dts | 50 +++++
.../boot/dts/ti/k3-am69-sk-csi2-imx219.dtso | 124 ++++++++++++
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 51 +++++
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 122 ++++++++++++
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 19 +-
.../dts/ti/k3-j721s2-common-proc-board.dts | 25 +++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 123 +++++++++++-
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 25 +++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 183 +++++++++++++++++-
10 files changed, 724 insertions(+), 4 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
--
2.34.1
CSI cameras are controlled using I2C. On J721S2 Common Processor Board,
this is routed to I2C-5, so enable the instance and the TCA6408
GPIO expander on the bus.
Signed-off-by: Vaishnav Achath <[email protected]>
---
.../dts/ti/k3-j721s2-common-proc-board.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index c6b85bbf9a17..3667aa179306 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -147,6 +147,13 @@ J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */
>;
};
+ main_i2c5_pins_default: main-i2c5-default-pins {
+ pinctrl-single,pins = <
+ J721S2_IOPAD(0x01c, PIN_INPUT, 8) /* (Y24) MCAN15_TX.I2C5_SCL */
+ J721S2_IOPAD(0x018, PIN_INPUT, 8) /* (W23) MCAN14_RX.I2C5_SDA */
+ >;
+ };
+
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
@@ -356,6 +363,24 @@ exp2: gpio@22 {
};
};
+&main_i2c5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c5_pins_default>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ exp5: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0",
+ "CSI2_EXP_A_GPIO1", "CSI2_EXP_A_GPIO2",
+ "CSI2_EXP_B_GPIO1", "CSI2_EXP_B_GPIO2",
+ "CSI2_EXP_B_GPIO3", "CSI2_EXP_B_GPIO4";
+ };
+};
+
&main_sdhci0 {
/* eMMC */
status = "okay";
--
2.34.1
CSI cameras are controlled using I2C. On J784S4 EVM, this is routed
to I2C-5, so enable the instance and the TCA6408 GPIO expander
on the bus.
Signed-off-by: Vaishnav Achath <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 25 ++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index f34b92acc56d..52fd7071ffd7 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -296,6 +296,13 @@ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
>;
};
+ main_i2c5_pins_default: main-i2c5-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x01c, PIN_INPUT, 8) /* (AG34) MCAN15_TX.I2C5_SCL */
+ J784S4_IOPAD(0x018, PIN_INPUT, 8) /* (AK36) MCAN14_RX.I2C5_SDA */
+ >;
+ };
+
main_mmc1_pins_default: main-mmc1-default-pins {
bootph-all;
pinctrl-single,pins = <
@@ -760,6 +767,24 @@ exp2: gpio@22 {
};
};
+&main_i2c5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c5_pins_default>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ exp5: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0",
+ "CSI2_EXP_A_GPIO1", "CSI2_EXP_A_GPIO3",
+ "CSI2_EXP_B_GPIO1", "CSI2_EXP_B_GPIO2",
+ "CSI2_EXP_B_GPIO3", "CSI2_EXP_B_GPIO4";
+ };
+};
+
&main_sdhci0 {
bootph-all;
/* eMMC */
--
2.34.1
CSI cameras are controlled using I2C. On AM68 Starter Kit, this is routed
to I2C-1, so enable the instance and the TCA9543 I2C switch on the bus.
Signed-off-by: Vaishnav Achath <[email protected]>
---
.../boot/dts/ti/k3-am68-sk-base-board.dts | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index d0cfdeac21fb..f0152f0c4f45 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -169,6 +169,13 @@ tfp410_out: endpoint {
};
};
};
+
+ csi_mux: mux-controller {
+ compatible = "gpio-mux";
+ #mux-state-cells = <1>;
+ mux-gpios = <&exp3 1 GPIO_ACTIVE_HIGH>;
+ idle-state = <0>;
+ };
};
&main_pmx0 {
@@ -186,6 +193,13 @@ J721S2_IOPAD(0x0e4, PIN_INPUT, 0) /* (AE24) I2C0_SDA */
>;
};
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ J721S2_IOPAD(0x0ac, PIN_INPUT, 13) /* (AC25) MCASP0_AXR15.I2C1_SCL */
+ J721S2_IOPAD(0x0b0, PIN_INPUT, 13) /* (AD26) MCASP1_AXR3.I2C1_SDA */
+ >;
+ };
+
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
@@ -431,6 +445,42 @@ exp1: gpio@21 {
};
};
+&main_i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c1_pins_default>;
+ status = "okay";
+
+ exp3: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPn",
+ "IO_EXP_CSI2_EXP_RSTz","CSI0_B_GPIO1",
+ "CSI1_B_GPIO1";
+ };
+
+ i2c-mux@70 {
+ compatible = "nxp,pca9543";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x70>;
+
+ cam0_i2c: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ cam1_i2c: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ };
+};
+
&main_i2c4 {
status = "okay";
pinctrl-names = "default";
--
2.34.1
CSI cameras are controlled using I2C. On AM69 Starter Kit, this is routed
to I2C-1, so enable the instance, TCA9543 I2C switch and the TCA6408
GPIO expander on the bus. AM69 SK has the CSI2RX routed to a MIPI CSI
connector and to 22-pin RPi camera connector through an analog mux with
GPIO control, model that so that an overlay can control the mux state
according to connected cameras.
Signed-off-by: Vaishnav Achath <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 51 +++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 8da591579868..9ede9c8de25a 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -321,6 +321,14 @@ tfp410_out: endpoint {
};
};
};
+
+ csi_mux: mux-controller {
+ compatible = "gpio-mux";
+ #mux-state-cells = <1>;
+ mux-gpios = <&exp2 1 GPIO_ACTIVE_HIGH>;
+ idle-state = <0>;
+ };
+
};
&main_pmx0 {
@@ -340,6 +348,13 @@ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
>;
};
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0ac, PIN_INPUT_PULLUP, 13) /* (AE34) MCASP0_AXR15.I2C1_SCL */
+ J784S4_IOPAD(0x0b0, PIN_INPUT_PULLUP, 13) /* (AL33) MCASP1_AXR3.I2C1_SDA */
+ >;
+ };
+
main_mmc1_pins_default: main-mmc1-default-pins {
bootph-all;
pinctrl-single,pins = <
@@ -774,6 +789,42 @@ exp1: gpio@21 {
};
};
+&main_i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c1_pins_default>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ exp2: gpio@21 {
+ compatible = "ti,tca6408";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "CSI_VIO_SEL", "CSI_MUX_SEL_2", "CSI2_RSTz",
+ "IO_EXP_CAM0_GPIO1", "IO_EXP_CAM1_GPIO1";
+ };
+
+ i2c-mux@70 {
+ compatible = "nxp,pca9543";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x70>;
+
+ cam0_i2c: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ cam1_i2c: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ };
+};
+
&main_sdhci0 {
bootph-all;
/* eMMC */
--
2.34.1
J721E SK has the CSI2RX routed to a MIPI CSI connector and to 15-pin
RPi camera connector through an analog mux with GPIO control, model that
so that an overlay can control the mux state according to connected
cameras. Also provide labels to the I2C mux bus instances so that a
generic overlay can be used across multiple platforms.
Signed-off-by: Vaishnav Achath <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 188dfe291a32..4c9c27380d4f 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -286,6 +286,15 @@ tfp410_out: endpoint {
};
};
};
+
+ csi_mux: mux-controller {
+ compatible = "gpio-mux";
+ #mux-state-cells = <1>;
+ mux-gpios = <&main_gpio0 88 GPIO_ACTIVE_HIGH>;
+ idle-state = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_csi_mux_sel_pins_default>;
+ };
};
&main_pmx0 {
@@ -352,6 +361,12 @@ J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
>;
};
+ main_csi_mux_sel_pins_default: main-csi-mux-sel-default-pins {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x164, PIN_OUTPUT, 7) /* (V29) RGMII5_TD2 */
+ >;
+ };
+
dp0_pins_default: dp0-default-pins {
pinctrl-single,pins = <
J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */
@@ -858,14 +873,14 @@ i2c-mux@70 {
reg = <0x70>;
/* CSI0 I2C */
- i2c@0 {
+ cam0_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
/* CSI1 I2C */
- i2c@1 {
+ cam1_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
--
2.34.1
J721E has two CSI2RX capture subsystem featuring Cadence CSI2RX,
DPHY and TI's pixel grabbing wrapper. Add nodes for the same and
keep them disabled by default.
Signed-off-by: Vaishnav Achath <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 122 ++++++++++++++++++++++
1 file changed, 122 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 2569b4c08ffb..9d428d6f8a7f 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -572,6 +572,128 @@ main_timerio_output: pinctrl@104280 {
pinctrl-single,function-mask = <0x0000001f>;
};
+ ti_csi2rx0: ticsi2rx@4500000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_udmap 0x4940>;
+ dma-names = "rx0";
+ reg = <0x0 0x4500000 0x0 0x1000>;
+ power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx0: csi-bridge@4504000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x0 0x4504000 0x0 0x1000>;
+ clocks = <&k3_clks 26 2>, <&k3_clks 26 0>, <&k3_clks 26 2>,
+ <&k3_clks 26 2>, <&k3_clks 26 3>, <&k3_clks 26 3>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy0>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi0_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi0_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi0_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi0_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ ti_csi2rx1: ticsi2rx@4510000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_udmap 0x4960>;
+ dma-names = "rx0";
+ reg = <0x0 0x4510000 0x0 0x1000>;
+ power-domains = <&k3_pds 27 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx1: csi-bridge@4514000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x0 0x4514000 0x0 0x1000>;
+ clocks = <&k3_clks 27 2>, <&k3_clks 27 0>, <&k3_clks 27 2>,
+ <&k3_clks 27 2>, <&k3_clks 27 3>, <&k3_clks 27 3>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy1>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi1_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi1_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi1_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi1_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ dphy0: phy@4580000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x0 0x4580000 0x0 0x1100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ dphy1: phy@4590000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x0 0x4590000 0x0 0x1100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
serdes_wiz0: wiz@5000000 {
compatible = "ti,j721e-wiz-16g";
#address-cells = <1>;
--
2.34.1
J784S4 has three CSI2RX capture subsystem featuring Cadence CSI2RX,
DPHY and TI's pixel grabbing wrapper. Add nodes for the same and
keep them disabled by default. J784S4 uses a dedicated BCDMA instance
for CSI-RX traffic, so enable that as well.
Signed-off-by: Vaishnav Achath <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 183 ++++++++++++++++++++-
1 file changed, 182 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index f2b720ed1e4f..aa890eb456f5 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -662,6 +662,188 @@ main_i2c6: i2c@2060000 {
status = "disabled";
};
+ ti_csi2rx0: ticsi2rx@4500000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_bcdma_csi 0 0x4940 0>;
+ dma-names = "rx0";
+ reg = <0x00 0x04500000 0x00 0x00001000>;
+ power-domains = <&k3_pds 72 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx0: csi-bridge@4504000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x00 0x04504000 0x00 0x00001000>;
+ clocks = <&k3_clks 72 2>, <&k3_clks 72 0>, <&k3_clks 72 2>,
+ <&k3_clks 72 2>, <&k3_clks 72 3>, <&k3_clks 72 3>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy0>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi0_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi0_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi0_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi0_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ ti_csi2rx1: ticsi2rx@4510000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_bcdma_csi 0 0x4960 0>;
+ dma-names = "rx0";
+ reg = <0x00 0x04510000 0x00 0x1000>;
+ power-domains = <&k3_pds 73 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx1: csi-bridge@4514000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x00 0x04514000 0x00 0x00001000>;
+ clocks = <&k3_clks 73 2>, <&k3_clks 73 0>, <&k3_clks 73 2>,
+ <&k3_clks 73 2>, <&k3_clks 73 3>, <&k3_clks 73 3>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy1>;
+ phy-names = "dphy";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi1_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi1_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi1_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi1_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ ti_csi2rx2: ticsi2rx@4520000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_bcdma_csi 0 0x4980 0>;
+ dma-names = "rx0";
+ reg = <0x00 0x04520000 0x00 0x00001000>;
+ power-domains = <&k3_pds 74 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx2: csi-bridge@4524000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x00 0x04524000 0x00 0x00001000>;
+ clocks = <&k3_clks 74 2>, <&k3_clks 74 0>, <&k3_clks 74 2>,
+ <&k3_clks 74 2>, <&k3_clks 74 3>, <&k3_clks 74 3>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy2>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi2_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi2_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi2_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi2_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi2_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ dphy0: phy@4580000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x00 0x04580000 0x00 0x00001100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 212 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ dphy1: phy@4590000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x00 0x04590000 0x00 0x00001100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 213 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ dphy2: phy@45a0000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x00 0x045a0000 0x00 0x00001100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 214 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
main_sdhci0: mmc@4f80000 {
compatible = "ti,j721e-sdhci-8bit";
reg = <0x00 0x04f80000 0x00 0x1000>,
@@ -1224,7 +1406,6 @@ main_bcdma_csi: dma-controller@311a0000 {
ti,sci-dev-id = <281>;
ti,sci-rm-range-rchan = <0x21>;
ti,sci-rm-range-tchan = <0x22>;
- status = "disabled";
};
cpts@310d0000 {
--
2.34.1
J721S2 has two CSI2RX capture subsystem featuring Cadence CSI2RX,
DPHY and TI's pixel grabbing wrapper. Add nodes for the same and
keep them disabled by default. J721S2 uses a dedicated BCDMA instance
for CSI-RX traffic, so enable that as well.
Signed-off-by: Vaishnav Achath <[email protected]>
---
Depends on https://lore.kernel.org/all/[email protected]/
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 123 ++++++++++++++++++++-
1 file changed, 122 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index ea7f2b2ab165..f9f9ffffb0a7 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1122,7 +1122,6 @@ main_bcdma_csi: dma-controller@311a0000 {
ti,sci-dev-id = <225>;
ti,sci-rm-range-rchan = <0x21>;
ti,sci-rm-range-tchan = <0x22>;
- status = "disabled";
};
cpts@310d0000 {
@@ -1233,6 +1232,128 @@ usb0: usb@6000000 {
};
};
+ ti_csi2rx0: ticsi2rx@4500000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_bcdma_csi 0 0x4940 0>;
+ dma-names = "rx0";
+ reg = <0x00 0x04500000 0x00 0x1000>;
+ power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx0: csi-bridge@4504000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x00 0x04504000 0x00 0x1000>;
+ clocks = <&k3_clks 38 3>, <&k3_clks 38 1>, <&k3_clks 38 3>,
+ <&k3_clks 38 3>, <&k3_clks 38 4>, <&k3_clks 38 4>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy0>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi0_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi0_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi0_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi0_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ ti_csi2rx1: ticsi2rx@4510000 {
+ compatible = "ti,j721e-csi2rx-shim";
+ dmas = <&main_bcdma_csi 0 0x4960 0>;
+ dma-names = "rx0";
+ reg = <0x00 0x04510000 0x00 0x1000>;
+ power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ cdns_csi2rx1: csi-bridge@4514000 {
+ compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+ reg = <0x00 0x04514000 0x00 0x1000>;
+ clocks = <&k3_clks 39 3>, <&k3_clks 39 1>, <&k3_clks 39 3>,
+ <&k3_clks 39 3>, <&k3_clks 39 4>, <&k3_clks 39 4>;
+ clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+ "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+ phys = <&dphy1>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
+ };
+
+ csi1_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ csi1_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ csi1_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ csi1_port4: port@4 {
+ reg = <4>;
+ status = "disabled";
+ };
+ };
+ };
+ };
+
+ dphy0: phy@4580000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x00 0x04580000 0x00 0x1100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ dphy1: phy@4590000 {
+ compatible = "cdns,dphy-rx";
+ reg = <0x00 0x04590000 0x00 0x1100>;
+ #phy-cells = <0>;
+ power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
serdes_wiz0: wiz@5060000 {
compatible = "ti,j721s2-wiz-10g";
#address-cells = <1>;
--
2.34.1
RPi v2 Camera (IMX219) is an 8MP camera that can be used with SK-AM69
through the 22-pin CSI-RX connector.
Same overlay can be used across AM68 SK, TDA4VM SK boards that have a
15/22-pin FFC connector. Also enable build testing and symbols for
all the three platforms.
Signed-off-by: Vaishnav Achath <[email protected]>
---
arch/arm64/boot/dts/ti/Makefile | 6 +
.../boot/dts/ti/k3-am69-sk-csi2-imx219.dtso | 124 ++++++++++++++++++
2 files changed, 130 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 52c1dc910308..9fc8d68f7d26 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
# Boards with J784s4 SoC
dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-csi2-imx219.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
# Build time test only, enabled by CONFIG_OF_ALL_DTBS
@@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo
k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \
k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo
+k3-am69-sk-csi2-imx219-dtbs := k3-am69-sk.dtb \
+ k3-am69-sk-csi2-imx219.dtbo
k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
k3-j721e-evm-pcie0-ep.dtbo
k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
@@ -130,5 +133,8 @@ DTC_FLAGS_k3-am62-lp-sk += -@
DTC_FLAGS_k3-am62a7-sk += -@
DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@
DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
+DTC_FLAGS_k3-am68-sk-base-board += -@
+DTC_FLAGS_k3-am69-sk += -@
DTC_FLAGS_k3-j721e-common-proc-board += -@
DTC_FLAGS_k3-j721s2-common-proc-board += -@
+DTC_FLAGS_k3-j721e-sk += -@
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
new file mode 100644
index 000000000000..4cd1d8d5004a
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * DT Overlay for RPi Camera V2.1 (Sony IMX219) interfaced with CSI2 on AM68-SK board.
+ * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+ clk_imx219_fixed: imx219-xclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+};
+
+&csi_mux {
+ idle-state = <1>;
+};
+
+/* CAM0 I2C */
+&cam0_i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ imx219_0: imx219_0@10 {
+ compatible = "sony,imx219";
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
+ clock-names = "xclk";
+
+ port {
+ csi2_cam0: endpoint {
+ remote-endpoint = <&csi2rx0_in_sensor>;
+ link-frequencies = /bits/ 64 <456000000>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+/* CAM1 I2C */
+&cam1_i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ imx219_1: imx219_1@10 {
+ compatible = "sony,imx219";
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
+ clock-names = "xclk";
+
+ port {
+ csi2_cam1: endpoint {
+ remote-endpoint = <&csi2rx1_in_sensor>;
+ link-frequencies = /bits/ 64 <456000000>;
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+
+&cdns_csi2rx0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi0_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx0_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam0>;
+ bus-type = <4>; /* CSI2 DPHY. */
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&dphy0 {
+ status = "okay";
+};
+
+&ti_csi2rx0 {
+ status = "okay";
+};
+
+&cdns_csi2rx1 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi1_port0: port@0 {
+ reg = <0>;
+ status = "okay";
+
+ csi2rx1_in_sensor: endpoint {
+ remote-endpoint = <&csi2_cam1>;
+ bus-type = <4>; /* CSI2 DPHY. */
+ clock-lanes = <0>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&dphy1 {
+ status = "okay";
+};
+
+&ti_csi2rx1 {
+ status = "okay";
+};
\ No newline at end of file
--
2.34.1
On 1/29/24 7:27 AM, Vaishnav Achath wrote:
> RPi v2 Camera (IMX219) is an 8MP camera that can be used with SK-AM69
> through the 22-pin CSI-RX connector.
>
> Same overlay can be used across AM68 SK, TDA4VM SK boards that have a
> 15/22-pin FFC connector. Also enable build testing and symbols for
> all the three platforms.
>
> Signed-off-by: Vaishnav Achath <[email protected]>
> ---
> arch/arm64/boot/dts/ti/Makefile | 6 +
> .../boot/dts/ti/k3-am69-sk-csi2-imx219.dtso | 124 ++++++++++++++++++
> 2 files changed, 130 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 52c1dc910308..9fc8d68f7d26 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
>
> # Boards with J784s4 SoC
> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-csi2-imx219.dtbo
> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
>
> # Build time test only, enabled by CONFIG_OF_ALL_DTBS
> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo
> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \
> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo
> +k3-am69-sk-csi2-imx219-dtbs := k3-am69-sk.dtb \
> + k3-am69-sk-csi2-imx219.dtbo
You need to also add this "k3-am69-sk-csi2-imx219.dtb" to the list:
dtb- +=
below for it to actually get build tested.
> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
> k3-j721e-evm-pcie0-ep.dtbo
> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
> @@ -130,5 +133,8 @@ DTC_FLAGS_k3-am62-lp-sk += -@
> DTC_FLAGS_k3-am62a7-sk += -@
> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@
> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
> +DTC_FLAGS_k3-am68-sk-base-board += -@
> +DTC_FLAGS_k3-am69-sk += -@
> DTC_FLAGS_k3-j721e-common-proc-board += -@
> DTC_FLAGS_k3-j721s2-common-proc-board += -@
> +DTC_FLAGS_k3-j721e-sk += -@
> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
> new file mode 100644
> index 000000000000..4cd1d8d5004a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
> @@ -0,0 +1,124 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/**
> + * DT Overlay for RPi Camera V2.1 (Sony IMX219) interfaced with CSI2 on AM68-SK board.
> + * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
> + *
> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-pinctrl.h"
> +
> +&{/} {
> + clk_imx219_fixed: imx219-xclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24000000>;
> + };
> +};
> +
> +&csi_mux {
> + idle-state = <1>;
> +};
> +
> +/* CAM0 I2C */
> +&cam0_i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + imx219_0: imx219_0@10 {
> + compatible = "sony,imx219";
> + reg = <0x10>;
> +
> + clocks = <&clk_imx219_fixed>;
> + clock-names = "xclk";
> +
> + port {
> + csi2_cam0: endpoint {
> + remote-endpoint = <&csi2rx0_in_sensor>;
> + link-frequencies = /bits/ 64 <456000000>;
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +/* CAM1 I2C */
> +&cam1_i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + imx219_1: imx219_1@10 {
> + compatible = "sony,imx219";
> + reg = <0x10>;
> +
> + clocks = <&clk_imx219_fixed>;
> + clock-names = "xclk";
> +
> + port {
> + csi2_cam1: endpoint {
> + remote-endpoint = <&csi2rx1_in_sensor>;
> + link-frequencies = /bits/ 64 <456000000>;
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +
> +&cdns_csi2rx0 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi0_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2rx0_in_sensor: endpoint {
> + remote-endpoint = <&csi2_cam0>;
> + bus-type = <4>; /* CSI2 DPHY. */
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +&dphy0 {
> + status = "okay";
> +};
> +
> +&ti_csi2rx0 {
> + status = "okay";
> +};
> +
> +&cdns_csi2rx1 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi1_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2rx1_in_sensor: endpoint {
> + remote-endpoint = <&csi2_cam1>;
> + bus-type = <4>; /* CSI2 DPHY. */
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +&dphy1 {
> + status = "okay";
> +};
> +
> +&ti_csi2rx1 {
> + status = "okay";
> +};
> \ No newline at end of file
checkpatch..
Andrew
Hi Vaishnav,
Thanks for the patch.
On Jan 29, 2024 at 18:57:42 +0530, Vaishnav Achath wrote:
> RPi v2 Camera (IMX219) is an 8MP camera that can be used with SK-AM69
> through the 22-pin CSI-RX connector.
>
> Same overlay can be used across AM68 SK, TDA4VM SK boards that have a
> 15/22-pin FFC connector. Also enable build testing and symbols for
> all the three platforms.
In that case, the overlay should be named something generic following
how it is done for SK-AM62* family of boards.
IMO, it would also make more sense to have separate overlays for CSI0
and CSI1 ports, unless there are no usecases to plug-in different
sensors on the board.
Even if that is done later, at least this overlay should be named in a
way to make it clear it enables 2x IMX219 on both CSI-RX ports, to avoid
confusion.
So, something like k3-<jacinto?>-sk-csi2-dual-imx219.dtso
This will leave room for a CSI1 only overlay to be called
k3-<>-sk-csi2-1-<sensor>.dtso
>
> Signed-off-by: Vaishnav Achath <[email protected]>
> ---
> arch/arm64/boot/dts/ti/Makefile | 6 +
> .../boot/dts/ti/k3-am69-sk-csi2-imx219.dtso | 124 ++++++++++++++++++
> 2 files changed, 130 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 52c1dc910308..9fc8d68f7d26 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
>
> # Boards with J784s4 SoC
> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-csi2-imx219.dtbo
> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
>
> # Build time test only, enabled by CONFIG_OF_ALL_DTBS
> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo
> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \
> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo
> +k3-am69-sk-csi2-imx219-dtbs := k3-am69-sk.dtb \
> + k3-am69-sk-csi2-imx219.dtbo
Andrew already pointed out that the base dtb should be added in the dtb-
+= entry at the end of this section.
Along with that, I think the overlay should be build-tested for each
base DTB (AM68, TDA4VM) it is applicable on. Same is already done for
the shared IMX219/OV5640 overlays between SK-AM62 and SK-AM62A.
> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
> k3-j721e-evm-pcie0-ep.dtbo
> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
> @@ -130,5 +133,8 @@ DTC_FLAGS_k3-am62-lp-sk += -@
> DTC_FLAGS_k3-am62a7-sk += -@
> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@
> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
> +DTC_FLAGS_k3-am68-sk-base-board += -@
> +DTC_FLAGS_k3-am69-sk += -@
> DTC_FLAGS_k3-j721e-common-proc-board += -@
> DTC_FLAGS_k3-j721s2-common-proc-board += -@
> +DTC_FLAGS_k3-j721e-sk += -@
> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
> new file mode 100644
> index 000000000000..4cd1d8d5004a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
> @@ -0,0 +1,124 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/**
> + * DT Overlay for RPi Camera V2.1 (Sony IMX219) interfaced with CSI2 on AM68-SK board.
Overlay name says AM69 but comment says AM68 here.
> + * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
> + *
> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
s/2023/2024
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-pinctrl.h"
> +
> +&{/} {
> + clk_imx219_fixed: imx219-xclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24000000>;
> + };
> +};
> +
> +&csi_mux {
> + idle-state = <1>;
> +};
> +
> +/* CAM0 I2C */
> +&cam0_i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + imx219_0: imx219_0@10 {
> + compatible = "sony,imx219";
> + reg = <0x10>;
> +
> + clocks = <&clk_imx219_fixed>;
> + clock-names = "xclk";
> +
> + port {
> + csi2_cam0: endpoint {
> + remote-endpoint = <&csi2rx0_in_sensor>;
> + link-frequencies = /bits/ 64 <456000000>;
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +/* CAM1 I2C */
> +&cam1_i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + imx219_1: imx219_1@10 {
> + compatible = "sony,imx219";
> + reg = <0x10>;
> +
> + clocks = <&clk_imx219_fixed>;
> + clock-names = "xclk";
> +
> + port {
> + csi2_cam1: endpoint {
> + remote-endpoint = <&csi2rx1_in_sensor>;
> + link-frequencies = /bits/ 64 <456000000>;
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +
> +&cdns_csi2rx0 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi0_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2rx0_in_sensor: endpoint {
> + remote-endpoint = <&csi2_cam0>;
> + bus-type = <4>; /* CSI2 DPHY. */
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +&dphy0 {
> + status = "okay";
> +};
> +
> +&ti_csi2rx0 {
> + status = "okay";
> +};
> +
> +&cdns_csi2rx1 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi1_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2rx1_in_sensor: endpoint {
> + remote-endpoint = <&csi2_cam1>;
> + bus-type = <4>; /* CSI2 DPHY. */
> + clock-lanes = <0>;
> + data-lanes = <1 2>;
> + };
> + };
> + };
> +};
> +
> +&dphy1 {
> + status = "okay";
> +};
> +
> +&ti_csi2rx1 {
> + status = "okay";
> +};
> \ No newline at end of file
> --
> 2.34.1
>
--
Thanks,
Jai
GPG Fingerprint: 4DE0 D818 E5D5 75E8 D45A AFC5 43DE 91F9 249A 7145
Hi Vaishnav,
Thanks for the patch.
On Jan 29, 2024 at 18:57:36 +0530, Vaishnav Achath wrote:
> CSI cameras are controlled using I2C. On AM68 Starter Kit, this is routed
> to I2C-1, so enable the instance and the TCA9543 I2C switch on the bus.
>
Can you Link: to the public schematics of the board here? (And on other
patches as well)
> Signed-off-by: Vaishnav Achath <[email protected]>
> ---
> [...]
>
--
Thanks,
Jai
GPG Fingerprint: 4DE0 D818 E5D5 75E8 D45A AFC5 43DE 91F9 249A 7145
Hi Jai, Andrew,
On 31/01/24 13:45, Jai Luthra wrote:
> Hi Vaishnav,
>
> Thanks for the patch.
>
> On Jan 29, 2024 at 18:57:42 +0530, Vaishnav Achath wrote:
>> RPi v2 Camera (IMX219) is an 8MP camera that can be used with SK-AM69
>> through the 22-pin CSI-RX connector.
>>
>> Same overlay can be used across AM68 SK, TDA4VM SK boards that have a
>> 15/22-pin FFC connector. Also enable build testing and symbols for
>> all the three platforms.
>
> In that case, the overlay should be named something generic following
> how it is done for SK-AM62* family of boards.
>
> IMO, it would also make more sense to have separate overlays for CSI0
> and CSI1 ports, unless there are no usecases to plug-in different
> sensors on the board.
>
> Even if that is done later, at least this overlay should be named in a
> way to make it clear it enables 2x IMX219 on both CSI-RX ports, to avoid
> confusion.
>
> So, something like k3-<jacinto?>-sk-csi2-dual-imx219.dtso
>
> This will leave room for a CSI1 only overlay to be called
> k3-<>-sk-csi2-1-<sensor>.dtso
>
Thank you for the review, for now I have renamed the overlay to the
first supported platform(j721e-sk), like AM62X family it is difficult
to pick a common name for these platforms (TDA4VM SK, AM68 SK, AM69 SK),
also jacinto-*.dtso gives the wrong impression that these might work
with the EVMs, so for now I have picked the name to follow the first
supported platfor j721e-sk and clarified in comments and commit message
that this can be reused with other platforms.
>>
>> Signed-off-by: Vaishnav Achath <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/Makefile | 6 +
>> .../boot/dts/ti/k3-am69-sk-csi2-imx219.dtso | 124 ++++++++++++++++++
>> 2 files changed, 130 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
>>
>> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
>> index 52c1dc910308..9fc8d68f7d26 100644
>> --- a/arch/arm64/boot/dts/ti/Makefile
>> +++ b/arch/arm64/boot/dts/ti/Makefile
>> @@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
>>
>> # Boards with J784s4 SoC
>> dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb
>> +dtb-$(CONFIG_ARCH_K3) += k3-am69-sk-csi2-imx219.dtbo
>> dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
>>
>> # Build time test only, enabled by CONFIG_OF_ALL_DTBS
>> @@ -105,6 +106,8 @@ k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
>> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo
>> k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \
>> k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo
>> +k3-am69-sk-csi2-imx219-dtbs := k3-am69-sk.dtb \
>> + k3-am69-sk-csi2-imx219.dtbo
>
> Andrew already pointed out that the base dtb should be added in the dtb-
> += entry at the end of this section.
>
> Along with that, I think the overlay should be build-tested for each
> base DTB (AM68, TDA4VM) it is applicable on. Same is already done for
> the shared IMX219/OV5640 overlays between SK-AM62 and SK-AM62A.
>
Fixed in V2:
https://lore.kernel.org/all/[email protected]/
Thanks and Regards,
Vaishnav
>> k3-j721e-evm-pcie0-ep-dtbs := k3-j721e-common-proc-board.dtb \
>> k3-j721e-evm-pcie0-ep.dtbo
>> k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
>> @@ -130,5 +133,8 @@ DTC_FLAGS_k3-am62-lp-sk += -@
>> DTC_FLAGS_k3-am62a7-sk += -@
>> DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@
>> DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
>> +DTC_FLAGS_k3-am68-sk-base-board += -@
>> +DTC_FLAGS_k3-am69-sk += -@
>> DTC_FLAGS_k3-j721e-common-proc-board += -@
>> DTC_FLAGS_k3-j721s2-common-proc-board += -@
>> +DTC_FLAGS_k3-j721e-sk += -@
>> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
>> new file mode 100644
>> index 000000000000..4cd1d8d5004a
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk-csi2-imx219.dtso
>> @@ -0,0 +1,124 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/**
>> + * DT Overlay for RPi Camera V2.1 (Sony IMX219) interfaced with CSI2 on AM68-SK board.
>
> Overlay name says AM69 but comment says AM68 here.
>
>> + * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
>> + *
>> + * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
>
> s/2023/2024
>
>> + */
>> +
>> +/dts-v1/;
>> +/plugin/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include "k3-pinctrl.h"
>> +
>> +&{/} {
>> + clk_imx219_fixed: imx219-xclk {
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <24000000>;
>> + };
>> +};
>> +
>> +&csi_mux {
>> + idle-state = <1>;
>> +};
>> +
>> +/* CAM0 I2C */
>> +&cam0_i2c {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + imx219_0: imx219_0@10 {
>> + compatible = "sony,imx219";
>> + reg = <0x10>;
>> +
>> + clocks = <&clk_imx219_fixed>;
>> + clock-names = "xclk";
>> +
>> + port {
>> + csi2_cam0: endpoint {
>> + remote-endpoint = <&csi2rx0_in_sensor>;
>> + link-frequencies = /bits/ 64 <456000000>;
>> + clock-lanes = <0>;
>> + data-lanes = <1 2>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +/* CAM1 I2C */
>> +&cam1_i2c {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + imx219_1: imx219_1@10 {
>> + compatible = "sony,imx219";
>> + reg = <0x10>;
>> +
>> + clocks = <&clk_imx219_fixed>;
>> + clock-names = "xclk";
>> +
>> + port {
>> + csi2_cam1: endpoint {
>> + remote-endpoint = <&csi2rx1_in_sensor>;
>> + link-frequencies = /bits/ 64 <456000000>;
>> + clock-lanes = <0>;
>> + data-lanes = <1 2>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +
>> +&cdns_csi2rx0 {
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + csi0_port0: port@0 {
>> + reg = <0>;
>> + status = "okay";
>> +
>> + csi2rx0_in_sensor: endpoint {
>> + remote-endpoint = <&csi2_cam0>;
>> + bus-type = <4>; /* CSI2 DPHY. */
>> + clock-lanes = <0>;
>> + data-lanes = <1 2>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&dphy0 {
>> + status = "okay";
>> +};
>> +
>> +&ti_csi2rx0 {
>> + status = "okay";
>> +};
>> +
>> +&cdns_csi2rx1 {
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + csi1_port0: port@0 {
>> + reg = <0>;
>> + status = "okay";
>> +
>> + csi2rx1_in_sensor: endpoint {
>> + remote-endpoint = <&csi2_cam1>;
>> + bus-type = <4>; /* CSI2 DPHY. */
>> + clock-lanes = <0>;
>> + data-lanes = <1 2>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&dphy1 {
>> + status = "okay";
>> +};
>> +
>> +&ti_csi2rx1 {
>> + status = "okay";
>> +};
>> \ No newline at end of file
>> --
>> 2.34.1
>>
>