2020-03-13 10:31:24

by Akash Asthana

Subject: [PATCH V5 2/3] dt-bindings: geni-se: Add interconnect binding for GENI QUP

Add documentation for the interconnect and interconnect-names properties
for the GENI QUP.

Signed-off-by: Akash Asthana <[email protected]>
---
Changes in V5:
- Add interconnect property for QUP wrapper (parent node).
- Add minItems = 2 for interconnect property in child nodes

.../devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
index 23282ab..533400b 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
@@ -46,6 +46,12 @@ properties:

ranges: true

+ interconnects:
+ maxItems: 1
+
+ interconnect-names:
+ const: qup-core
+
required:
- compatible
- reg
@@ -73,6 +79,16 @@ patternProperties:
description: Serial engine core clock needed by the device.
maxItems: 1

+ interconnects:
+ minItems: 2
+ maxItems: 3
+
+ interconnect-names:
+ items:
+ - const: qup-core
+ - const: qup-config
+ - const: qup-memory
+
required:
- reg
- clock-names
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project

2020-03-13 22:09:21

by Rob Herring

Subject: Re: [PATCH V5 2/3] dt-bindings: geni-se: Add interconnect binding for GENI QUP

On Fri, Mar 13, 2020 at 03:59:09PM +0530, Akash Asthana wrote:
> Add documentation for the interconnect and interconnect-names properties
> for the GENI QUP.
>
> Signed-off-by: Akash Asthana <[email protected]>
> ---
> Changes in V5:
> - Add interconnect property for QUP wrapper (parent node).
> - Add minItems = 2 for interconnect property in child nodes
>
> .../devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
> index 23282ab..533400b 100644
> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
> @@ -46,6 +46,12 @@ properties:
>
> ranges: true
>
> + interconnects:
> + maxItems: 1
> +
> + interconnect-names:
> + const: qup-core
> +
> required:
> - compatible
> - reg
> @@ -73,6 +79,16 @@ patternProperties:
> description: Serial engine core clock needed by the device.
> maxItems: 1
>
> + interconnects:
> + minItems: 2
> + maxItems: 3
> +
> + interconnect-names:
> + items:
> + - const: qup-core
> + - const: qup-config
> + - const: qup-memory

Don't you need 'minItems: 2' here?

Rob

2020-05-07 15:06:52

by Akash Asthana

Subject: Re: [PATCH V5 2/3] dt-bindings: geni-se: Add interconnect binding for GENI QUP

Hi Rob,

>>
>> + interconnects:
>> + minItems: 2
>> + maxItems: 3
>> +
>> + interconnect-names:
>> + items:
>> + - const: qup-core
>> + - const: qup-config
>> + - const: qup-memory
> Don't you need 'minItems: 2' here?

Yeah I need minItems: 2 here, thanks for reviewing.

regards,

Akash

>
> Rob

--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project