From: Ben Chuang <[email protected]>
The patches modify internal clock setup to match SD Host Controller
Simplified Specifications 4.20 and support Genesys Logic GL9750/GL9755
chipsets.
v8:
refine codes in sdhci-gli-pci.c
- remove duplicate assignment
- remove redundant delay
- use '!!'(not not) logical operator to refine the true/false condition
- check end condition after outter loop
- add comments for delay 5ms in sdhci_gli_voltage_switch()
- merge two logical conditions to one line
v7:
- remove condition define CONFIG_MMC_SDHCI_IO_ACCESSORS from sdhci-pci-gli.c
- making the accessors(MMC_SDHCI_IO_ACCESSORS) always available when selecting
MMC_SDHCI_PCI in Kconfig
V6:
- export sdhci_abot_tuning() function symbol
- use C-style comments
- use BIT, FIELD_{GET,PREP} and GENMASK to define bit fields of register
- use host->ops->platform_execute_tuning instead of mmc->ops->execute_tuning
- call sdhci_reset() instead of duplicating the code in sdhci_gl9750_reset
- remove .hw_reset
- use condition define CONFIG_MMC_SDHCI_IO_ACCESSORS for read_l
V5:
- add "change timeout of loop .." to a patch
- fix typo "verndor" to "vendor"
V4:
- change name from sdhci_gli_reset to sdhci_gl9750_reset
- fix sdhci_reset to sdhci_gl9750_reset in sdhci_gl9750_ops
- fix sdhci_gli_reset to sdhci_reset in sdhci_gl9755_ops
V3:
- change usleep_range to udelay
- add Genesys Logic PCI Vendor ID to a patch
- separate the Genesys Logic specific part to a patch
V2:
- change udelay to usleep_range
Ben Chuang (5):
mmc: sdhci: Change timeout of loop for checking internal clock stable
mmc: sdhci: Add PLL Enable support to internal clock setup
PCI: Add Genesys Logic, Inc. Vendor ID
mmc: sdhci: Export sdhci_abort_tuning function symbol
mmc: host: sdhci-pci: Add Genesys Logic GL975x support
drivers/mmc/host/Kconfig | 1 +
drivers/mmc/host/Makefile | 2 +-
drivers/mmc/host/sdhci-pci-core.c | 2 +
drivers/mmc/host/sdhci-pci-gli.c | 355 ++++++++++++++++++++++++++++++
drivers/mmc/host/sdhci-pci.h | 5 +
drivers/mmc/host/sdhci.c | 30 ++-
drivers/mmc/host/sdhci.h | 2 +
include/linux/pci_ids.h | 2 +
8 files changed, 395 insertions(+), 4 deletions(-)
create mode 100644 drivers/mmc/host/sdhci-pci-gli.c
--
2.23.0
From: Ben Chuang <[email protected]>
According to section 3.2.1 internal clock setup in SD Host Controller
Simplified Specifications 4.20, the timeout of loop for checking
internal clock stable is defined as 150ms.
Signed-off-by: Ben Chuang <[email protected]>
Co-developed-by: Michael K Johnson <[email protected]>
Signed-off-by: Michael K Johnson <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
---
drivers/mmc/host/sdhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 59acf8e3331e..bed0760a6c2a 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1636,8 +1636,8 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
clk |= SDHCI_CLOCK_INT_EN;
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
- /* Wait max 20 ms */
- timeout = ktime_add_ms(ktime_get(), 20);
+ /* Wait max 150 ms */
+ timeout = ktime_add_ms(ktime_get(), 150);
while (1) {
bool timedout = ktime_after(ktime_get(), timeout);
--
2.23.0