2023-09-16 09:15:14

by Conor Dooley

Subject: [PATCH v1] riscv: dts: allwinner: remove address-cells from intc node

From: Conor Dooley <[email protected]>

A recent submission [1] from Rob has added additionalProperties: false
to the interrupt-controller child node of RISC-V cpus, highlighting that
the D1 DT has been incorrectly using #address-cells since its
introduction. It has no child nodes, so #address-cells is not needed.
Remove it.

Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree")
Link: https://patchwork.kernel.org/project/linux-riscv/patch/[email protected]/ [1]
Signed-off-by: Conor Dooley <[email protected]>
---
CC: Rob Herring <[email protected]>
CC: Krzysztof Kozlowski <[email protected]>
CC: Conor Dooley <[email protected]>
CC: Chen-Yu Tsai <[email protected]>
CC: Jernej Skrabec <[email protected]>
CC: Samuel Holland <[email protected]>
CC: [email protected]
CC: [email protected]
CC: [email protected]
CC: [email protected]
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 1 -
1 file changed, 1 deletion(-)

diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 8275630af977..b8684312593e 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -30,7 +30,6 @@ cpu0: cpu@0 {
cpu0_intc: interrupt-controller {
compatible = "riscv,cpu-intc";
interrupt-controller;
- #address-cells = <0>;
#interrupt-cells = <1>;
};
};
--
2.39.2

2023-09-17 23:51:32

by Jernej Škrabec

Subject: Re: [PATCH v1] riscv: dts: allwinner: remove address-cells from intc node

Dne sobota, 16. september 2023 ob 11:14:00 CEST je Conor Dooley napisal(a):
> From: Conor Dooley <[email protected]>
>
> A recent submission [1] from Rob has added additionalProperties: false
> to the interrupt-controller child node of RISC-V cpus, highlighting that
> the D1 DT has been incorrectly using #address-cells since its
> introduction. It has no child nodes, so #address-cells is not needed.
> Remove it.
>
> Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree")
> Link:
> https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.41844
> [email protected]/ [1] Signed-off-by: Conor Dooley
> <[email protected]>
> ---
> CC: Rob Herring <[email protected]>
> CC: Krzysztof Kozlowski <[email protected]>
> CC: Conor Dooley <[email protected]>
> CC: Chen-Yu Tsai <[email protected]>
> CC: Jernej Skrabec <[email protected]>
> CC: Samuel Holland <[email protected]>
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]

Acked-by: Jernej Skrabec <[email protected]>

Best regards,
Jernej

> ---
> arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index
> 8275630af977..b8684312593e 100644
> --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> @@ -30,7 +30,6 @@ cpu0: cpu@0 {
> cpu0_intc: interrupt-controller {
> compatible = "riscv,cpu-intc";
> interrupt-controller;
> - #address-cells = <0>;
> #interrupt-cells = <1>;
> };
> };

2023-09-24 22:20:33

by Jernej Škrabec

Subject: Re: [PATCH v1] riscv: dts: allwinner: remove address-cells from intc node

Dne sobota, 16. september 2023 ob 11:14:00 CEST je Conor Dooley napisal(a):
> From: Conor Dooley <[email protected]>
>
> A recent submission [1] from Rob has added additionalProperties: false
> to the interrupt-controller child node of RISC-V cpus, highlighting that
> the D1 DT has been incorrectly using #address-cells since its
> introduction. It has no child nodes, so #address-cells is not needed.
> Remove it.
>
> Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree")
> Link: https://patchwork.kernel.org/project/linux-riscv/patch/[email protected]/ [1]
> Signed-off-by: Conor Dooley <[email protected]>

Applied, thanks!

Best regards,
Jernej

> ---
> CC: Rob Herring <[email protected]>
> CC: Krzysztof Kozlowski <[email protected]>
> CC: Conor Dooley <[email protected]>
> CC: Chen-Yu Tsai <[email protected]>
> CC: Jernej Skrabec <[email protected]>
> CC: Samuel Holland <[email protected]>
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> CC: [email protected]
> ---
> arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> index 8275630af977..b8684312593e 100644
> --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> @@ -30,7 +30,6 @@ cpu0: cpu@0 {
> cpu0_intc: interrupt-controller {
> compatible = "riscv,cpu-intc";
> interrupt-controller;
> - #address-cells = <0>;
> #interrupt-cells = <1>;
> };
> };
>