thank Alan Cox and John Bradford , very nice.
however, I am afraid I haven't make my idea quite clear because of my pool
english, permit me saying again:
I am learning code about pci_check_direct(), at arch/i386/kernel/pci-pc.c
the PCI spec v2.0 say: ( page32)
"Anytime a host bridge sees a full DWORD I/O write from the host to
CONFIG_ADDRESS, the bridge must latch the data into its CONFIG_ADDRESS
register. On full DWORD I/O reads to CONFIG_ADDRESS,the bridge must return
the
data in CONFIG_ADDRESS. Any other types of accesses to this
address(non-DWORD)
have no effect on CONFIG_ADDRESS and are excuted as normal I/O transaction
on PCI bus......"
CONFIG_ADDRESS = 0xcf8
CONFIG_DATA = 0xcfc
so I think "outb (0x01, 0xCFB);" just is a normal write to a device at port
address 0xCFB (maybe wrong, fix me), then my questions are:
1. which device is at port address 0xCFB?
2. what is meaning of the writing operation "outb (0x01, 0xCFB);" for THIS
device?, it'seem that PCI spec v2.0 not say anything about it?
3. why need "outb (0x01, 0xCFB);" before configuration operation "outl
(0x80000000, 0xCF8);" if check configuration type 1? and why need "outb
(0x00, 0xCFB);" before "outb (0x00, 0xCF8);" if check configuration type 2?
please help me, thanks a lot.
406 static struct pci_ops * __devinit pci_check_direct(void)
407 {
408 unsigned int tmp;
409 unsigned long flags;
410
411 __save_flags(flags); __cli();
412
413 /*
414 * Check if configuration type 1 works.
415 */
416 if (pci_probe & PCI_PROBE_CONF1) {
417 outb (0x01, 0xCFB); <<<=========
418 tmp = inl (0xCF8);
419 outl (0x80000000, 0xCF8);
420 if (inl (0xCF8) == 0x80000000 &&
421 pci_sanity_check(&pci_direct_conf1)) {
422 outl (tmp, 0xCF8);
423 __restore_flags(flags);
424 printk(KERN_INFO "PCI: Using configuration type
1\n");
425 request_region(0xCF8, 8, "PCI conf1");
426 return &pci_direct_conf1;
427 }
428 outl (tmp, 0xCF8);
429 }
430
431 /*
432 * Check if configuration type 2 works.
433 */
434 if (pci_probe & PCI_PROBE_CONF2) {
435 outb (0x00, 0xCFB); <<<=========
436 outb (0x00, 0xCF8);
437 outb (0x00, 0xCFA);
438 if (inb (0xCF8) == 0x00 && inb (0xCFA) == 0x00 &&
439 pci_sanity_check(&pci_direct_conf2)) {
440 __restore_flags(flags);
441 printk(KERN_INFO "PCI: Using configuration type
2\n");
442 request_region(0xCF8, 4, "PCI conf2");
443 return &pci_direct_conf2;
444 }
445 }
446
447 __restore_flags(flags);
448 return NULL;
449 }
450
451 #endif
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On Mon, 2003-01-06 at 09:26, fretre lewis wrote:
> 1. which device is at port address 0xCFB?
the PCI controller.
> 2. what is meaning of the writing operation "outb (0x01, 0xCFB);" for THIS
> device?, it'seem that PCI spec v2.0 not say anything about it?
I think it selects PCI configuration mode 1. (I could be wrong).
--
// Gianni Tedesco (gianni at scaramanga dot co dot uk)
lynx --source http://www.scaramanga.co.uk/gianni-at-ecsc.asc | gpg --import
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