2003-06-07 20:15:13

by dan carpenter

[permalink] [raw]
Subject: memtest86 on the opteron

Is there anyone working on Memtest86 for the AMD Opteron?

What would be involved with making that work?

regards,
dan carpenter


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2003-06-07 21:30:56

by Pavel Machek

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Subject: Re: memtest86 on the opteron

Hi!

> Is there anyone working on Memtest86 for the AMD Opteron?

Well, as opteron is i386-compatible, you should be able to simply use
i386 memtest... Should be easy for <2GB memory. You can teach memtest
PAE, that will be usefull to 32GB pentium boxes, too ;-).

Pavel
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2003-06-08 02:38:50

by Bryan O'Sullivan

[permalink] [raw]
Subject: Re: memtest86 on the opteron

On Sat, 2003-06-07 at 14:43, Pavel Machek wrote:

> Well, as opteron is i386-compatible, you should be able to simply use
> i386 memtest...

It doesn't work. Crashes and reboots the system shortly after it
starts. The serial console support appears to have bit-rotted, too, so
I've not been able to capture an output screen to diagnose the problem.

<b

2003-06-08 06:14:12

by Andi Kleen

[permalink] [raw]
Subject: Re: memtest86 on the opteron

Bryan O'Sullivan <[email protected]> writes:

> On Sat, 2003-06-07 at 14:43, Pavel Machek wrote:
>
> > Well, as opteron is i386-compatible, you should be able to simply use
> > i386 memtest...
>
> It doesn't work. Crashes and reboots the system shortly after it
> starts. The serial console support appears to have bit-rotted, too, so
> I've not been able to capture an output screen to diagnose the problem.

The problem is the CPUID handling in memtest86. It does not expect
the 15 model number on AMD systems. Someone did a patch for it, but
I don't remember where they put it. Anyways should be easy to fix again
given the source.

-Andi

2003-06-08 06:31:25

by Warren Togami

[permalink] [raw]
Subject: Re: memtest86 on the opteron

On Sat, 2003-06-07 at 20:27, Andi Kleen wrote:
> Bryan O'Sullivan <[email protected]> writes:
>
> > On Sat, 2003-06-07 at 14:43, Pavel Machek wrote:
> >
> > > Well, as opteron is i386-compatible, you should be able to simply use
> > > i386 memtest...
> >
> > It doesn't work. Crashes and reboots the system shortly after it
> > starts. The serial console support appears to have bit-rotted, too, so
> > I've not been able to capture an output screen to diagnose the problem.
>
> The problem is the CPUID handling in memtest86. It does not expect
> the 15 model number on AMD systems. Someone did a patch for it, but
> I don't remember where they put it. Anyways should be easy to fix again
> given the source.
>

If you find the patch I am interested in it. Please CC me.

I am guessing that a normal 32bit compiled memtest86 wont be able to
test beyond 4GB of RAM on AMD64?

Warren

2003-06-08 07:52:44

by Pavel Machek

[permalink] [raw]
Subject: Re: memtest86 on the opteron

Hi!

> > Well, as opteron is i386-compatible, you should be able to simply use
> > i386 memtest...
>
> It doesn't work. Crashes and reboots the system shortly after it
> starts. The serial console support appears to have bit-rotted, too, so
> I've not been able to capture an output screen to diagnose the problem.

Try asking AMD at [email protected].

BTW I'm sure I've seen x86_64 machine running some kind of
memtest.... There was mem-testing PCI card. I'm not sure if we ran
memtest86, too...
Pavel
--
When do you have a heart between your knees?
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2003-06-09 15:51:15

by Eric W. Biederman

[permalink] [raw]
Subject: Re: memtest86 on the opteron

Warren Togami <[email protected]> writes:

> On Sat, 2003-06-07 at 20:27, Andi Kleen wrote:
> > Bryan O'Sullivan <[email protected]> writes:
> >
> > > On Sat, 2003-06-07 at 14:43, Pavel Machek wrote:
> > >
> > > > Well, as opteron is i386-compatible, you should be able to simply use
> > > > i386 memtest...
> > >
> > > It doesn't work. Crashes and reboots the system shortly after it
> > > starts. The serial console support appears to have bit-rotted, too, so
> > > I've not been able to capture an output screen to diagnose the problem.
> >
> > The problem is the CPUID handling in memtest86. It does not expect
> > the 15 model number on AMD systems. Someone did a patch for it, but
> > I don't remember where they put it. Anyways should be easy to fix again
> > given the source.
> >
>
> If you find the patch I am interested in it. Please CC me.
>
> I am guessing that a normal 32bit compiled memtest86 wont be able to
> test beyond 4GB of RAM on AMD64?

memtest86 has PAE support so it should be able to test everything.
I have tested with 6GB of RAM on an old PIII.

Beyond the cpuid thing. There is a bug in the probing of how much memory
is cached. Last time I was playing with it I just disabled that section
of code.

If nothing else ping me a few times because I will need this shortly.
If it really does not work. And I am familiar with the code so I will
certainly get it fixed.

Eric

2003-06-09 20:45:43

by Dan Carpenter

[permalink] [raw]
Subject: Re: memtest86 on the opteron

Thanks all,

Here is the patch for the CPU ID.

regards,
dan carpenter
Penguin Computing

--- init.c.orig Mon Jun 9 10:23:10 2003
+++ init.c Mon Jun 9 10:25:44 2003
@@ -402,6 +402,16 @@
}
l1_cache = cpu_id.cache_info[3];
l1_cache += cpu_id.cache_info[7];
+ case 15:
+ switch(cpu_id.model) {
+ case 5:
+ cprint(LINE_CPU, 0, "AMD Opteron");
+ off = 11;
+ l1_cache = cpu_id.cache_info[3];
+ l1_cache += cpu_id.cache_info[7];
+ l2_cache = (cpu_id.cache_info[11] << 8);
+ l2_cache += cpu_id.cache_info[10];
+ }
}
break;



2003-06-09 21:04:53

by Dave Jones

[permalink] [raw]
Subject: Re: memtest86 on the opteron

On Mon, Jun 09, 2003 at 01:26:37PM -0700, Dan Carpenter wrote:
> --- init.c.orig Mon Jun 9 10:23:10 2003
> +++ init.c Mon Jun 9 10:25:44 2003
> @@ -402,6 +402,16 @@
> }
> l1_cache = cpu_id.cache_info[3];
> l1_cache += cpu_id.cache_info[7];
> + case 15:
> + switch(cpu_id.model) {
> + case 5:
> + cprint(LINE_CPU, 0, "AMD Opteron");
> + off = 11;
> + l1_cache = cpu_id.cache_info[3];
> + l1_cache += cpu_id.cache_info[7];
> + l2_cache = (cpu_id.cache_info[11] << 8);
> + l2_cache += cpu_id.cache_info[10];
> + }
> }

Any reason to restrict it to a single stepping ?
This means you have to upgrade memtest every time a new model
is released, which seems a bit of a pain.

Chances are it'll work fine on subsequent family 15 AMD CPUs.

Dave

2003-06-09 21:16:00

by Bryan O'Sullivan

[permalink] [raw]
Subject: Re: memtest86 on the opteron

===== init.c 1.2 vs edited =====
--- 1.2/init.c Mon Jun 9 14:25:40 2003
+++ edited/init.c Mon Jun 9 14:27:42 2003
@@ -403,16 +403,12 @@
l1_cache = cpu_id.cache_info[3];
l1_cache += cpu_id.cache_info[7];
case 15:
- switch (cpu_id.model) {
- case 5:
- cprint(LINE_CPU, 0, "AMD Opteron");
- off = 11;
- l1_cache = cpu_id.cache_info[3];
- l1_cache += cpu_id.cache_info[7];
- l2_cache = (cpu_id.cache_info[11] << 8);
- l2_cache += cpu_id.cache_info[10];
- break;
- }
+ cprint(LINE_CPU, 0, "AMD Opteron");
+ off = 11;
+ l1_cache = cpu_id.cache_info[3];
+ l1_cache += cpu_id.cache_info[7];
+ l2_cache = (cpu_id.cache_info[11] << 8);
+ l2_cache += cpu_id.cache_info[10];
}
break;


Attachments:
memtest.patch (732.00 B)

2003-06-11 16:10:41

by Dan Carpenter

[permalink] [raw]
Subject: Re: memtest86 on the opteron

On 9 Jun 2003, Bryan O'Sullivan wrote:

> On Mon, 2003-06-09 at 14:18, Dave Jones wrote:
>
> > Any reason to restrict it to a single stepping ?
> > This means you have to upgrade memtest every time a new model
> > is released, which seems a bit of a pain.
>
> This is the patch I use, which seems to make sense, since I don't know
> of any other steppings. No point in parameterising the code until you
> have some parameters.
>

Grand. I threw in a break statement so it handles Athlons again.
Here is the patch against the original memtest for the mail archives.

thanks,
dan carpenter
Penguin Computing

--- init.c.orig Wed Jun 11 08:49:02 2003
+++ init.c Wed Jun 11 08:43:39 2003
@@ -402,6 +402,14 @@
}
l1_cache = cpu_id.cache_info[3];
l1_cache += cpu_id.cache_info[7];
+ break;
+ case 15:
+ cprint(LINE_CPU, 0, "AMD Opteron");
+ off = 11;
+ l1_cache = cpu_id.cache_info[3];
+ l1_cache += cpu_id.cache_info[7];
+ l2_cache = (cpu_id.cache_info[11] << 8);
+ l2_cache += cpu_id.cache_info[10];
}
break;