Hi,
This series add support for the USB Host controllers available on
RZN1 (r9a06g032) SOC.
These USB Host controllers are PCI OHCI/EHCI controllers located
behind a bridge.
Regards,
Herve
Changes v2:
- Convert bindings to json-schema
- Update clocks description
- Remove unneeded '.compatible = "renesas,pci-r9a06g032"'
Changes v3:
- Remove the unneeded patch that calls clk_bulk_prepare_enable()
- Rework the device tree binding (conversion from .txt and RZ/N1 support)
- Use the RZ/N1 SOCs family only in the driver match compatible string.
- Enable PM and PM_GENERIC_DOMAIN for RZ/N1 and add the missing
'#power-domain-cells' in sysctrl node.
Changes v4:
- Remove patches related to PM enable and #pwower-domain-cells as they
will be handle out of this series.
- Add Bob's reviewed-by on patch 1
- Add Geert's reviewed by on patch 1 and 6
- Rename clocks and make the 'resets' property optional on RZ/N1 family
- Reword some commit logs and titles
- Fix dst node location (sort by node names or unit addresses)
- Fix the USB PHY node name
Herve Codina (6):
dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema
dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for
r9a06g032
PCI: rcar-gen2: Add RZ/N1 SOCs family compatible string
ARM: dts: r9a06g032: Add internal PCI bridge node
ARM: dts: r9a06g032: Add USB PHY DT support
ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY
.../devicetree/bindings/pci/pci-rcar-gen2.txt | 84 --------
.../bindings/pci/renesas,pci-rcar-gen2.yaml | 188 ++++++++++++++++++
arch/arm/boot/dts/r9a06g032.dtsi | 47 +++++
drivers/pci/controller/pci-rcar-gen2.c | 1 +
4 files changed, 236 insertions(+), 84 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
--
2.35.1
Add internal PCI bridge support for the r9a06g032 SOC. The Renesas
RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one
present in the R-Car Gen2 family.
Compared to the R-Car Gen2 family, it needs three clocks instead of
one.
The 'resets' property for the RZ/N1 family is not required since
there is no reset-controller support yet for the RZ/N1 family.
Signed-off-by: Herve Codina <[email protected]>
---
.../bindings/pci/renesas,pci-rcar-gen2.yaml | 46 ++++++++++++++++---
1 file changed, 39 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
index 494eb975c146..90b42d44c582 100644
--- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
+++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
@@ -32,6 +32,10 @@ properties:
- renesas,pci-r8a7793 # R-Car M2-N
- renesas,pci-r8a7794 # R-Car E2
- const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
+ - items:
+ - enum:
+ - renesas,pci-r9a06g032 # RZ/N1D
+ - const: renesas,pci-rzn1 # RZ/N1
reg:
items:
@@ -41,13 +45,9 @@ properties:
interrupts:
maxItems: 1
- clocks:
- items:
- - description: Device clock
+ clocks: true
- clock-names:
- items:
- - const: pclk
+ clock-names: true
resets:
maxItems: 1
@@ -106,13 +106,45 @@ required:
- interrupt-map
- interrupt-map-mask
- clocks
- - resets
- power-domains
- bus-range
- "#address-cells"
- "#size-cells"
- "#interrupt-cells"
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,pci-rzn1
+
+then:
+ properties:
+ clocks:
+ items:
+ - description: Internal bus clock (AHB) for HOST
+ - description: Internal bus clock (AHB) Power Management
+ - description: PCI clock for USB subsystem
+ clock-names:
+ items:
+ - const: usb_hclkh
+ - const: usb_hclkpm
+ - const: usb_pciclk
+ required:
+ - clock-names
+
+else:
+ properties:
+ clocks:
+ items:
+ - description: Device clock
+ clock-names:
+ items:
+ - const: pclk
+ required:
+ - resets
+
unevaluatedProperties: false
examples:
--
2.35.1
On 28/04/2022 17:16, Herve Codina wrote:
> Add internal PCI bridge support for the r9a06g032 SOC. The Renesas
> RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one
> present in the R-Car Gen2 family.
> Compared to the R-Car Gen2 family, it needs three clocks instead of
> one.
>
> The 'resets' property for the RZ/N1 family is not required since
> there is no reset-controller support yet for the RZ/N1 family.
>
> Signed-off-by: Herve Codina <[email protected]>
> ---
> .../bindings/pci/renesas,pci-rcar-gen2.yaml | 46 ++++++++++++++++---
> 1 file changed, 39 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> index 494eb975c146..90b42d44c582 100644
> --- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> +++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> @@ -32,6 +32,10 @@ properties:
> - renesas,pci-r8a7793 # R-Car M2-N
> - renesas,pci-r8a7794 # R-Car E2
> - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
> + - items:
> + - enum:
> + - renesas,pci-r9a06g032 # RZ/N1D
> + - const: renesas,pci-rzn1 # RZ/N1
>
> reg:
> items:
> @@ -41,13 +45,9 @@ properties:
> interrupts:
> maxItems: 1
>
> - clocks:
> - items:
> - - description: Device clock
> + clocks: true
>
> - clock-names:
> - items:
> - - const: pclk
> + clock-names: true
>
> resets:
> maxItems: 1
> @@ -106,13 +106,45 @@ required:
> - interrupt-map
> - interrupt-map-mask
> - clocks
> - - resets
> - power-domains
> - bus-range
> - "#address-cells"
> - "#size-cells"
> - "#interrupt-cells"
>
> +if:
This should be better within allOf block. It's likely that it will be
extended later.
Best regards,
Krzysztof
Hi Hervé,
On Thu, Apr 28, 2022 at 5:16 PM Herve Codina <[email protected]> wrote:
> Add internal PCI bridge support for the r9a06g032 SOC. The Renesas
> RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one
> present in the R-Car Gen2 family.
> Compared to the R-Car Gen2 family, it needs three clocks instead of
> one.
>
> The 'resets' property for the RZ/N1 family is not required since
> there is no reset-controller support yet for the RZ/N1 family.
>
> Signed-off-by: Herve Codina <[email protected]>
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> +++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml
> +if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,pci-rzn1
> +
> +then:
> + properties:
> + clocks:
> + items:
> + - description: Internal bus clock (AHB) for HOST
> + - description: Internal bus clock (AHB) Power Management
> + - description: PCI clock for USB subsystem
> + clock-names:
> + items:
> + - const: usb_hclkh
> + - const: usb_hclkpm
> + - const: usb_pciclk
Please drop the "usb_" prefixes.
With the above fixed:
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds