2021-02-01 13:35:43

by Michael Walle

[permalink] [raw]
Subject: [PATCH] ARM: dts: ebaz4205: add pinctrl entries for switches

Add the pinctrl entries for the GPIOs which are connected to the
push buttons on this board.

Signed-off-by: Michael Walle <[email protected]>
---
arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts b/arch/arm/boot/dts/zynq-ebaz4205.dts
index e802d4ae8804..b0b836aedd76 100644
--- a/arch/arm/boot/dts/zynq-ebaz4205.dts
+++ b/arch/arm/boot/dts/zynq-ebaz4205.dts
@@ -43,7 +43,30 @@
};
};

+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio0_default>;
+};
+
&pinctrl0 {
+ pinctrl_gpio0_default: gpio0-default {
+ mux {
+ groups = "gpio0_20_grp", "gpio0_32_grp";
+ function = "gpio0";
+ };
+
+ conf {
+ groups = "gpio0_20_grp", "gpio0_32_grp";
+ io-standard = <3>;
+ slew-rate = <0>;
+ };
+
+ conf-pull-up {
+ pins = "MIO20", "MIO32";
+ bias-disable;
+ };
+ };
+
pinctrl_sdhci0_default: sdhci0-default {
mux {
groups = "sdio0_2_grp";
--
2.20.1


2021-02-03 07:02:37

by Michal Simek

[permalink] [raw]
Subject: Re: [PATCH] ARM: dts: ebaz4205: add pinctrl entries for switches



On 2/1/21 2:30 PM, Michael Walle wrote:
> Add the pinctrl entries for the GPIOs which are connected to the
> push buttons on this board.
>
> Signed-off-by: Michael Walle <[email protected]>
> ---
> arch/arm/boot/dts/zynq-ebaz4205.dts | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts b/arch/arm/boot/dts/zynq-ebaz4205.dts
> index e802d4ae8804..b0b836aedd76 100644
> --- a/arch/arm/boot/dts/zynq-ebaz4205.dts
> +++ b/arch/arm/boot/dts/zynq-ebaz4205.dts
> @@ -43,7 +43,30 @@
> };
> };
>
> +&gpio0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio0_default>;
> +};
> +
> &pinctrl0 {
> + pinctrl_gpio0_default: gpio0-default {
> + mux {
> + groups = "gpio0_20_grp", "gpio0_32_grp";
> + function = "gpio0";
> + };
> +
> + conf {
> + groups = "gpio0_20_grp", "gpio0_32_grp";
> + io-standard = <3>;
> + slew-rate = <0>;
> + };
> +
> + conf-pull-up {
> + pins = "MIO20", "MIO32";
> + bias-disable;
> + };
> + };
> +
> pinctrl_sdhci0_default: sdhci0-default {
> mux {
> groups = "sdio0_2_grp";
>

Applied.
M