Add control of hardware serial bit order between
LSB first (default/standard) and MSB first.
Signed-off-by: Paul Fulghum <[email protected]>
--- a/include/linux/synclink.h 2008-07-17 11:45:48.000000000 -0500
+++ b/include/linux/synclink.h 2008-07-17 11:46:52.000000000 -0500
@@ -136,6 +136,7 @@
#define MGSL_INTERFACE_RTS_EN 0x10
#define MGSL_INTERFACE_LL 0x20
#define MGSL_INTERFACE_RL 0x40
+#define MGSL_INTERFACE_MSB_FIRST 0x80
typedef struct _MGSL_PARAMS
{
--- a/drivers/char/synclink_gt.c 2008-07-17 08:39:06.000000000 -0500
+++ b/drivers/char/synclink_gt.c 2008-07-17 11:45:10.000000000 -0500
@@ -4430,6 +4430,8 @@ static void msc_set_vcr(struct slgt_info
break;
}
+ if (info->if_mode & MGSL_INTERFACE_MSB_FIRST)
+ val |= BIT4;
if (info->signals & SerialSignal_DTR)
val |= BIT3;
if (info->signals & SerialSignal_RTS)