[ resending, forgot to copy Wolfgang ]
On Wed 9/2/2020 10:09 AM, Wolfgang Grandegger wrote:
> canfdtest normally runs on the DUT *and* a the host. The DUT receives
> the messages from the host, increments the frame data bytes and then
> sends them back to the host. With "loopback" mode, the data bytes are
> not incremented and that's what you see above.
>
> Wolfgang
Wolfgang is of course right, but we're nonetheless investigating what
seems to be a real problem, and what Pankaj had seen was a red herring.
So currently what I suspect is going on, when I am running canfdtest
between 2 LS1028A-RDB boards, is that the DUT is reordering frames on
TX.
See, for example, the screenshot below:
https://drive.google.com/file/d/1rOeW3aXh3kPh1CJ39lCccRfjFz5JN5I6/view?usp=sharing
I have added trace points to the end of the flexcan_start_xmit function,
which print the entire skb, and the frames appear to be written to the
TX message buffer in the correct order. They are seen, however, in the
incorrect order on the wire.
Thanks,
-Vladimir
On 9/16/20 1:04 PM, Vladimir Oltean wrote:
> [ resending, forgot to copy Wolfgang ]
>
> On Wed 9/2/2020 10:09 AM, Wolfgang Grandegger wrote:
>> canfdtest normally runs on the DUT *and* a the host. The DUT receives
>> the messages from the host, increments the frame data bytes and then
>> sends them back to the host. With "loopback" mode, the data bytes are
>> not incremented and that's what you see above.
>>
>> Wolfgang
>
> Wolfgang is of course right, but we're nonetheless investigating what
> seems to be a real problem, and what Pankaj had seen was a red herring.
>
> So currently what I suspect is going on, when I am running canfdtest
> between 2 LS1028A-RDB boards, is that the DUT is reordering frames on
> TX.
>
> See, for example, the screenshot below:
> https://drive.google.com/file/d/1rOeW3aXh3kPh1CJ39lCccRfjFz5JN5I6/view?usp=sharing
>
> I have added trace points to the end of the flexcan_start_xmit function,
> which print the entire skb, and the frames appear to be written to the
> TX message buffer in the correct order. They are seen, however, in the
> incorrect order on the wire.
Which driver are you using? The mainline driver only uses one TX buffer.
Marc
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