From: Borislav Petkov <[email protected]>
v2: Address all comments from last round.
v1:
So this basically moves the mce-inject module to arch/x86/ras/ and adds
a bunch of features to it.
More importantly, though, it creates all the glue to add the
arch/x86/ras/ directory to Kconfig. The idea is to gradually collect
RAS-related stuff there.
Tony, please take a look and let me know how do you find the general
layout, etc.
Thanks.
Borislav Petkov (6):
x86, RAS: Add a barebones RAS subtree
x86, RAS: Move AMD MCE injection code into ras/
x86, RAS: Convert mce-inject module to debugfs
x86, RAS: Add function enabling direct writes to MCE MSRs
x86, RAS: Add attributes needed for HW injection
x86, RAS: Add an injector function
arch/x86/Kconfig | 8 ++
arch/x86/Makefile | 3 +
arch/x86/ras/Kconfig | 14 +++
arch/x86/ras/Makefile | 1 +
arch/x86/ras/amd/Makefile | 3 +
arch/x86/ras/amd/mce-inject.c | 274 ++++++++++++++++++++++++++++++++++++++++++
drivers/edac/Kconfig | 10 --
drivers/edac/mce_amd_inj.c | 173 --------------------------
8 files changed, 303 insertions(+), 183 deletions(-)
create mode 100644 arch/x86/ras/Kconfig
create mode 100644 arch/x86/ras/Makefile
create mode 100644 arch/x86/ras/amd/Makefile
create mode 100644 arch/x86/ras/amd/mce-inject.c
delete mode 100644 drivers/edac/mce_amd_inj.c
--
1.8.0.rc2.4.g42e55a5
From: Borislav Petkov <[email protected]>
Normally, writing to MCE MSRs causes a #GP. Add a function to enable
direct accesses to those MSRs.
Signed-off-by: Borislav Petkov <[email protected]>
---
arch/x86/ras/amd/mce-inject.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
index 66969eab5591..c0c811579ce9 100644
--- a/arch/x86/ras/amd/mce-inject.c
+++ b/arch/x86/ras/amd/mce-inject.c
@@ -55,6 +55,30 @@ DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n");
DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n");
/*
+ * Caller needs to be make sure this cpu doesn't disappear
+ * from under us, i.e.: get_cpu/put_cpu.
+ */
+static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
+{
+ u32 l, h;
+ int err;
+
+ err = rdmsr_on_cpu(cpu, MSR_K7_HWCR, &l, &h);
+ if (err) {
+ pr_err("%s: error reading HWCR\n", __func__);
+ return err;
+ }
+
+ enable ? (l |= BIT(18)) : (l &= ~BIT(18));
+
+ err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, l, h);
+ if (err)
+ pr_err("%s: error writing HWCR\n", __func__);
+
+ return err;
+}
+
+/*
* This denotes into which bank we're injecting and triggers
* the injection, at the same time.
*/
--
1.8.0.rc2.4.g42e55a5
From: Borislav Petkov <[email protected]>
This is the code collecting all AMD MCE injection methods.
No functionality change.
Signed-off-by: Borislav Petkov <[email protected]>
---
arch/x86/Kconfig | 2 ++
arch/x86/ras/Kconfig | 11 +++++++++++
arch/x86/ras/Makefile | 1 +
arch/x86/ras/amd/Makefile | 3 +++
drivers/edac/mce_amd_inj.c => arch/x86/ras/amd/mce-inject.c | 2 +-
drivers/edac/Kconfig | 10 ----------
6 files changed, 18 insertions(+), 11 deletions(-)
create mode 100644 arch/x86/ras/Kconfig
create mode 100644 arch/x86/ras/amd/Makefile
rename drivers/edac/mce_amd_inj.c => arch/x86/ras/amd/mce-inject.c (99%)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e882fc64ffb3..f2f704af9f86 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -666,6 +666,8 @@ config X86_RAS
A collection of Reliability, Availability and Serviceability software
features which enable hardware error logging and reporting.
+source "arch/x86/ras/Kconfig"
+
source "arch/x86/Kconfig.cpu"
config HPET_TIMER
diff --git a/arch/x86/ras/Kconfig b/arch/x86/ras/Kconfig
new file mode 100644
index 000000000000..9362f54bfe0f
--- /dev/null
+++ b/arch/x86/ras/Kconfig
@@ -0,0 +1,11 @@
+menu "AMD RAS features"
+ depends on X86_RAS && CPU_SUP_AMD
+
+config X86_AMD_MCE_INJECT
+ tristate "Simple MCE injection interface over /sysfs"
+ default n
+ help
+ This is a simple interface to inject MCEs over /sysfs and test
+ the MCE decoding code.
+
+endmenu
diff --git a/arch/x86/ras/Makefile b/arch/x86/ras/Makefile
index e69de29bb2d1..dd7a321e4b5e 100644
--- a/arch/x86/ras/Makefile
+++ b/arch/x86/ras/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_X86_MCE) += amd/
diff --git a/arch/x86/ras/amd/Makefile b/arch/x86/ras/amd/Makefile
new file mode 100644
index 000000000000..74f2a1e676b4
--- /dev/null
+++ b/arch/x86/ras/amd/Makefile
@@ -0,0 +1,3 @@
+amd_mce_inject-y := mce-inject.o
+obj-$(CONFIG_X86_AMD_MCE_INJECT) += amd_mce_inject.o
+
diff --git a/drivers/edac/mce_amd_inj.c b/arch/x86/ras/amd/mce-inject.c
similarity index 99%
rename from drivers/edac/mce_amd_inj.c
rename to arch/x86/ras/amd/mce-inject.c
index 66b5151c1080..90aa317b09a6 100644
--- a/drivers/edac/mce_amd_inj.c
+++ b/arch/x86/ras/amd/mce-inject.c
@@ -16,7 +16,7 @@
#include <linux/module.h>
#include <asm/mce.h>
-#include "mce_amd.h"
+#include "../../../drivers/edac/mce_amd.h"
struct edac_mce_attr {
struct attribute attr;
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 409b92b8d346..96c1f6f4b6a1 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -59,16 +59,6 @@ config EDAC_DECODE_MCE
which occur really early upon boot, before the module infrastructure
has been initialized.
-config EDAC_MCE_INJ
- tristate "Simple MCE injection interface over /sysfs"
- depends on EDAC_DECODE_MCE
- default n
- help
- This is a simple interface to inject MCEs over /sysfs and test
- the MCE decoding code in EDAC.
-
- This is currently AMD-only.
-
config EDAC_MM_EDAC
tristate "Main Memory EDAC (Error Detection And Correction) reporting"
help
--
1.8.0.rc2.4.g42e55a5
From: Borislav Petkov <[email protected]>
This should collect all x86 RAS-related stuff.
Signed-off-by: Borislav Petkov <[email protected]>
---
arch/x86/Kconfig | 6 ++++++
arch/x86/Makefile | 3 +++
2 files changed, 9 insertions(+)
create mode 100644 arch/x86/ras/Makefile
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 1ae94bcae5d9..e882fc64ffb3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -660,6 +660,12 @@ config X86_CYCLONE_TIMER
def_bool y
depends on X86_SUMMIT
+config X86_RAS
+ bool "X86 RAS features"
+ ---help---
+ A collection of Reliability, Availability and Serviceability software
+ features which enable hardware error logging and reporting.
+
source "arch/x86/Kconfig.cpu"
config HPET_TIMER
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 58790bd85c1d..2810e50b670d 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -163,6 +163,9 @@ libs-y += arch/x86/lib/
# See arch/x86/Kbuild for content of core part of the kernel
core-y += arch/x86/
+# RAS support
+core-$(CONFIG_X86_RAS) += arch/x86/ras/
+
# drivers-y are linked after core-y
drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/
drivers-$(CONFIG_PCI) += arch/x86/pci/
diff --git a/arch/x86/ras/Makefile b/arch/x86/ras/Makefile
new file mode 100644
index 000000000000..e69de29bb2d1
--
1.8.0.rc2.4.g42e55a5
From: Borislav Petkov <[email protected]>
hw_inject denotes whether we want to do a hardware or a software
injection and, in the case of hardware injection, we want to do that on
a particular cpu, thus the 'cpu' attribute.
Signed-off-by: Borislav Petkov <[email protected]>
---
arch/x86/ras/amd/mce-inject.c | 55 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
index c0c811579ce9..b55d69fbd6e3 100644
--- a/arch/x86/ras/amd/mce-inject.c
+++ b/arch/x86/ras/amd/mce-inject.c
@@ -79,6 +79,59 @@ static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
}
/*
+ * HW or SW injection
+ */
+static int hw_inj_get(void *data, u64 *val)
+{
+ struct mce *m = (struct mce *)data;
+
+ *val = !!(m->inject_flags & MCJ_EXCEPTION);
+
+ return 0;
+}
+
+static int hw_inj_set(void *data, u64 val)
+{
+ struct mce *m = (struct mce *)data;
+
+ switch (val) {
+ case 0:
+ m->inject_flags &= (u8)~MCJ_EXCEPTION;
+ break;
+
+ case 1:
+ m->inject_flags |= MCJ_EXCEPTION;
+ break;
+
+ default:
+ pr_err("%s: Only 0 or 1 allowed!\n", __func__);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(hw_inj_fops, hw_inj_get, hw_inj_set, "%llu\n");
+
+/*
+ * On which CPU to inject?
+ */
+MCE_INJECT_GET(extcpu);
+
+static int inj_extcpu_set(void *data, u64 val)
+{
+ struct mce *m = (struct mce *)data;
+
+ if (val >= nr_cpu_ids || !cpu_online(val)) {
+ pr_err("%s: Invalid CPU: %llu\n", __func__, val);
+ return -EINVAL;
+ }
+ m->extcpu = val;
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(extcpu_fops, inj_extcpu_get, inj_extcpu_set, "%llu\n");
+
+/*
* This denotes into which bank we're injecting and triggers
* the injection, at the same time.
*/
@@ -119,6 +172,8 @@ struct dfs_node {
{ .name = "misc", .fops = &misc_fops },
{ .name = "addr", .fops = &addr_fops },
{ .name = "bank", .fops = &bank_fops },
+ { .name = "hw_inject", .fops = &hw_inj_fops },
+ { .name = "cpu", .fops = &extcpu_fops },
};
static int __init init_mce_inject(void)
--
1.8.0.rc2.4.g42e55a5
From: Borislav Petkov <[email protected]>
Selectively inject either a real MCE or a sw-only version which
exercises the decoding code only. The hardware-injected MCE triggers a
machine check exception (#MC) so that the MCE handler can be bothered to
do something too.
Signed-off-by: Borislav Petkov <[email protected]>
---
arch/x86/ras/amd/mce-inject.c | 50 +++++++++++++++++++++++++++++++++++++++++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
index b55d69fbd6e3..24a1c870cd18 100644
--- a/arch/x86/ras/amd/mce-inject.c
+++ b/arch/x86/ras/amd/mce-inject.c
@@ -131,6 +131,53 @@ static int inj_extcpu_set(void *data, u64 val)
DEFINE_SIMPLE_ATTRIBUTE(extcpu_fops, inj_extcpu_get, inj_extcpu_set, "%llu\n");
+static void trigger_mce(void *info)
+{
+ asm volatile("int $18");
+}
+
+static void do_inject(void)
+{
+ u64 mcg_status = 0;
+ unsigned int cpu = i_mce.extcpu;
+ int this_cpu;
+ u8 b = i_mce.bank;
+
+ if (!(i_mce.inject_flags & MCJ_EXCEPTION)) {
+ amd_decode_mce(NULL, 0, &i_mce);
+ return;
+ }
+
+ /* prep MCE global settings for the injection */
+ mcg_status = MCG_STATUS_MCIP | MCG_STATUS_EIPV;
+
+ if (!(i_mce.status & MCI_STATUS_PCC))
+ mcg_status |= MCG_STATUS_RIPV;
+
+ this_cpu = get_cpu();
+
+ toggle_hw_mce_inject(cpu, true);
+
+ wrmsr_on_cpu(cpu, MSR_IA32_MCG_STATUS,
+ (u32)mcg_status, (u32)(mcg_status >> 32));
+
+ wrmsr_on_cpu(cpu, MSR_IA32_MCx_STATUS(b),
+ (u32)i_mce.status, (u32)(i_mce.status >> 32));
+
+ wrmsr_on_cpu(cpu, MSR_IA32_MCx_ADDR(b),
+ (u32)i_mce.addr, (u32)(i_mce.addr >> 32));
+
+ wrmsr_on_cpu(cpu, MSR_IA32_MCx_MISC(b),
+ (u32)i_mce.misc, (u32)(i_mce.misc >> 32));
+
+ toggle_hw_mce_inject(cpu, false);
+
+ smp_call_function_single(cpu, trigger_mce, NULL, 0);
+
+ put_cpu();
+
+}
+
/*
* This denotes into which bank we're injecting and triggers
* the injection, at the same time.
@@ -147,8 +194,7 @@ static int inj_bank_set(void *data, u64 val)
}
m->bank = val;
-
- amd_decode_mce(NULL, 0, m);
+ do_inject();
return 0;
}
--
1.8.0.rc2.4.g42e55a5
From: Borislav Petkov <[email protected]>
This is a module which is used for debugging MCE decoding paths so its
userspace interface should go to debugfs, where it belongs conceptually.
While at it, add a warning to the Kconfig text that this interface is
unstable and no userspace scripts should rely all too much on it.
Signed-off-by: Borislav Petkov <[email protected]>
---
arch/x86/ras/Kconfig | 11 ++-
arch/x86/ras/amd/mce-inject.c | 182 ++++++++++++++++++------------------------
2 files changed, 86 insertions(+), 107 deletions(-)
diff --git a/arch/x86/ras/Kconfig b/arch/x86/ras/Kconfig
index 9362f54bfe0f..4334ab92b3b0 100644
--- a/arch/x86/ras/Kconfig
+++ b/arch/x86/ras/Kconfig
@@ -2,10 +2,13 @@ menu "AMD RAS features"
depends on X86_RAS && CPU_SUP_AMD
config X86_AMD_MCE_INJECT
- tristate "Simple MCE injection interface over /sysfs"
+ tristate "Inject MCEs"
+ depends on DEBUG_FS
default n
- help
- This is a simple interface to inject MCEs over /sysfs and test
- the MCE decoding code.
+ ---help---
+ This is a simple debugfs interface to inject MCEs and test different
+ aspects of the MCE handling code.
+
+ WARNING: Do not even assume that this interface is staying stable!
endmenu
diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
index 90aa317b09a6..66969eab5591 100644
--- a/arch/x86/ras/amd/mce-inject.c
+++ b/arch/x86/ras/amd/mce-inject.c
@@ -1,173 +1,149 @@
/*
- * A simple MCE injection facility for testing the MCE decoding code. This
- * driver should be built as module so that it can be loaded on production
- * kernels for testing purposes.
+ * A simple MCE injection facility for testing different aspects of the RAS
+ * code. This driver should be built as module so that it can be loaded
+ * on production kernels for testing purposes.
*
* This file may be distributed under the terms of the GNU General Public
* License version 2.
*
- * Copyright (c) 2010: Borislav Petkov <[email protected]>
- * Advanced Micro Devices Inc.
+ * Copyright (c) 2010-12: Borislav Petkov <[email protected]>
+ * Advanced Micro Devices Inc.
*/
#include <linux/kobject.h>
+#include <linux/debugfs.h>
#include <linux/device.h>
-#include <linux/edac.h>
#include <linux/module.h>
#include <asm/mce.h>
#include "../../../drivers/edac/mce_amd.h"
-struct edac_mce_attr {
- struct attribute attr;
- ssize_t (*show) (struct kobject *kobj, struct edac_mce_attr *attr, char *buf);
- ssize_t (*store)(struct kobject *kobj, struct edac_mce_attr *attr,
- const char *buf, size_t count);
-};
-
-#define EDAC_MCE_ATTR(_name, _mode, _show, _store) \
-static struct edac_mce_attr mce_attr_##_name = __ATTR(_name, _mode, _show, _store)
-
-static struct kobject *mce_kobj;
-
/*
* Collect all the MCi_XXX settings
*/
static struct mce i_mce;
+static struct dentry *dfs_inj;
-#define MCE_INJECT_STORE(reg) \
-static ssize_t edac_inject_##reg##_store(struct kobject *kobj, \
- struct edac_mce_attr *attr, \
- const char *data, size_t count)\
+#define MCE_INJECT_SET(reg) \
+static int inj_##reg##_set(void *data, u64 val) \
{ \
- int ret = 0; \
- unsigned long value; \
- \
- ret = strict_strtoul(data, 16, &value); \
- if (ret < 0) \
- printk(KERN_ERR "Error writing MCE " #reg " field.\n"); \
- \
- i_mce.reg = value; \
+ struct mce *m = (struct mce *)data; \
\
- return count; \
+ m->reg = val; \
+ return 0; \
}
-MCE_INJECT_STORE(status);
-MCE_INJECT_STORE(misc);
-MCE_INJECT_STORE(addr);
+MCE_INJECT_SET(status);
+MCE_INJECT_SET(misc);
+MCE_INJECT_SET(addr);
-#define MCE_INJECT_SHOW(reg) \
-static ssize_t edac_inject_##reg##_show(struct kobject *kobj, \
- struct edac_mce_attr *attr, \
- char *buf) \
+#define MCE_INJECT_GET(reg) \
+static int inj_##reg##_get(void *data, u64 *val) \
{ \
- return sprintf(buf, "0x%016llx\n", i_mce.reg); \
+ struct mce *m = (struct mce *)data; \
+ \
+ *val = m->reg; \
+ return 0; \
}
-MCE_INJECT_SHOW(status);
-MCE_INJECT_SHOW(misc);
-MCE_INJECT_SHOW(addr);
+MCE_INJECT_GET(status);
+MCE_INJECT_GET(misc);
+MCE_INJECT_GET(addr);
-EDAC_MCE_ATTR(status, 0644, edac_inject_status_show, edac_inject_status_store);
-EDAC_MCE_ATTR(misc, 0644, edac_inject_misc_show, edac_inject_misc_store);
-EDAC_MCE_ATTR(addr, 0644, edac_inject_addr_show, edac_inject_addr_store);
+DEFINE_SIMPLE_ATTRIBUTE(status_fops, inj_status_get, inj_status_set, "%llx\n");
+DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n");
+DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n");
/*
* This denotes into which bank we're injecting and triggers
* the injection, at the same time.
*/
-static ssize_t edac_inject_bank_store(struct kobject *kobj,
- struct edac_mce_attr *attr,
- const char *data, size_t count)
+static int inj_bank_set(void *data, u64 val)
{
- int ret = 0;
- unsigned long value;
+ struct mce *m = (struct mce *)data;
- ret = strict_strtoul(data, 10, &value);
- if (ret < 0) {
- printk(KERN_ERR "Invalid bank value!\n");
- return -EINVAL;
- }
-
- if (value > 5)
- if (boot_cpu_data.x86 != 0x15 || value > 6) {
- printk(KERN_ERR "Non-existent MCE bank: %lu\n", value);
+ if (val > 5) {
+ if (boot_cpu_data.x86 != 0x15 || val > 6) {
+ pr_err("Non-existent MCE bank: %llu\n", val);
return -EINVAL;
}
+ }
- i_mce.bank = value;
+ m->bank = val;
- amd_decode_mce(NULL, 0, &i_mce);
+ amd_decode_mce(NULL, 0, m);
- return count;
+ return 0;
}
-static ssize_t edac_inject_bank_show(struct kobject *kobj,
- struct edac_mce_attr *attr, char *buf)
+static int inj_bank_get(void *data, u64 *val)
{
- return sprintf(buf, "%d\n", i_mce.bank);
-}
+ struct mce *m = (struct mce *)data;
-EDAC_MCE_ATTR(bank, 0644, edac_inject_bank_show, edac_inject_bank_store);
+ *val = m->bank;
+ return 0;
+}
-static struct edac_mce_attr *sysfs_attrs[] = { &mce_attr_status, &mce_attr_misc,
- &mce_attr_addr, &mce_attr_bank
+DEFINE_SIMPLE_ATTRIBUTE(bank_fops, inj_bank_get, inj_bank_set, "%llu\n");
+
+struct dfs_node {
+ char *name;
+ struct dentry *d;
+ const struct file_operations *fops;
+} dfs_fls[] = {
+ { .name = "status", .fops = &status_fops },
+ { .name = "misc", .fops = &misc_fops },
+ { .name = "addr", .fops = &addr_fops },
+ { .name = "bank", .fops = &bank_fops },
};
-static int __init edac_init_mce_inject(void)
+static int __init init_mce_inject(void)
{
- struct bus_type *edac_subsys = NULL;
- int i, err = 0;
+ int i;
- edac_subsys = edac_get_sysfs_subsys();
- if (!edac_subsys)
+ dfs_inj = debugfs_create_dir("mce-inject", NULL);
+ if (!dfs_inj)
return -EINVAL;
- mce_kobj = kobject_create_and_add("mce", &edac_subsys->dev_root->kobj);
- if (!mce_kobj) {
- printk(KERN_ERR "Error creating a mce kset.\n");
- err = -ENOMEM;
- goto err_mce_kobj;
- }
+ for (i = 0; i < ARRAY_SIZE(dfs_fls); i++) {
+ dfs_fls[i].d = debugfs_create_file(dfs_fls[i].name,
+ S_IRUSR | S_IWUSR,
+ dfs_inj,
+ &i_mce,
+ dfs_fls[i].fops);
- for (i = 0; i < ARRAY_SIZE(sysfs_attrs); i++) {
- err = sysfs_create_file(mce_kobj, &sysfs_attrs[i]->attr);
- if (err) {
- printk(KERN_ERR "Error creating %s in sysfs.\n",
- sysfs_attrs[i]->attr.name);
- goto err_sysfs_create;
- }
+ if (!dfs_fls[i].d)
+ goto err_dfs_add;
}
+
return 0;
-err_sysfs_create:
+err_dfs_add:
while (--i >= 0)
- sysfs_remove_file(mce_kobj, &sysfs_attrs[i]->attr);
+ debugfs_remove(dfs_fls[i].d);
- kobject_del(mce_kobj);
+ debugfs_remove(dfs_inj);
+ dfs_inj = NULL;
-err_mce_kobj:
- edac_put_sysfs_subsys();
-
- return err;
+ return -ENOMEM;
}
-static void __exit edac_exit_mce_inject(void)
+static void __exit exit_mce_inject(void)
{
int i;
- for (i = 0; i < ARRAY_SIZE(sysfs_attrs); i++)
- sysfs_remove_file(mce_kobj, &sysfs_attrs[i]->attr);
+ for (i = 0; i < ARRAY_SIZE(dfs_fls); i++)
+ debugfs_remove(dfs_fls[i].d);
- kobject_del(mce_kobj);
+ memset(&dfs_fls, 0, sizeof(dfs_fls));
- edac_put_sysfs_subsys();
+ debugfs_remove(dfs_inj);
+ dfs_inj = NULL;
}
-
-module_init(edac_init_mce_inject);
-module_exit(edac_exit_mce_inject);
+module_init(init_mce_inject);
+module_exit(exit_mce_inject);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Borislav Petkov <[email protected]>");
MODULE_AUTHOR("AMD Inc.");
-MODULE_DESCRIPTION("MCE injection facility for testing MCE decoding");
+MODULE_DESCRIPTION("MCE injection facility for RAS testing");
--
1.8.0.rc2.4.g42e55a5
On Tue, 2012-10-16 at 16:52 +0200, Borislav Petkov wrote:
> From: Borislav Petkov <[email protected]>
[]
> diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
[]
> +#define MCE_INJECT_GET(reg) \
> +static int inj_##reg##_get(void *data, u64 *val) \
> { \
> - return sprintf(buf, "0x%016llx\n", i_mce.reg); \
> + struct mce *m = (struct mce *)data; \
trivia: doesn't need a cast
On Tue, Oct 16, 2012 at 08:41:17AM -0700, Joe Perches wrote:
> On Tue, 2012-10-16 at 16:52 +0200, Borislav Petkov wrote:
> > From: Borislav Petkov <[email protected]>
> []
> > diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
> []
> > +#define MCE_INJECT_GET(reg) \
> > +static int inj_##reg##_get(void *data, u64 *val) \
> > { \
> > - return sprintf(buf, "0x%016llx\n", i_mce.reg); \
> > + struct mce *m = (struct mce *)data; \
>
> trivia: doesn't need a cast
Corrected, thanks.
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551
On Tue, 2012-10-16 at 16:52 +0200, Borislav Petkov wrote:
> From: Borislav Petkov <[email protected]>
>
> Normally, writing to MCE MSRs causes a #GP. Add a function to enable
> direct accesses to those MSRs.
[]
> diff --git a/arch/x86/ras/amd/mce-inject.c b/arch/x86/ras/amd/mce-inject.c
> @@ -55,6 +55,30 @@ DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n");
[]
> +static int toggle_hw_mce_inject(unsigned int cpu, bool enable)
[]
> + enable ? (l |= BIT(18)) : (l &= ~BIT(18));
This is very unusual style.
I found just one like it in the kernel tree.
(unnecessary parens here too btw)
This style is much more common:
if (enable)
l |= BIT(18);
else
l &= ~BIT(18);
Borislav Petkov <[email protected]> writes:
> From: Borislav Petkov <[email protected]>
>
> This is a module which is used for debugging MCE decoding paths so its
> userspace interface should go to debugfs, where it belongs conceptually.
>
> While at it, add a warning to the Kconfig text that this interface is
> unstable and no userspace scripts should rely all too much on it.
Nack. You broke mce-test/mce-inject, aka existing userland which is not
allowed in Linux.
-Andi
--
[email protected] -- Speaking for myself only
On Wed, Oct 17, 2012 at 12:06:35PM -0700, Andi Kleen wrote:
> Borislav Petkov <[email protected]> writes:
>
> > From: Borislav Petkov <[email protected]>
> >
> > This is a module which is used for debugging MCE decoding paths so its
> > userspace interface should go to debugfs, where it belongs conceptually.
> >
> > While at it, add a warning to the Kconfig text that this interface is
> > unstable and no userspace scripts should rely all too much on it.
>
> Nack. You broke mce-test/mce-inject, aka existing userland which is not
> allowed in Linux.
WTF? Have you actually even looked at the patch?
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551