2012-10-28 20:35:44

by Roland Stigge

Subject: [PATCH 1/3] ARM: LPC32xx: Remove superfluous irq_alloc_descs()

This patch removes the call to irq_alloc_descs() which always returns an error
since the descriptors are always preallocated already.

Signed-off-by: Roland Stigge <[email protected]>
---
arch/arm/mach-lpc32xx/irq.c | 10 +---------
1 file changed, 1 insertion(+), 9 deletions(-)

--- linux-2.6.orig/arch/arm/mach-lpc32xx/irq.c
+++ linux-2.6/arch/arm/mach-lpc32xx/irq.c
@@ -412,7 +412,6 @@ static const struct of_device_id mic_of_
void __init lpc32xx_init_irq(void)
{
unsigned int i;
- int irq_base;

/* Setup MIC */
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE));
@@ -475,15 +474,8 @@ void __init lpc32xx_init_irq(void)

of_irq_init(mic_of_match);

- irq_base = irq_alloc_descs(-1, 0, NR_IRQS, 0);
- if (irq_base < 0) {
- pr_warn("Cannot allocate irq_descs, assuming pre-allocated\n");
- irq_base = 0;
- }
-
lpc32xx_mic_domain = irq_domain_add_legacy(lpc32xx_mic_np, NR_IRQS,
- irq_base, 0,
- &irq_domain_simple_ops,
+ 0, 0, &irq_domain_simple_ops,
NULL);
if (!lpc32xx_mic_domain)
panic("Unable to add MIC irq domain\n");

2012-10-28 20:35:50

by Roland Stigge

Subject: [PATCH 3/3] ARM: LPC32xx: Cleanup irq.c

This patch removes the IRQ mask initialization which is already done some lines
above.

This was actually a bug: The init was supposed to set the bits for the
(chained) SUB IRQs. But this is already fixed by the previous patch, doing this
implicitely via irq_set_chained_handler().

Signed-off-by: Roland Stigge <[email protected]>
---
arch/arm/mach-lpc32xx/irq.c | 5 -----
1 file changed, 5 deletions(-)

--- linux-2.6.orig/arch/arm/mach-lpc32xx/irq.c
+++ linux-2.6/arch/arm/mach-lpc32xx/irq.c
@@ -442,11 +442,6 @@ void __init lpc32xx_init_irq(void)
lpc32xx_set_default_mappings(SIC1_APR_DEFAULT, SIC1_ATR_DEFAULT, 32);
lpc32xx_set_default_mappings(SIC2_APR_DEFAULT, SIC2_ATR_DEFAULT, 64);

- /* mask all interrupts except SUBIRQ */
- __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE));
- __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
- __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
-
/* Initially disable all wake events */
__raw_writel(0, LPC32XX_CLKPWR_P01_ER);
__raw_writel(0, LPC32XX_CLKPWR_INT_ER);

2012-10-28 20:35:44

by Roland Stigge

Subject: [PATCH 2/3] ARM: LPC32xx: Relocate calls to irq_set_chained_handler()

This patch fixes the issue of an access to a yet uninitialized data structure
at the point where irq_set_chained_handler() was called by moving the
respective calls to the end of lpc32xx_init_irq().

The call path was:

irq_set_chained_handler()
-> __irq_set_handler()
-> irq_startup()
-> irq_enable()
-> desc->irq_data.chip->irq_unmask()

at which point lpc32xx_unmask_irq() effectively read desc->irq_data.hwirq which
was only later initialized.

Signed-off-by: Roland Stigge <[email protected]>
---
arch/arm/mach-lpc32xx/irq.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

--- linux-2.6.orig/arch/arm/mach-lpc32xx/irq.c
+++ linux-2.6/arch/arm/mach-lpc32xx/irq.c
@@ -447,10 +447,6 @@ void __init lpc32xx_init_irq(void)
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));

- /* MIC SUBIRQx interrupts will route handling to the chain handlers */
- irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
- irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
-
/* Initially disable all wake events */
__raw_writel(0, LPC32XX_CLKPWR_P01_ER);
__raw_writel(0, LPC32XX_CLKPWR_INT_ER);
@@ -479,4 +475,8 @@ void __init lpc32xx_init_irq(void)
NULL);
if (!lpc32xx_mic_domain)
panic("Unable to add MIC irq domain\n");
+
+ /* MIC SUBIRQx interrupts will route handling to the chain handlers */
+ irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
+ irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
}