Changes since v8:
- Removed edma node interrupt-parent property, it is inherited
Changes since v7:
- Dropped dmaengine compat() patch. It is upstream.
- Submitted edma_alloc_slot() error checking bug fix separately,
now a dependency
- Fixed bisect issues due to 3/10 hunks that went into 1/10
- Fixed incorrect IS_ERRVALUE() use in 3/10
Changes since v6:
- Converted edma_of_read_*() to wrappers around of_property_read_*()
- Fixed wording on the omap-spi generic DMA properties
- Added comment/check to clarify that the driver only supports
a single EDMA instance when booting from DT
Changes since v5:
- Dropped mmc portion and moved it to a separate series
- Incorporate corrected version of dma_request_slave_channel_compat()
- Fix #defines and enablement of TI_PRIV_EDMA option
Changes since v4:
- Fixed debug section mismatch in private edma api [01/14]
- Respun format-patch to catch the platform_data/edma.h rename [01/14]
- Removed address/size-cells from the EDMA binding [05/14]
Changes since v3:
- Rebased on 3.8-rc3
- No longer an RFC
- Fixed bugs in DT/pdata parsing reported by Vaibhav Bedia
- Restored all the Davinci pdata to const
- Removed max_segs hack in favor of using dma_get_channel_caps()
- Fixed extra parens, __raw_* accessors and, ioremap error checks
in xbar handling
- Removed excess license info in platform_data/edma.h
- Removed unneeded reserved channels data for AM33xx
- Removed test-specific pinmuxing from dts files
- Adjusted mmc1 node to be disabled by default in the dtsi
Changes since v2:
- Rebased on 3.7-rc1
- Fixed bug in DT/pdata parsing first found by Gururaja
that turned out to be masked by some toolchains
- Dropped unused mach-omap2/devices.c hsmmc patch
- Added AM33XX crossbar DMA event mux support
- Added am335x-evm support
Changes since v1:
- Rebased on top of mainline from 12250d8
- Dropped the feature removal schedule patch
- Implemented dma_request_slave_channel_compat() and
converted the mmc and spi drivers to use it
- Dropped unneeded #address-cells and #size-cells from
EDMA DT support
- Moved private EDMA header to linux/platform_data/ and
removed some unneeded definitions
- Fixed parsing of optional properties
This series adds DMA Engine support for AM33xx, which uses
an EDMA DMAC. The EDMA DMAC has been previously supported by only
a private API implementation (much like the situation with OMAP
DMA) found on the DaVinci family of SoCs.
The series applies on top of 3.9-rc1 and the following patches:
- edma private api error check fix from
http://www.spinics.net/lists/arm-kernel/msg227886.html
The approach taken is similar to how OMAP DMA is being converted to
DMA Engine support. With the functional EDMA private API already
existing in mach-davinci/dma.c, we first move that to an ARM common
area so it can be shared. Adding DT and runtime PM support to the
private EDMA API implementation allows it to run on AM33xx. AM33xx
*only* boots using DT so the upstream generic DT DMA helpers are
leveraged to register EDMA DMAC with the of_dma framework. SPI (and
MMC in a separate series) are supported using the upstream
dma_request_slave_channel_compat() dmaengine call that allows
compatibility with !DT platforms.
With this series both BeagleBone and the AM335x EVM have working
SPI DMA support (and MMC support with the separate MMC series).
This is tested on BeagleBone with a SPI framebuffer driver and MMC
rootfs. A trivial gpio DMA event misc driver was used to test the
crossbar DMA event support. It is also tested on the AM335x EVM
with the onboard SPI flash and MMC rootfs. Note that MMC can only
be tested with a separate MMC dmaengine/DT series applied.
Regression testing was done on AM180x-EVM (which also makes use
of the EDMA dmaengine driver and the EDMA private API) using SD,
SPI flash, and the onboard audio supported by the ASoC Davinci
driver. Regression testing was also done on a BeagleBoard xM
booting from the legacy board file using MMC rootfs.
Matt Porter (9):
ARM: davinci: move private EDMA API to arm/common
ARM: edma: remove unused transfer controller handlers
ARM: edma: add AM33XX support to the private EDMA API
dmaengine: edma: enable build for AM33XX
dmaengine: edma: Add TI EDMA device tree binding
ARM: dts: add AM33XX EDMA support
spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
spi: omap2-mcspi: add generic DMA request support to the DT binding
ARM: dts: add AM33XX SPI DMA support
Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +-
arch/arm/Kconfig | 1 +
arch/arm/boot/dts/am33xx.dtsi | 29 ++
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/{mach-davinci/dma.c => common/edma.c} | 339 +++++++++++++++++---
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 6 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
arch/arm/mach-omap2/Kconfig | 1 +
drivers/dma/Kconfig | 2 +-
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
drivers/spi/spi-omap2-mcspi.c | 27 +-
include/linux/mfd/davinci_voicecodec.h | 3 +-
.../mach => include/linux/platform_data}/edma.h | 90 +-----
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 5 +-
29 files changed, 450 insertions(+), 160 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
rename arch/arm/{mach-davinci/dma.c => common/edma.c} (86%)
rename {arch/arm/mach-davinci/include/mach => include/linux/platform_data}/edma.h (59%)
--
1.7.9.5
The binding definition is based on the generic DMA controller
binding.
Signed-off-by: Matt Porter <[email protected]>
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
new file mode 100644
index 0000000..075a60e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
@@ -0,0 +1,49 @@
+TI EDMA
+
+Required properties:
+- compatible : "ti,edma3"
+- ti,hwmods: Name of the hwmods associated to the EDMA
+- ti,edma-regions: Number of regions
+- ti,edma-slots: Number of slots
+- ti,edma-queue-tc-map: List of transfer control to queue mappings
+- ti,edma-queue-priority-map: List of queue priority mappings
+- ti,edma-default-queue: Default queue value
+
+Optional properties:
+- ti,edma-reserved-channels: List of reserved channel regions
+- ti,edma-reserved-slots: List of reserved slot regions
+- ti,edma-xbar-event-map: Crossbar event to channel map
+
+Example:
+
+edma: edma@49000000 {
+ reg = <0x49000000 0x10000>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-reserved-channels = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8>;
+ ti,edma-reserved-slots = <0 2
+ 14 2
+ 26 6
+ 48 4
+ 56 8
+ 64 127>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ ti,edma-xbar-event-map = <1 12
+ 2 13>;
+};
--
1.7.9.5
Enable TI EDMA option on OMAP.
Signed-off-by: Matt Porter <[email protected]>
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 80b6997..3b7ea20 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -222,7 +222,7 @@ config SIRF_DMA
config TI_EDMA
tristate "TI EDMA support"
- depends on ARCH_DAVINCI
+ depends on ARCH_DAVINCI || ARCH_OMAP
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
default n
--
1.7.9.5
Adds support for parsing the TI EDMA DT data into the
required EDMA private API platform data. Enables runtime
PM support to initialize the EDMA hwmod. Adds AM33XX EDMA
crossbar event mux support. Enables build on OMAP.
Signed-off-by: Matt Porter <[email protected]>
Acked-by: Sekhar Nori <[email protected]>
---
arch/arm/common/edma.c | 300 ++++++++++++++++++++++++++++++++++--
arch/arm/mach-omap2/Kconfig | 1 +
include/linux/platform_data/edma.h | 1 +
3 files changed, 292 insertions(+), 10 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a1db6cd..e68ac38 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -24,6 +24,13 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/edma.h>
+#include <linux/err.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_dma.h>
+#include <linux/of_irq.h>
+#include <linux/pm_runtime.h>
#include <linux/platform_data/edma.h>
@@ -1369,31 +1376,278 @@ void edma_clear_event(unsigned channel)
EXPORT_SYMBOL(edma_clear_event);
/*-----------------------------------------------------------------------*/
+static int edma_of_read_u32_to_s8_array(const struct device_node *np,
+ const char *propname, s8 *out_values,
+ size_t sz)
+{
+ int ret;
+
+ ret = of_property_read_u8_array(np, propname, out_values, sz);
+ if (ret)
+ return ret;
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_of_read_u32_to_s16_array(const struct device_node *np,
+ const char *propname, s16 *out_values,
+ size_t sz)
+{
+ int ret;
+
+ ret = of_property_read_u16_array(np, propname, out_values, sz);
+ if (ret)
+ return ret;
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_xbar_event_map(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata, int len)
+{
+ int ret = 0;
+ int i;
+ struct resource res;
+ void *xbar;
+ const s16 (*xbar_chans)[2];
+ u32 shift, offset, mux;
+
+ xbar_chans = devm_kzalloc(dev,
+ len/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!xbar_chans)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(node, 1, &res);
+ if (ret)
+ return -EIO;
+
+ xbar = devm_ioremap(dev, res.start, resource_size(&res));
+ if (!xbar)
+ return -ENOMEM;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-xbar-event-map",
+ (s16 *)xbar_chans,
+ len/sizeof(u32));
+ if (ret)
+ return -EIO;
+
+ for (i = 0; xbar_chans[i][0] != -1; i++) {
+ shift = (xbar_chans[i][1] % 4) * 8;
+ offset = xbar_chans[i][1] >> 2;
+ offset <<= 2;
+ mux = readl((void *)((u32)xbar + offset));
+ mux &= ~(0xff << shift);
+ mux |= xbar_chans[i][0] << shift;
+ writel(mux, (void *)((u32)xbar + offset));
+ }
+
+ pdata->xbar_chans = xbar_chans;
+
+ return 0;
+}
+
+static int edma_of_parse_dt(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata)
+{
+ int ret = 0;
+ u32 value;
+ struct property *prop;
+ size_t sz;
+ struct edma_rsv_info *rsv_info;
+ const s16 (*rsv_chans)[2], (*rsv_slots)[2];
+ const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
+
+ memset(pdata, 0, sizeof(struct edma_soc_info));
+
+ ret = of_property_read_u32(node, "dma-channels", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_channel = value;
+
+ ret = of_property_read_u32(node, "ti,edma-regions", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_region = value;
+
+ ret = of_property_read_u32(node, "ti,edma-slots", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_slot = value;
+
+ pdata->n_cc = 1;
+ pdata->n_tc = 3;
+
+ rsv_info =
+ devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
+ if (!rsv_info)
+ return -ENOMEM;
+ pdata->rsv = rsv_info;
+
+ /* Build the reserved channel/slots arrays */
+ prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
+ if (prop) {
+ rsv_chans = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_chans)
+ return -ENOMEM;
+ pdata->rsv->rsv_chans = rsv_chans;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-channels",
+ (s16 *)rsv_chans,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
-static int __init edma_probe(struct platform_device *pdev)
+ prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
+ if (prop) {
+ rsv_slots = devm_kzalloc(dev,
+ sz/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!rsv_slots)
+ return -ENOMEM;
+ pdata->rsv->rsv_slots = rsv_slots;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-reserved-slots",
+ (s16 *)rsv_slots,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+ }
+
+ prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_tc_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_tc_map)
+ return -ENOMEM;
+ pdata->queue_tc_mapping = queue_tc_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_tc_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
+ if (!prop)
+ return -EINVAL;
+
+ queue_priority_map = devm_kzalloc(dev,
+ sz/sizeof(s8) + 2*sizeof(s8),
+ GFP_KERNEL);
+ if (!queue_priority_map)
+ return -ENOMEM;
+ pdata->queue_priority_mapping = queue_priority_map;
+
+ ret = edma_of_read_u32_to_s8_array(node,
+ "ti,edma-queue-tc-map",
+ (s8 *)queue_priority_map,
+ sz/sizeof(u32));
+ if (ret < 0)
+ return ret;
+
+ ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
+ if (ret < 0)
+ return ret;
+ pdata->default_queue = value;
+
+ prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
+ if (prop)
+ ret = edma_xbar_event_map(dev, node, pdata, sz);
+
+ return ret;
+}
+
+static struct of_dma_filter_info edma_filter_info = {
+ .filter_fn = edma_filter_fn,
+};
+
+static int edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
+ struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
+ struct edma_soc_info tmpinfo;
const s8 (*queue_priority_mapping)[2];
const s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
int status = -1;
const s16 (*rsv_chans)[2];
const s16 (*rsv_slots)[2];
+ const s16 (*xbar_chans)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
- struct resource *r[EDMA_MAX_CC] = {NULL};
+ struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
+ struct resource res[EDMA_MAX_CC];
resource_size_t len[EDMA_MAX_CC];
char res_name[10];
char irq_name[10];
+ struct device_node *node = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ if (node) {
+ /* Check if this is a second instance registered */
+ if (arch_num_cc) {
+ dev_err(dev, "only one EDMA instance is supported via DT\n");
+ return -ENODEV;
+ }
+ info = ninfo;
+ edma_of_parse_dt(dev, node, &tmpinfo);
+ info[0] = &tmpinfo;
+
+ dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
+ of_dma_controller_register(dev->of_node,
+ of_dma_simple_xlate,
+ &edma_filter_info);
+ }
if (!info)
return -ENODEV;
+ pm_runtime_enable(dev);
+ ret = pm_runtime_get_sync(dev);
+ if (ret < 0) {
+ dev_err(dev, "pm_runtime_get_sync() failed\n");
+ return ret;
+ }
+
for (j = 0; j < EDMA_MAX_CC; j++) {
- sprintf(res_name, "edma_cc%d", j);
- r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ if (!info[j]) {
+ if (!found)
+ return -ENODEV;
+ break;
+ }
+ if (node) {
+ ret = of_address_to_resource(node, j, &res[j]);
+ if (!ret)
+ r[j] = &res[j];
+ } else {
+ sprintf(res_name, "edma_cc%d", j);
+ r[j] = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
res_name);
- if (!r[j] || !info[j]) {
+ }
+ if (!r[j]) {
if (found)
break;
else
@@ -1468,8 +1722,22 @@ static int __init edma_probe(struct platform_device *pdev)
}
}
- sprintf(irq_name, "edma%d", j);
- irq[j] = platform_get_irq_byname(pdev, irq_name);
+ /* Clear the xbar mapped channels in unused list */
+ xbar_chans = info[j]->xbar_chans;
+ if (xbar_chans) {
+ for (i = 0; xbar_chans[i][1] != -1; i++) {
+ off = xbar_chans[i][1];
+ clear_bits(off, 1,
+ edma_cc[j]->edma_unused);
+ }
+ }
+
+ if (node)
+ irq[j] = irq_of_parse_and_map(node, 0);
+ else {
+ sprintf(irq_name, "edma%d", j);
+ irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_start = irq[j];
status = request_irq(irq[j], dma_irq_handler, 0, "edma",
&pdev->dev);
@@ -1479,8 +1747,12 @@ static int __init edma_probe(struct platform_device *pdev)
goto fail;
}
- sprintf(irq_name, "edma%d_err", j);
- err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ if (node)
+ err_irq[j] = irq_of_parse_and_map(node, 2);
+ else {
+ sprintf(irq_name, "edma%d_err", j);
+ err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_end = err_irq[j];
status = request_irq(err_irq[j], dma_ccerr_handler, 0,
"edma_error", &pdev->dev);
@@ -1541,9 +1813,17 @@ fail1:
return status;
}
+static const struct of_device_id edma_of_ids[] = {
+ { .compatible = "ti,edma3", },
+ {}
+};
static struct platform_driver edma_driver = {
- .driver.name = "edma",
+ .driver = {
+ .name = "edma",
+ .of_match_table = edma_of_ids,
+ },
+ .probe = edma_probe,
};
static int __init edma_init(void)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 49ac3df..d3b433d 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -16,6 +16,7 @@ config ARCH_OMAP2PLUS
select PINCTRL
select PROC_DEVICETREE if PROC_FS
select SPARSE_IRQ
+ select TI_PRIV_EDMA
select USE_OF
help
Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 2344ea2..ffc1fb2 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -177,6 +177,7 @@ struct edma_soc_info {
const s8 (*queue_tc_mapping)[2];
const s8 (*queue_priority_mapping)[2];
+ const s16 (*xbar_chans)[2];
};
#endif
--
1.7.9.5
Adds DMA resources to the AM33XX SPI nodes.
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/boot/dts/am33xx.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index cbea5ab..c3c781a 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -327,6 +327,11 @@
interrupt = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
+ dmas = <&edma 16
+ &edma 17
+ &edma 18
+ &edma 19>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
@@ -338,6 +343,11 @@
interrupt = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
--
1.7.9.5
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <[email protected]>
Acked-by: Mark Brown <[email protected]>
---
drivers/spi/spi-omap2-mcspi.c | 27 ++++++++++++++++++++-------
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 893c3d7..38d0915 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -102,6 +102,9 @@ struct omap2_mcspi_dma {
struct completion dma_tx_completion;
struct completion dma_rx_completion;
+
+ char dma_rx_ch_name[14];
+ char dma_tx_ch_name[14];
};
/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
@@ -822,14 +825,23 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = mcspi_dma->dma_rx_sync_dev;
- mcspi_dma->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+
+ mcspi_dma->dma_rx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_rx_ch_name);
+
if (!mcspi_dma->dma_rx) {
dev_err(&spi->dev, "no RX DMA engine channel for McSPI\n");
return -EAGAIN;
}
sig = mcspi_dma->dma_tx_sync_dev;
- mcspi_dma->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+ mcspi_dma->dma_tx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_tx_ch_name);
+
if (!mcspi_dma->dma_tx) {
dev_err(&spi->dev, "no TX DMA engine channel for McSPI\n");
dma_release_channel(mcspi_dma->dma_rx);
@@ -1240,12 +1252,13 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
goto free_master;
for (i = 0; i < master->num_chipselect; i++) {
- char dma_ch_name[14];
+ char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
+ char *dma_tx_ch_name = mcspi->dma_channels[i].dma_tx_ch_name;
struct resource *dma_res;
- sprintf(dma_ch_name, "rx%d", i);
+ sprintf(dma_rx_ch_name, "rx%d", i);
dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
+ dma_rx_ch_name);
if (!dma_res) {
dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
status = -ENODEV;
@@ -1253,9 +1266,9 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
}
mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
- sprintf(dma_ch_name, "tx%d", i);
+ sprintf(dma_tx_ch_name, "tx%d", i);
dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
+ dma_tx_ch_name);
if (!dma_res) {
dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
status = -ENODEV;
--
1.7.9.5
The binding definition is based on the generic DMA request binding
Signed-off-by: Matt Porter <[email protected]>
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt
index 938809c..4c85c4c 100644
--- a/Documentation/devicetree/bindings/spi/omap-spi.txt
+++ b/Documentation/devicetree/bindings/spi/omap-spi.txt
@@ -10,7 +10,18 @@ Required properties:
input. The default is D0 as input and
D1 as output.
-Example:
+Optional properties:
+- dmas: List of DMA specifiers with the controller specific format
+ as described in the generic DMA client binding. A tx and rx
+ specifier is required for each chip select.
+- dma-names: List of DMA request names. These strings correspond
+ 1:1 with the DMA specifiers listed in dmas. The string naming
+ is to be "rxN" and "txN" for RX and TX requests,
+ respectively, where N equals the chip select number.
+
+Examples:
+
+[hwmod populated DMA resources]
mcspi1: mcspi@1 {
#address-cells = <1>;
@@ -20,3 +31,17 @@ mcspi1: mcspi@1 {
ti,spi-num-cs = <4>;
};
+[generic DMA request binding]
+
+mcspi1: mcspi@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "mcspi1";
+ ti,spi-num-cs = <2>;
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+};
--
1.7.9.5
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.
Signed-off-by: Matt Porter <[email protected]>
Acked-by: Sekhar Nori <[email protected]>
---
arch/arm/common/edma.c | 37 -------------------------------------
1 file changed, 37 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index dcaeb8e..a1db6cd 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -494,26 +494,6 @@ static irqreturn_t dma_ccerr_handler(int irq, void *data)
return IRQ_HANDLED;
}
-/******************************************************************************
- *
- * Transfer controller error interrupt handlers
- *
- *****************************************************************************/
-
-#define tc_errs_handled false /* disabled as long as they're NOPs */
-
-static irqreturn_t dma_tc0err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc0err_handler\n");
- return IRQ_HANDLED;
-}
-
-static irqreturn_t dma_tc1err_handler(int irq, void *data)
-{
- dev_dbg(data, "dma_tc1err_handler\n");
- return IRQ_HANDLED;
-}
-
static int reserve_contiguous_slots(int ctlr, unsigned int id,
unsigned int num_slots,
unsigned int start_slot)
@@ -1541,23 +1521,6 @@ static int __init edma_probe(struct platform_device *pdev)
arch_num_cc++;
}
- if (tc_errs_handled) {
- status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0,
- "edma_tc0", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
- IRQ_TCERRINT0, status);
- return status;
- }
- status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0,
- "edma_tc1", &pdev->dev);
- if (status < 0) {
- dev_dbg(&pdev->dev, "request_irq %d --> %d\n",
- IRQ_TCERRINT, status);
- return status;
- }
- }
-
return 0;
fail:
--
1.7.9.5
Adds AM33XX EDMA support to the am33xx.dtsi as documented in
Documentation/devicetree/bindings/dma/ti-edma.txt
Signed-off-by: Matt Porter <[email protected]>
---
arch/arm/boot/dts/am33xx.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 0957645..cbea5ab 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -87,6 +87,25 @@
reg = <0x48200000 0x1000>;
};
+ edma: edma@49000000 {
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ reg = <0x49000000 0x10000>,
+ <0x44e10f90 0x10>;
+ interrupts = <12 13 14>;
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-queue-tc-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-queue-priority-map = <0 0
+ 1 1
+ 2 2>;
+ ti,edma-default-queue = <0>;
+ };
+
gpio1: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
--
1.7.9.5
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well.
Signed-off-by: Matt Porter <[email protected]>
Acked-by: Sekhar Nori <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/common/Kconfig | 3 +
arch/arm/common/Makefile | 1 +
arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
arch/arm/mach-davinci/Makefile | 2 +-
arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
arch/arm/mach-davinci/davinci.h | 2 +-
arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
arch/arm/mach-davinci/devices.c | 6 +-
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
drivers/dma/edma.c | 2 +-
drivers/mmc/host/davinci_mmc.c | 1 +
include/linux/mfd/davinci_voicecodec.h | 3 +-
.../mach => include/linux/platform_data}/edma.h | 89 +-------------------
include/linux/platform_data/spi-davinci.h | 2 +-
sound/soc/davinci/davinci-evm.c | 1 +
sound/soc/davinci/davinci-pcm.c | 1 +
sound/soc/davinci/davinci-pcm.h | 2 +-
sound/soc/davinci/davinci-sffsdr.c | 5 +-
23 files changed, 33 insertions(+), 104 deletions(-)
rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
rename {arch/arm/mach-davinci/include/mach => include/linux/platform_data}/edma.h (59%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5b71469..cb80a4d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -956,6 +956,7 @@ config ARCH_DAVINCI
select GENERIC_IRQ_CHIP
select HAVE_IDE
select NEED_MACH_GPIO_H
+ select TI_PRIV_EDMA
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 9353184..c3a4e9c 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -17,3 +17,6 @@ config SHARP_PARAM
config SHARP_SCOOP
bool
+
+config TI_PRIV_EDMA
+ bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index dc8dd0d..9643c50 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
+obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
similarity index 99%
rename from arch/arm/mach-davinci/dma.c
rename to arch/arm/common/edma.c
index 45b7c71..dcaeb8e 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/common/edma.c
@@ -25,7 +25,7 @@
#include <linux/io.h>
#include <linux/slab.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/* Offsets matching "struct edmacc_param" */
#define PARM_OPT 0x00
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index fb5c1aa..493a36b 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
# Common objects
obj-y := time.o clock.o serial.o psc.o \
- dma.o usb.o common.o sram.o aemif.o
+ usb.o common.o sram.o aemif.o
obj-$(CONFIG_DAVINCI_MUX) += mux.o
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index 4f41602..10c9efd 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -26,12 +26,12 @@
#include <linux/input.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/mux.h>
#include <mach/cp_intc.h>
#include <mach/tnetv107x.h>
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544b..d26a6bc 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -23,9 +23,9 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/davinci_asp.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/keyscan-davinci.h>
#include <mach/hardware.h>
-#include <mach/edma.h>
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 773ab07..ba37760 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -18,10 +18,10 @@
#include <linux/dma-mapping.h>
#include <linux/clk.h>
#include <linux/slab.h>
+#include <linux/platform_data/edma.h>
#include <mach/common.h>
#include <mach/irqs.h>
-#include <mach/edma.h>
#include <mach/tnetv107x.h>
#include "clock.h"
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 4c48a36..ca0c7b3 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -19,9 +19,10 @@
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <mach/edma.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
+#include <linux/platform_data/edma.h>
+
#include "davinci.h"
#include "clock.h"
@@ -34,6 +35,9 @@
#define DM365_MMCSD0_BASE 0x01D11000
#define DM365_MMCSD1_BASE 0x01D00000
+#define DAVINCI_DMA_MMCRXEVT 26
+#define DAVINCI_DMA_MMCTXEVT 27
+
void __iomem *davinci_sysmod_base;
void davinci_map_sysmod(void)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b49c3b7..53998d8 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -19,7 +19,6 @@
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
@@ -28,6 +27,7 @@
#include <mach/common.h>
#include <linux/platform_data/spi-davinci.h>
#include <mach/gpio-davinci.h>
+#include <linux/platform_data/edma.h>
#include "davinci.h"
#include "clock.h"
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6c39805..9b41d33 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -18,11 +18,11 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <mach/irqs.h>
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index db1dd92..e8bf21f 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,11 +12,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index ac7b431..6d52a32 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -13,11 +13,11 @@
#include <linux/clk.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <asm/mach/map.h>
#include <mach/cputype.h>
-#include <mach/edma.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index de439b7..311daec 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -20,8 +20,8 @@
#include <linux/videodev2.h>
#include <mach/serial.h>
-#include <mach/edma.h>
#include <mach/pm.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index cd7e328..5f3e532 100644
--- a/drivers/dma/edma.c
+++ b/drivers/dma/edma.c
@@ -24,7 +24,7 @@
#include <linux/slab.h>
#include <linux/spinlock.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#include "dmaengine.h"
#include "virt-dma.h"
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
index 2063677..f5d46ea 100644
--- a/drivers/mmc/host/davinci_mmc.c
+++ b/drivers/mmc/host/davinci_mmc.c
@@ -35,6 +35,7 @@
#include <linux/edma.h>
#include <linux/mmc/mmc.h>
+#include <linux/platform_data/edma.h>
#include <linux/platform_data/mmc-davinci.h>
/*
diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
index 0ab6132..7dd6524 100644
--- a/include/linux/mfd/davinci_voicecodec.h
+++ b/include/linux/mfd/davinci_voicecodec.h
@@ -26,8 +26,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mfd/core.h>
-
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
/*
* Register values.
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/include/linux/platform_data/edma.h
similarity index 59%
rename from arch/arm/mach-davinci/include/mach/edma.h
rename to include/linux/platform_data/edma.h
index 7e84c90..2344ea2 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -1,28 +1,12 @@
/*
- * TI DAVINCI dma definitions
+ * TI EDMA definitions
*
- * Copyright (C) 2006-2009 Texas Instruments.
+ * Copyright (C) 2006-2013 Texas Instruments.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
*/
/*
@@ -69,11 +53,6 @@ struct edmacc_param {
unsigned int ccnt;
};
-#define CCINT0_INTERRUPT 16
-#define CCERRINT_INTERRUPT 17
-#define TCERRINT0_INTERRUPT 18
-#define TCERRINT1_INTERRUPT 19
-
/* fields in edmacc_param.opt */
#define SAM BIT(0)
#define DAM BIT(1)
@@ -87,70 +66,6 @@ struct edmacc_param {
#define TCCHEN BIT(22)
#define ITCCHEN BIT(23)
-#define TRWORD (0x7<<2)
-#define PAENTRY (0x1ff<<5)
-
-/* Drivers should avoid using these symbolic names for dm644x
- * channels, and use platform_device IORESOURCE_DMA resources
- * instead. (Other DaVinci chips have different peripherals
- * and thus have different DMA channel mappings.)
- */
-#define DAVINCI_DMA_MCBSP_TX 2
-#define DAVINCI_DMA_MCBSP_RX 3
-#define DAVINCI_DMA_VPSS_HIST 4
-#define DAVINCI_DMA_VPSS_H3A 5
-#define DAVINCI_DMA_VPSS_PRVU 6
-#define DAVINCI_DMA_VPSS_RSZ 7
-#define DAVINCI_DMA_IMCOP_IMXINT 8
-#define DAVINCI_DMA_IMCOP_VLCDINT 9
-#define DAVINCI_DMA_IMCO_PASQINT 10
-#define DAVINCI_DMA_IMCOP_DSQINT 11
-#define DAVINCI_DMA_SPI_SPIX 16
-#define DAVINCI_DMA_SPI_SPIR 17
-#define DAVINCI_DMA_UART0_URXEVT0 18
-#define DAVINCI_DMA_UART0_UTXEVT0 19
-#define DAVINCI_DMA_UART1_URXEVT1 20
-#define DAVINCI_DMA_UART1_UTXEVT1 21
-#define DAVINCI_DMA_UART2_URXEVT2 22
-#define DAVINCI_DMA_UART2_UTXEVT2 23
-#define DAVINCI_DMA_MEMSTK_MSEVT 24
-#define DAVINCI_DMA_MMCRXEVT 26
-#define DAVINCI_DMA_MMCTXEVT 27
-#define DAVINCI_DMA_I2C_ICREVT 28
-#define DAVINCI_DMA_I2C_ICXEVT 29
-#define DAVINCI_DMA_GPIO_GPINT0 32
-#define DAVINCI_DMA_GPIO_GPINT1 33
-#define DAVINCI_DMA_GPIO_GPINT2 34
-#define DAVINCI_DMA_GPIO_GPINT3 35
-#define DAVINCI_DMA_GPIO_GPINT4 36
-#define DAVINCI_DMA_GPIO_GPINT5 37
-#define DAVINCI_DMA_GPIO_GPINT6 38
-#define DAVINCI_DMA_GPIO_GPINT7 39
-#define DAVINCI_DMA_GPIO_GPBNKINT0 40
-#define DAVINCI_DMA_GPIO_GPBNKINT1 41
-#define DAVINCI_DMA_GPIO_GPBNKINT2 42
-#define DAVINCI_DMA_GPIO_GPBNKINT3 43
-#define DAVINCI_DMA_GPIO_GPBNKINT4 44
-#define DAVINCI_DMA_TIMER0_TINT0 48
-#define DAVINCI_DMA_TIMER1_TINT1 49
-#define DAVINCI_DMA_TIMER2_TINT2 50
-#define DAVINCI_DMA_TIMER3_TINT3 51
-#define DAVINCI_DMA_PWM0 52
-#define DAVINCI_DMA_PWM1 53
-#define DAVINCI_DMA_PWM2 54
-
-/* DA830 specific EDMA3 information */
-#define EDMA_DA830_NUM_DMACH 32
-#define EDMA_DA830_NUM_TCC 32
-#define EDMA_DA830_NUM_PARAMENTRY 128
-#define EDMA_DA830_NUM_EVQUE 2
-#define EDMA_DA830_NUM_TC 2
-#define EDMA_DA830_CHMAP_EXIST 0
-#define EDMA_DA830_NUM_REGIONS 4
-#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
-#define DA830_DMACH2EVENT_MAP1 0x00000000u
-#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
-
/*ch_status paramater of callback function possible values*/
#define DMA_COMPLETE 1
#define DMA_CC_ERROR 2
diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
index 7af305b..8dc2fa47 100644
--- a/include/linux/platform_data/spi-davinci.h
+++ b/include/linux/platform_data/spi-davinci.h
@@ -19,7 +19,7 @@
#ifndef __ARCH_ARM_DAVINCI_SPI_H
#define __ARCH_ARM_DAVINCI_SPI_H
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
#define SPI_INTERN_CS 0xFF
diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
index 484b22c..fd7c45b 100644
--- a/sound/soc/davinci/davinci-evm.c
+++ b/sound/soc/davinci/davinci-evm.c
@@ -14,6 +14,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/i2c.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
index afab81f..9bdd71b 100644
--- a/sound/soc/davinci/davinci-pcm.c
+++ b/sound/soc/davinci/davinci-pcm.c
@@ -17,6 +17,7 @@
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/genalloc.h>
+#include <linux/platform_data/edma.h>
#include <sound/core.h>
#include <sound/pcm.h>
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index b6ef703..fbb710c 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -14,7 +14,7 @@
#include <linux/genalloc.h>
#include <linux/platform_data/davinci_asp.h>
-#include <mach/edma.h>
+#include <linux/platform_data/edma.h>
struct davinci_pcm_dma_params {
int channel; /* sync dma channel ID */
diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
index 5be65aa..76ea586 100644
--- a/sound/soc/davinci/davinci-sffsdr.c
+++ b/sound/soc/davinci/davinci-sffsdr.c
@@ -17,6 +17,7 @@
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/edma.h>
#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
@@ -28,12 +29,14 @@
#include <asm/plat-sffsdr/sffsdr-fpga.h>
#endif
-#include <mach/edma.h>
#include "../codecs/pcm3008.h"
#include "davinci-pcm.h"
#include "davinci-i2s.h"
+#define DAVINCI_DMA_MCBSP_TX 2
+#define DAVINCI_DMA_MCBSP_RX 3
+
/*
* CLKX and CLKR are the inputs for the Sample Rate Generator.
* FSX and FSR are outputs, driven by the sample Rate Generator.
--
1.7.9.5
>>>>> "Matt" == Matt Porter <[email protected]> writes:
Matt> The binding definition is based on the generic DMA controller
Matt> binding.
Matt> Signed-off-by: Matt Porter <[email protected]>
Matt> ---
Matt> Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
Matt> 1 file changed, 49 insertions(+)
Matt> create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
Matt> diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
Matt> new file mode 100644
Matt> index 0000000..075a60e3
Matt> --- /dev/null
Matt> +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
Matt> @@ -0,0 +1,49 @@
Matt> +TI EDMA
Matt> +
Matt> +Required properties:
Matt> +- compatible : "ti,edma3"
Matt> +- ti,hwmods: Name of the hwmods associated to the EDMA
Matt> +- ti,edma-regions: Number of regions
Matt> +- ti,edma-slots: Number of slots
Matt> +- ti,edma-queue-tc-map: List of transfer control to queue mappings
Matt> +- ti,edma-queue-priority-map: List of queue priority mappings
Matt> +- ti,edma-default-queue: Default queue value
Matt> +
Matt> +Optional properties:
Matt> +- ti,edma-reserved-channels: List of reserved channel regions
Matt> +- ti,edma-reserved-slots: List of reserved slot regions
Matt> +- ti,edma-xbar-event-map: Crossbar event to channel map
Matt> +
Matt> +Example:
Matt> +
Matt> +edma: edma@49000000 {
Matt> + reg = <0x49000000 0x10000>;
Matt> + interrupt-parent = <&intc>;
Matt> + interrupts = <12 13 14>;
Probably interrupt-parent should be removed from the example as well to
match am33xx.dtsi
--
Bye, Peter Korsgaard
On Wed, Mar 06, 2013 at 08:24:06PM +0000, Peter Korsgaard wrote:
> >>>>> "Matt" == Matt Porter <[email protected]> writes:
>
> Matt> The binding definition is based on the generic DMA controller
> Matt> binding.
>
> Matt> Signed-off-by: Matt Porter <[email protected]>
> Matt> ---
> Matt> Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
> Matt> 1 file changed, 49 insertions(+)
> Matt> create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
>
> Matt> diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
> Matt> new file mode 100644
> Matt> index 0000000..075a60e3
> Matt> --- /dev/null
> Matt> +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
> Matt> @@ -0,0 +1,49 @@
> Matt> +TI EDMA
> Matt> +
> Matt> +Required properties:
> Matt> +- compatible : "ti,edma3"
> Matt> +- ti,hwmods: Name of the hwmods associated to the EDMA
> Matt> +- ti,edma-regions: Number of regions
> Matt> +- ti,edma-slots: Number of slots
> Matt> +- ti,edma-queue-tc-map: List of transfer control to queue mappings
> Matt> +- ti,edma-queue-priority-map: List of queue priority mappings
> Matt> +- ti,edma-default-queue: Default queue value
> Matt> +
> Matt> +Optional properties:
> Matt> +- ti,edma-reserved-channels: List of reserved channel regions
> Matt> +- ti,edma-reserved-slots: List of reserved slot regions
> Matt> +- ti,edma-xbar-event-map: Crossbar event to channel map
> Matt> +
> Matt> +Example:
> Matt> +
> Matt> +edma: edma@49000000 {
> Matt> + reg = <0x49000000 0x10000>;
> Matt> + interrupt-parent = <&intc>;
> Matt> + interrupts = <12 13 14>;
>
> Probably interrupt-parent should be removed from the example as well to
> match am33xx.dtsi
I'm not sure what the DT maintainers want here. Full context within the
example or the actual real usage where it's typically inherited.
Grant or Rob, any thoughts?
-Matt
On Wed, Mar 6, 2013 at 6:15 PM, Matt Porter <[email protected]> wrote:
> Adds support for parsing the TI EDMA DT data into the
> required EDMA private API platform data. Enables runtime
> PM support to initialize the EDMA hwmod. Adds AM33XX EDMA
> crossbar event mux support. Enables build on OMAP.
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> +static int edma_xbar_event_map(struct device *dev,
> + struct device_node *node,
> + struct edma_soc_info *pdata, int len)
> +{
> + int ret = 0;
> + int i;
> + struct resource res;
> + void *xbar;
> + const s16 (*xbar_chans)[2];
> + u32 shift, offset, mux;
> +
> + xbar_chans = devm_kzalloc(dev,
> + len/sizeof(s16) + 2*sizeof(s16),
> + GFP_KERNEL);
> + if (!xbar_chans)
> + return -ENOMEM;
> +
> + ret = of_address_to_resource(node, 1, &res);
> + if (ret)
> + return -EIO;
> +
> + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> + if (!xbar)
> + return -ENOMEM;
> +
> + ret = edma_of_read_u32_to_s16_array(node,
> + "ti,edma-xbar-event-map",
> + (s16 *)xbar_chans,
> + len/sizeof(u32));
> + if (ret)
> + return -EIO;
> +
> + for (i = 0; xbar_chans[i][0] != -1; i++) {
> + shift = (xbar_chans[i][1] % 4) * 8;
Looks like shift = (xbar_chans[i][1] & 0x03) << 3;
> + offset = xbar_chans[i][1] >> 2;
> + offset <<= 2;
Is it offset = xbar_chans[i][1] & 0xfffc; ?
> + mux = readl((void *)((u32)xbar + offset));
> + mux &= ~(0xff << shift);
> + mux |= xbar_chans[i][0] << shift;
> + writel(mux, (void *)((u32)xbar + offset));
> + }
--
With Best Regards,
Andy Shevchenko
On 3/6/2013 9:45 PM, Matt Porter wrote:
> Adds support for parsing the TI EDMA DT data into the
> required EDMA private API platform data. Enables runtime
> PM support to initialize the EDMA hwmod. Adds AM33XX EDMA
> crossbar event mux support. Enables build on OMAP.
>
> Signed-off-by: Matt Porter <[email protected]>
> Acked-by: Sekhar Nori <[email protected]>
> ---
> arch/arm/common/edma.c | 300 ++++++++++++++++++++++++++++++++++--
> arch/arm/mach-omap2/Kconfig | 1 +
> include/linux/platform_data/edma.h | 1 +
> 3 files changed, 292 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index a1db6cd..e68ac38 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -24,6 +24,13 @@
> #include <linux/platform_device.h>
> #include <linux/io.h>
> #include <linux/slab.h>
> +#include <linux/edma.h>
> +#include <linux/err.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_dma.h>
> +#include <linux/of_irq.h>
> +#include <linux/pm_runtime.h>
>
> #include <linux/platform_data/edma.h>
>
> @@ -1369,31 +1376,278 @@ void edma_clear_event(unsigned channel)
> EXPORT_SYMBOL(edma_clear_event);
>
> /*-----------------------------------------------------------------------*/
> +static int edma_of_read_u32_to_s8_array(const struct device_node *np,
> + const char *propname, s8 *out_values,
> + size_t sz)
> +{
> + int ret;
> +
> + ret = of_property_read_u8_array(np, propname, out_values, sz);
> + if (ret)
> + return ret;
> +
> + /* Terminate it */
> + *out_values++ = -1;
> + *out_values++ = -1;
> +
> + return 0;
> +}
> +
> +static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> + const char *propname, s16 *out_values,
> + size_t sz)
> +{
> + int ret;
> +
> + ret = of_property_read_u16_array(np, propname, out_values, sz);
> + if (ret)
> + return ret;
> +
> + /* Terminate it */
> + *out_values++ = -1;
> + *out_values++ = -1;
> +
> + return 0;
> +}
> +
> +static int edma_xbar_event_map(struct device *dev,
> + struct device_node *node,
> + struct edma_soc_info *pdata, int len)
> +{
It will be nice to separate the xbar feature from DT'fication of the
existing driver. Right now because of the mix the patch has become
pretty big and its becoming tough to review in isolation.
> + int ret = 0;
> + int i;
> + struct resource res;
> + void *xbar;
> + const s16 (*xbar_chans)[2];
> + u32 shift, offset, mux;
> +
> + xbar_chans = devm_kzalloc(dev,
> + len/sizeof(s16) + 2*sizeof(s16),
> + GFP_KERNEL);
> + if (!xbar_chans)
> + return -ENOMEM;
> +
> + ret = of_address_to_resource(node, 1, &res);
> + if (ret)
> + return -EIO;
> +
> + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> + if (!xbar)
> + return -ENOMEM;
> +
> + ret = edma_of_read_u32_to_s16_array(node,
> + "ti,edma-xbar-event-map",
> + (s16 *)xbar_chans,
> + len/sizeof(u32));
> + if (ret)
> + return -EIO;
> +
> + for (i = 0; xbar_chans[i][0] != -1; i++) {
> + shift = (xbar_chans[i][1] % 4) * 8;
> + offset = xbar_chans[i][1] >> 2;
> + offset <<= 2;
> + mux = readl((void *)((u32)xbar + offset));
> + mux &= ~(0xff << shift);
> + mux |= xbar_chans[i][0] << shift;
> + writel(mux, (void *)((u32)xbar + offset));
> + }
> +
> + pdata->xbar_chans = xbar_chans;
> +
> + return 0;
> +}
> +
> +static int edma_of_parse_dt(struct device *dev,
> + struct device_node *node,
> + struct edma_soc_info *pdata)
> +{
> + int ret = 0;
> + u32 value;
> + struct property *prop;
> + size_t sz;
> + struct edma_rsv_info *rsv_info;
> + const s16 (*rsv_chans)[2], (*rsv_slots)[2];
> + const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
> +
> + memset(pdata, 0, sizeof(struct edma_soc_info));
> +
> + ret = of_property_read_u32(node, "dma-channels", &value);
> + if (ret < 0)
> + return ret;
> + pdata->n_channel = value;
> +
> + ret = of_property_read_u32(node, "ti,edma-regions", &value);
> + if (ret < 0)
> + return ret;
> + pdata->n_region = value;
> +
> + ret = of_property_read_u32(node, "ti,edma-slots", &value);
> + if (ret < 0)
> + return ret;
> + pdata->n_slot = value;
> +
> + pdata->n_cc = 1;
> + pdata->n_tc = 3;
Will this mean the DT portion of this driver cannot be used on SoCs
where there are two CCs like DA850? If you are hard-coding this, will it
make sense to set to to EDMA_MAX_CC instead? Okay I see a comment down
below saying DT will support only one CC. Not sure why, but this is
probably related to that.
> +
> + rsv_info =
> + devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
> + if (!rsv_info)
> + return -ENOMEM;
> + pdata->rsv = rsv_info;
> +
> + /* Build the reserved channel/slots arrays */
> + prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
> + if (prop) {
> + rsv_chans = devm_kzalloc(dev,
> + sz/sizeof(s16) + 2*sizeof(s16),
> + GFP_KERNEL);
> + if (!rsv_chans)
> + return -ENOMEM;
> + pdata->rsv->rsv_chans = rsv_chans;
> +
> + ret = edma_of_read_u32_to_s16_array(node,
> + "ti,edma-reserved-channels",
> + (s16 *)rsv_chans,
> + sz/sizeof(u32));
Is this binding accepted? I cant find it in v3.9-rc1. IMHO, this
configuration should not be through DT. This is configuration material
for a given application (which channels should Linux running on ARM use
vs which channels should DSP use?) but not hardware description.
Probably configfs is useful here but I myself need to go through the
details.
On AM335x the usage of this is further limited use since applications
which need DMA from PRU or M3 are limited (at least I don't know of any).
I know its frustrating to get these comments piece by piece and after v9
has already been posted. Sorry about that. I think it will be easier to
drop this and some other may-not-really-be-a-hardware-description
bindings like "ti,edma-reserved-slots" for now and just get the basic
support in. The other ones can then be discussed/handled separately.
> + if (ret < 0)
> + return ret;
> + }
>
> -static int __init edma_probe(struct platform_device *pdev)
> + prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
> + if (prop) {
> + rsv_slots = devm_kzalloc(dev,
> + sz/sizeof(s16) + 2*sizeof(s16),
> + GFP_KERNEL);
> + if (!rsv_slots)
> + return -ENOMEM;
> + pdata->rsv->rsv_slots = rsv_slots;
> +
> + ret = edma_of_read_u32_to_s16_array(node,
> + "ti,edma-reserved-slots",
> + (s16 *)rsv_slots,
> + sz/sizeof(u32));
> + if (ret < 0)
> + return ret;
> + }
> +
> + prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
Again, this is application-driven configuration from EDMA IP
point-of-view. For some of these may be you can leave some sane defaults
which will work on most systems (AM335x included) and then we can look
at how this can be configured when an actual need arises (and at that
time we can look at the best way of doing it). Same thing for a number
of other properties below.
> + if (!prop)
> + return -EINVAL;
> +
> + queue_tc_map = devm_kzalloc(dev,
> + sz/sizeof(s8) + 2*sizeof(s8),
> + GFP_KERNEL);
> + if (!queue_tc_map)
> + return -ENOMEM;
> + pdata->queue_tc_mapping = queue_tc_map;
> +
> + ret = edma_of_read_u32_to_s8_array(node,
> + "ti,edma-queue-tc-map",
> + (s8 *)queue_tc_map,
> + sz/sizeof(u32));
> + if (ret < 0)
> + return ret;
> +
> + prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
> + if (!prop)
> + return -EINVAL;
> +
> + queue_priority_map = devm_kzalloc(dev,
> + sz/sizeof(s8) + 2*sizeof(s8),
> + GFP_KERNEL);
> + if (!queue_priority_map)
> + return -ENOMEM;
> + pdata->queue_priority_mapping = queue_priority_map;
> +
> + ret = edma_of_read_u32_to_s8_array(node,
> + "ti,edma-queue-tc-map",
> + (s8 *)queue_priority_map,
> + sz/sizeof(u32));
> + if (ret < 0)
> + return ret;
> +
> + ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
> + if (ret < 0)
> + return ret;
> + pdata->default_queue = value;
> +
> + prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
> + if (prop)
> + ret = edma_xbar_event_map(dev, node, pdata, sz);
> +
> + return ret;
> +}
Thanks,
Sekhar
On 3/6/2013 9:45 PM, Matt Porter wrote:
> The binding definition is based on the generic DMA controller
> binding.
>
> Signed-off-by: Matt Porter <[email protected]>
Okay the bindings the documented after they are used leading to some
confusion. This patch should be moved up the series. As I noted in my
other e-mail, some of these bindings are not really hardware description
and need to be re-looked.
Thanks,
Sekhar
> ---
> Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
> new file mode 100644
> index 0000000..075a60e3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
> @@ -0,0 +1,49 @@
> +TI EDMA
> +
> +Required properties:
> +- compatible : "ti,edma3"
> +- ti,hwmods: Name of the hwmods associated to the EDMA
> +- ti,edma-regions: Number of regions
> +- ti,edma-slots: Number of slots
> +- ti,edma-queue-tc-map: List of transfer control to queue mappings
> +- ti,edma-queue-priority-map: List of queue priority mappings
> +- ti,edma-default-queue: Default queue value
> +
> +Optional properties:
> +- ti,edma-reserved-channels: List of reserved channel regions
> +- ti,edma-reserved-slots: List of reserved slot regions
> +- ti,edma-xbar-event-map: Crossbar event to channel map
> +
> +Example:
> +
> +edma: edma@49000000 {
> + reg = <0x49000000 0x10000>;
> + interrupt-parent = <&intc>;
> + interrupts = <12 13 14>;
> + compatible = "ti,edma3";
> + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
> + #dma-cells = <1>;
> + dma-channels = <64>;
> + ti,edma-regions = <4>;
> + ti,edma-slots = <256>;
> + ti,edma-reserved-channels = <0 2
> + 14 2
> + 26 6
> + 48 4
> + 56 8>;
> + ti,edma-reserved-slots = <0 2
> + 14 2
> + 26 6
> + 48 4
> + 56 8
> + 64 127>;
> + ti,edma-queue-tc-map = <0 0
> + 1 1
> + 2 2>;
> + ti,edma-queue-priority-map = <0 0
> + 1 1
> + 2 2>;
> + ti,edma-default-queue = <0>;
> + ti,edma-xbar-event-map = <1 12
> + 2 13>;
> +};
>
On Thu, Mar 07, 2013 at 08:42:18AM +0200, Andy Shevchenko wrote:
> On Wed, Mar 6, 2013 at 6:15 PM, Matt Porter <[email protected]> wrote:
> > Adds support for parsing the TI EDMA DT data into the
> > required EDMA private API platform data. Enables runtime
> > PM support to initialize the EDMA hwmod. Adds AM33XX EDMA
> > crossbar event mux support. Enables build on OMAP.
>
> > --- a/arch/arm/common/edma.c
> > +++ b/arch/arm/common/edma.c
>
> > +static int edma_xbar_event_map(struct device *dev,
> > + struct device_node *node,
> > + struct edma_soc_info *pdata, int len)
> > +{
> > + int ret = 0;
> > + int i;
> > + struct resource res;
> > + void *xbar;
> > + const s16 (*xbar_chans)[2];
> > + u32 shift, offset, mux;
> > +
> > + xbar_chans = devm_kzalloc(dev,
> > + len/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!xbar_chans)
> > + return -ENOMEM;
> > +
> > + ret = of_address_to_resource(node, 1, &res);
> > + if (ret)
> > + return -EIO;
> > +
> > + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> > + if (!xbar)
> > + return -ENOMEM;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-xbar-event-map",
> > + (s16 *)xbar_chans,
> > + len/sizeof(u32));
> > + if (ret)
> > + return -EIO;
> > +
> > + for (i = 0; xbar_chans[i][0] != -1; i++) {
> > + shift = (xbar_chans[i][1] % 4) * 8;
>
> Looks like shift = (xbar_chans[i][1] & 0x03) << 3;
Yes, will update.
> > + offset = xbar_chans[i][1] >> 2;
> > + offset <<= 2;
>
> Is it offset = xbar_chans[i][1] & 0xfffc; ?
Yes, will update
> > + mux = readl((void *)((u32)xbar + offset));
> > + mux &= ~(0xff << shift);
> > + mux |= xbar_chans[i][0] << shift;
> > + writel(mux, (void *)((u32)xbar + offset));
> > + }
>
>
> --
> With Best Regards,
> Andy Shevchenko
> _______________________________________________
> devicetree-discuss mailing list
> [email protected]
> https://lists.ozlabs.org/listinfo/devicetree-discuss
On Wed, Mar 06, 2013 at 08:24:06PM +0000, Peter Korsgaard wrote:
> >>>>> "Matt" == Matt Porter <[email protected]> writes:
>
> Matt> The binding definition is based on the generic DMA controller
> Matt> binding.
>
> Matt> Signed-off-by: Matt Porter <[email protected]>
> Matt> ---
> Matt> Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
> Matt> 1 file changed, 49 insertions(+)
> Matt> create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
>
> Matt> diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
> Matt> new file mode 100644
> Matt> index 0000000..075a60e3
> Matt> --- /dev/null
> Matt> +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
> Matt> @@ -0,0 +1,49 @@
> Matt> +TI EDMA
> Matt> +
> Matt> +Required properties:
> Matt> +- compatible : "ti,edma3"
> Matt> +- ti,hwmods: Name of the hwmods associated to the EDMA
> Matt> +- ti,edma-regions: Number of regions
> Matt> +- ti,edma-slots: Number of slots
> Matt> +- ti,edma-queue-tc-map: List of transfer control to queue mappings
> Matt> +- ti,edma-queue-priority-map: List of queue priority mappings
> Matt> +- ti,edma-default-queue: Default queue value
> Matt> +
> Matt> +Optional properties:
> Matt> +- ti,edma-reserved-channels: List of reserved channel regions
> Matt> +- ti,edma-reserved-slots: List of reserved slot regions
> Matt> +- ti,edma-xbar-event-map: Crossbar event to channel map
> Matt> +
> Matt> +Example:
> Matt> +
> Matt> +edma: edma@49000000 {
> Matt> + reg = <0x49000000 0x10000>;
> Matt> + interrupt-parent = <&intc>;
> Matt> + interrupts = <12 13 14>;
>
> Probably interrupt-parent should be removed from the example as well to
> match am33xx.dtsi
On second thought, I'm not sure we're going to get any direction on this
one so let's just do what feels right and make it reflect common usage
like you suggested.
Thanks,
Matt
>>>>> "Matt" == Matt Porter <[email protected]> writes:
Hi,
Matt> +edma: edma@49000000 {
Matt> + reg = <0x49000000 0x10000>;
Matt> + interrupt-parent = <&intc>;
Matt> + interrupts = <12 13 14>;
>>
>> Probably interrupt-parent should be removed from the example as well to
>> match am33xx.dtsi
Matt> On second thought, I'm not sure we're going to get any direction
Matt> on this one so let's just do what feels right and make it reflect
Matt> common usage like you suggested.
Sounds good to me!
--
Bye, Peter Korsgaard
On Tue, Mar 12, 2013 at 06:45:46AM +0000, Sekhar Nori wrote:
>
>
> On 3/6/2013 9:45 PM, Matt Porter wrote:
> > Adds support for parsing the TI EDMA DT data into the
> > required EDMA private API platform data. Enables runtime
> > PM support to initialize the EDMA hwmod. Adds AM33XX EDMA
> > crossbar event mux support. Enables build on OMAP.
> >
> > Signed-off-by: Matt Porter <[email protected]>
> > Acked-by: Sekhar Nori <[email protected]>
> > ---
> > arch/arm/common/edma.c | 300 ++++++++++++++++++++++++++++++++++--
> > arch/arm/mach-omap2/Kconfig | 1 +
> > include/linux/platform_data/edma.h | 1 +
> > 3 files changed, 292 insertions(+), 10 deletions(-)
> >
> > diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> > index a1db6cd..e68ac38 100644
> > --- a/arch/arm/common/edma.c
> > +++ b/arch/arm/common/edma.c
> > @@ -24,6 +24,13 @@
> > #include <linux/platform_device.h>
> > #include <linux/io.h>
> > #include <linux/slab.h>
> > +#include <linux/edma.h>
> > +#include <linux/err.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_dma.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/pm_runtime.h>
> >
> > #include <linux/platform_data/edma.h>
> >
> > @@ -1369,31 +1376,278 @@ void edma_clear_event(unsigned channel)
> > EXPORT_SYMBOL(edma_clear_event);
> >
> > /*-----------------------------------------------------------------------*/
> > +static int edma_of_read_u32_to_s8_array(const struct device_node *np,
> > + const char *propname, s8 *out_values,
> > + size_t sz)
> > +{
> > + int ret;
> > +
> > + ret = of_property_read_u8_array(np, propname, out_values, sz);
> > + if (ret)
> > + return ret;
> > +
> > + /* Terminate it */
> > + *out_values++ = -1;
> > + *out_values++ = -1;
> > +
> > + return 0;
> > +}
> > +
> > +static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> > + const char *propname, s16 *out_values,
> > + size_t sz)
> > +{
> > + int ret;
> > +
> > + ret = of_property_read_u16_array(np, propname, out_values, sz);
> > + if (ret)
> > + return ret;
> > +
> > + /* Terminate it */
> > + *out_values++ = -1;
> > + *out_values++ = -1;
> > +
> > + return 0;
> > +}
> > +
> > +static int edma_xbar_event_map(struct device *dev,
> > + struct device_node *node,
> > + struct edma_soc_info *pdata, int len)
> > +{
>
> It will be nice to separate the xbar feature from DT'fication of the
> existing driver. Right now because of the mix the patch has become
> pretty big and its becoming tough to review in isolation.
Sure, I'll do that on v10.
> > + int ret = 0;
> > + int i;
> > + struct resource res;
> > + void *xbar;
> > + const s16 (*xbar_chans)[2];
> > + u32 shift, offset, mux;
> > +
> > + xbar_chans = devm_kzalloc(dev,
> > + len/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!xbar_chans)
> > + return -ENOMEM;
> > +
> > + ret = of_address_to_resource(node, 1, &res);
> > + if (ret)
> > + return -EIO;
> > +
> > + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> > + if (!xbar)
> > + return -ENOMEM;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-xbar-event-map",
> > + (s16 *)xbar_chans,
> > + len/sizeof(u32));
> > + if (ret)
> > + return -EIO;
> > +
> > + for (i = 0; xbar_chans[i][0] != -1; i++) {
> > + shift = (xbar_chans[i][1] % 4) * 8;
> > + offset = xbar_chans[i][1] >> 2;
> > + offset <<= 2;
> > + mux = readl((void *)((u32)xbar + offset));
> > + mux &= ~(0xff << shift);
> > + mux |= xbar_chans[i][0] << shift;
> > + writel(mux, (void *)((u32)xbar + offset));
> > + }
> > +
> > + pdata->xbar_chans = xbar_chans;
> > +
> > + return 0;
> > +}
> > +
> > +static int edma_of_parse_dt(struct device *dev,
> > + struct device_node *node,
> > + struct edma_soc_info *pdata)
> > +{
> > + int ret = 0;
> > + u32 value;
> > + struct property *prop;
> > + size_t sz;
> > + struct edma_rsv_info *rsv_info;
> > + const s16 (*rsv_chans)[2], (*rsv_slots)[2];
> > + const s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
> > +
> > + memset(pdata, 0, sizeof(struct edma_soc_info));
> > +
> > + ret = of_property_read_u32(node, "dma-channels", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->n_channel = value;
> > +
> > + ret = of_property_read_u32(node, "ti,edma-regions", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->n_region = value;
> > +
> > + ret = of_property_read_u32(node, "ti,edma-slots", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->n_slot = value;
> > +
> > + pdata->n_cc = 1;
> > + pdata->n_tc = 3;
>
> Will this mean the DT portion of this driver cannot be used on SoCs
> where there are two CCs like DA850? If you are hard-coding this, will it
> make sense to set to to EDMA_MAX_CC instead? Okay I see a comment down
> below saying DT will support only one CC. Not sure why, but this is
> probably related to that.
Yeah, this series is aging quickly with all the work done on Davinci
DT support recently. The actual parsing implementation was intended to
be short-term for am33xx only when written. I'll update and test on DA850
with DT support.
> > +
> > + rsv_info =
> > + devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
> > + if (!rsv_info)
> > + return -ENOMEM;
> > + pdata->rsv = rsv_info;
> > +
> > + /* Build the reserved channel/slots arrays */
> > + prop = of_find_property(node, "ti,edma-reserved-channels", &sz);
> > + if (prop) {
> > + rsv_chans = devm_kzalloc(dev,
> > + sz/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!rsv_chans)
> > + return -ENOMEM;
> > + pdata->rsv->rsv_chans = rsv_chans;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-reserved-channels",
> > + (s16 *)rsv_chans,
> > + sz/sizeof(u32));
>
> Is this binding accepted? I cant find it in v3.9-rc1. IMHO, this
> configuration should not be through DT. This is configuration material
> for a given application (which channels should Linux running on ARM use
> vs which channels should DSP use?) but not hardware description.
> Probably configfs is useful here but I myself need to go through the
> details.
No, there's been no review by the DT maintainers as of yet. I agree it
could either fall into the grey area where sometimes these things are
permitted or we simply should find a different way. configfs is, indeed,
and obvious choice. Most of these parameters are tuning characteristics
that in any application I can think of could probably wait until user
space is available...and so configfs is ok here. The only downside might
be somebody wanting the rootfs device to be able to allocate a channel
with something other than the default queue...that can be fixed with
some creative initramfs.
> On AM335x the usage of this is further limited use since applications
> which need DMA from PRU or M3 are limited (at least I don't know of any).
I don't know of any either, it's simply conjecture since EDMA is
available to those cores.
> I know its frustrating to get these comments piece by piece and after v9
> has already been posted. Sorry about that. I think it will be easier to
Not a problem. I'm happy to have other eyes on the DT portion.
> drop this and some other may-not-really-be-a-hardware-description
> bindings like "ti,edma-reserved-slots" for now and just get the basic
> support in. The other ones can then be discussed/handled separately.
That works for me. It'll be less to be reviewed when Rob/Grant are
able to look at it.
> > + if (ret < 0)
> > + return ret;
> > + }
> >
> > -static int __init edma_probe(struct platform_device *pdev)
> > + prop = of_find_property(node, "ti,edma-reserved-slots", &sz);
> > + if (prop) {
> > + rsv_slots = devm_kzalloc(dev,
> > + sz/sizeof(s16) + 2*sizeof(s16),
> > + GFP_KERNEL);
> > + if (!rsv_slots)
> > + return -ENOMEM;
> > + pdata->rsv->rsv_slots = rsv_slots;
> > +
> > + ret = edma_of_read_u32_to_s16_array(node,
> > + "ti,edma-reserved-slots",
> > + (s16 *)rsv_slots,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > + }
> > +
> > + prop = of_find_property(node, "ti,edma-queue-tc-map", &sz);
>
> Again, this is application-driven configuration from EDMA IP
> point-of-view. For some of these may be you can leave some sane defaults
> which will work on most systems (AM335x included) and then we can look
> at how this can be configured when an actual need arises (and at that
> time we can look at the best way of doing it). Same thing for a number
> of other properties below.
Yep, will go to all defaults on these.
> > + if (!prop)
> > + return -EINVAL;
> > +
> > + queue_tc_map = devm_kzalloc(dev,
> > + sz/sizeof(s8) + 2*sizeof(s8),
> > + GFP_KERNEL);
> > + if (!queue_tc_map)
> > + return -ENOMEM;
> > + pdata->queue_tc_mapping = queue_tc_map;
> > +
> > + ret = edma_of_read_u32_to_s8_array(node,
> > + "ti,edma-queue-tc-map",
> > + (s8 *)queue_tc_map,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > +
> > + prop = of_find_property(node, "ti,edma-queue-priority-map", &sz);
> > + if (!prop)
> > + return -EINVAL;
> > +
> > + queue_priority_map = devm_kzalloc(dev,
> > + sz/sizeof(s8) + 2*sizeof(s8),
> > + GFP_KERNEL);
> > + if (!queue_priority_map)
> > + return -ENOMEM;
> > + pdata->queue_priority_mapping = queue_priority_map;
> > +
> > + ret = edma_of_read_u32_to_s8_array(node,
> > + "ti,edma-queue-tc-map",
> > + (s8 *)queue_priority_map,
> > + sz/sizeof(u32));
> > + if (ret < 0)
> > + return ret;
> > +
> > + ret = of_property_read_u32(node, "ti,edma-default-queue", &value);
> > + if (ret < 0)
> > + return ret;
> > + pdata->default_queue = value;
> > +
> > + prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
> > + if (prop)
> > + ret = edma_xbar_event_map(dev, node, pdata, sz);
> > +
> > + return ret;
> > +}
>
> Thanks,
> Sekhar
On Tue, Mar 12, 2013 at 06:53:03AM +0000, Sekhar Nori wrote:
> On 3/6/2013 9:45 PM, Matt Porter wrote:
> > The binding definition is based on the generic DMA controller
> > binding.
> >
> > Signed-off-by: Matt Porter <[email protected]>
>
> Okay the bindings the documented after they are used leading to some
> confusion. This patch should be moved up the series. As I noted in my
> other e-mail, some of these bindings are not really hardware description
> and need to be re-looked.
Sure, I'll reorder it.
-Matt
> > ---
> > Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +++++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
> >
> > diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
> > new file mode 100644
> > index 0000000..075a60e3
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
> > @@ -0,0 +1,49 @@
> > +TI EDMA
> > +
> > +Required properties:
> > +- compatible : "ti,edma3"
> > +- ti,hwmods: Name of the hwmods associated to the EDMA
> > +- ti,edma-regions: Number of regions
> > +- ti,edma-slots: Number of slots
> > +- ti,edma-queue-tc-map: List of transfer control to queue mappings
> > +- ti,edma-queue-priority-map: List of queue priority mappings
> > +- ti,edma-default-queue: Default queue value
> > +
> > +Optional properties:
> > +- ti,edma-reserved-channels: List of reserved channel regions
> > +- ti,edma-reserved-slots: List of reserved slot regions
> > +- ti,edma-xbar-event-map: Crossbar event to channel map
> > +
> > +Example:
> > +
> > +edma: edma@49000000 {
> > + reg = <0x49000000 0x10000>;
> > + interrupt-parent = <&intc>;
> > + interrupts = <12 13 14>;
> > + compatible = "ti,edma3";
> > + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
> > + #dma-cells = <1>;
> > + dma-channels = <64>;
> > + ti,edma-regions = <4>;
> > + ti,edma-slots = <256>;
> > + ti,edma-reserved-channels = <0 2
> > + 14 2
> > + 26 6
> > + 48 4
> > + 56 8>;
> > + ti,edma-reserved-slots = <0 2
> > + 14 2
> > + 26 6
> > + 48 4
> > + 56 8
> > + 64 127>;
> > + ti,edma-queue-tc-map = <0 0
> > + 1 1
> > + 2 2>;
> > + ti,edma-queue-priority-map = <0 0
> > + 1 1
> > + 2 2>;
> > + ti,edma-default-queue = <0>;
> > + ti,edma-xbar-event-map = <1 12
> > + 2 13>;
> > +};
> >
Hi Matt,
On 3/6/2013 9:45 PM, Matt Porter wrote:
> This series adds DMA Engine support for AM33xx, which uses
> an EDMA DMAC. The EDMA DMAC has been previously supported by only
> a private API implementation (much like the situation with OMAP
> DMA) found on the DaVinci family of SoCs.
> Matt Porter (9):
> ARM: davinci: move private EDMA API to arm/common
> ARM: edma: remove unused transfer controller handlers
If you are going to be late in re-spinning the entire series in time for
v3.10, then I suggest I queue the first two patches through davinci tree
for v3.10 and then you can work on rest of patches for next (v3.11)
merge window.
Let me know what you think.
> ARM: edma: add AM33XX support to the private EDMA API
> dmaengine: edma: enable build for AM33XX
> dmaengine: edma: Add TI EDMA device tree binding
> ARM: dts: add AM33XX EDMA support
> spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
> spi: omap2-mcspi: add generic DMA request support to the DT binding
> ARM: dts: add AM33XX SPI DMA support
Thanks,
Sekhar
Hi Russell,
On 3/6/2013 9:45 PM, Matt Porter wrote:
> Move mach-davinci/dma.c to common/edma.c so it can be used
> by OMAP (specifically AM33xx) as well.
>
> Signed-off-by: Matt Porter <[email protected]>
> Acked-by: Sekhar Nori <[email protected]>
Can you please ack this movement of davinci private EDMA implementation
to arch/arm/common? I would like to take this patch through davinci tree
for v3.11.
Thanks,
Sekhar
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/common/Kconfig | 3 +
> arch/arm/common/Makefile | 1 +
> arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
> arch/arm/mach-davinci/Makefile | 2 +-
> arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
> arch/arm/mach-davinci/davinci.h | 2 +-
> arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
> arch/arm/mach-davinci/devices.c | 6 +-
> arch/arm/mach-davinci/dm355.c | 2 +-
> arch/arm/mach-davinci/dm365.c | 2 +-
> arch/arm/mach-davinci/dm644x.c | 2 +-
> arch/arm/mach-davinci/dm646x.c | 2 +-
> arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
> drivers/dma/edma.c | 2 +-
> drivers/mmc/host/davinci_mmc.c | 1 +
> include/linux/mfd/davinci_voicecodec.h | 3 +-
> .../mach => include/linux/platform_data}/edma.h | 89 +-------------------
> include/linux/platform_data/spi-davinci.h | 2 +-
> sound/soc/davinci/davinci-evm.c | 1 +
> sound/soc/davinci/davinci-pcm.c | 1 +
> sound/soc/davinci/davinci-pcm.h | 2 +-
> sound/soc/davinci/davinci-sffsdr.c | 5 +-
> 23 files changed, 33 insertions(+), 104 deletions(-)
> rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
> rename {arch/arm/mach-davinci/include/mach => include/linux/platform_data}/edma.h (59%)
>
+ Chris since the patch has some davinci_mmc.c changes.
Chris, Mark,
On 3/6/2013 9:45 PM, Matt Porter wrote:
> Move mach-davinci/dma.c to common/edma.c so it can be used
> by OMAP (specifically AM33xx) as well.
>
> Signed-off-by: Matt Porter <[email protected]>
> Acked-by: Sekhar Nori <[email protected]>
Can you please ack changes in mmc and sound respectively? I would like
to take the patch for v3.11.
Thanks,
Sekhar
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/common/Kconfig | 3 +
> arch/arm/common/Makefile | 1 +
> arch/arm/{mach-davinci/dma.c => common/edma.c} | 2 +-
> arch/arm/mach-davinci/Makefile | 2 +-
> arch/arm/mach-davinci/board-tnetv107x-evm.c | 2 +-
> arch/arm/mach-davinci/davinci.h | 2 +-
> arch/arm/mach-davinci/devices-tnetv107x.c | 2 +-
> arch/arm/mach-davinci/devices.c | 6 +-
> arch/arm/mach-davinci/dm355.c | 2 +-
> arch/arm/mach-davinci/dm365.c | 2 +-
> arch/arm/mach-davinci/dm644x.c | 2 +-
> arch/arm/mach-davinci/dm646x.c | 2 +-
> arch/arm/mach-davinci/include/mach/da8xx.h | 2 +-
> drivers/dma/edma.c | 2 +-
> drivers/mmc/host/davinci_mmc.c | 1 +
> include/linux/mfd/davinci_voicecodec.h | 3 +-
> .../mach => include/linux/platform_data}/edma.h | 89 +-------------------
> include/linux/platform_data/spi-davinci.h | 2 +-
> sound/soc/davinci/davinci-evm.c | 1 +
> sound/soc/davinci/davinci-pcm.c | 1 +
> sound/soc/davinci/davinci-pcm.h | 2 +-
> sound/soc/davinci/davinci-sffsdr.c | 5 +-
> 23 files changed, 33 insertions(+), 104 deletions(-)
> rename arch/arm/{mach-davinci/dma.c => common/edma.c} (99%)
> rename {arch/arm/mach-davinci/include/mach => include/linux/platform_data}/edma.h (59%)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 5b71469..cb80a4d 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -956,6 +956,7 @@ config ARCH_DAVINCI
> select GENERIC_IRQ_CHIP
> select HAVE_IDE
> select NEED_MACH_GPIO_H
> + select TI_PRIV_EDMA
> select USE_OF
> select ZONE_DMA
> help
> diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
> index 9353184..c3a4e9c 100644
> --- a/arch/arm/common/Kconfig
> +++ b/arch/arm/common/Kconfig
> @@ -17,3 +17,6 @@ config SHARP_PARAM
>
> config SHARP_SCOOP
> bool
> +
> +config TI_PRIV_EDMA
> + bool
> diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
> index dc8dd0d..9643c50 100644
> --- a/arch/arm/common/Makefile
> +++ b/arch/arm/common/Makefile
> @@ -11,3 +11,4 @@ obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
> obj-$(CONFIG_SHARP_SCOOP) += scoop.o
> obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
> obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
> +obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
> diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/common/edma.c
> similarity index 99%
> rename from arch/arm/mach-davinci/dma.c
> rename to arch/arm/common/edma.c
> index 45b7c71..dcaeb8e 100644
> --- a/arch/arm/mach-davinci/dma.c
> +++ b/arch/arm/common/edma.c
> @@ -25,7 +25,7 @@
> #include <linux/io.h>
> #include <linux/slab.h>
>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> /* Offsets matching "struct edmacc_param" */
> #define PARM_OPT 0x00
> diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
> index fb5c1aa..493a36b 100644
> --- a/arch/arm/mach-davinci/Makefile
> +++ b/arch/arm/mach-davinci/Makefile
> @@ -5,7 +5,7 @@
>
> # Common objects
> obj-y := time.o clock.o serial.o psc.o \
> - dma.o usb.o common.o sram.o aemif.o
> + usb.o common.o sram.o aemif.o
>
> obj-$(CONFIG_DAVINCI_MUX) += mux.o
>
> diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
> index 4f41602..10c9efd 100644
> --- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
> +++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
> @@ -26,12 +26,12 @@
> #include <linux/input.h>
> #include <linux/input/matrix_keypad.h>
> #include <linux/spi/spi.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/arch.h>
> #include <asm/mach-types.h>
>
> #include <mach/irqs.h>
> -#include <mach/edma.h>
> #include <mach/mux.h>
> #include <mach/cp_intc.h>
> #include <mach/tnetv107x.h>
> diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
> index 12d544b..d26a6bc 100644
> --- a/arch/arm/mach-davinci/davinci.h
> +++ b/arch/arm/mach-davinci/davinci.h
> @@ -23,9 +23,9 @@
> #include <linux/platform_device.h>
> #include <linux/spi/spi.h>
> #include <linux/platform_data/davinci_asp.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/platform_data/keyscan-davinci.h>
> #include <mach/hardware.h>
> -#include <mach/edma.h>
>
> #include <media/davinci/vpfe_capture.h>
> #include <media/davinci/vpif_types.h>
> diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
> index 773ab07..ba37760 100644
> --- a/arch/arm/mach-davinci/devices-tnetv107x.c
> +++ b/arch/arm/mach-davinci/devices-tnetv107x.c
> @@ -18,10 +18,10 @@
> #include <linux/dma-mapping.h>
> #include <linux/clk.h>
> #include <linux/slab.h>
> +#include <linux/platform_data/edma.h>
>
> #include <mach/common.h>
> #include <mach/irqs.h>
> -#include <mach/edma.h>
> #include <mach/tnetv107x.h>
>
> #include "clock.h"
> diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
> index 4c48a36..ca0c7b3 100644
> --- a/arch/arm/mach-davinci/devices.c
> +++ b/arch/arm/mach-davinci/devices.c
> @@ -19,9 +19,10 @@
> #include <mach/irqs.h>
> #include <mach/cputype.h>
> #include <mach/mux.h>
> -#include <mach/edma.h>
> #include <linux/platform_data/mmc-davinci.h>
> #include <mach/time.h>
> +#include <linux/platform_data/edma.h>
> +
>
> #include "davinci.h"
> #include "clock.h"
> @@ -34,6 +35,9 @@
> #define DM365_MMCSD0_BASE 0x01D11000
> #define DM365_MMCSD1_BASE 0x01D00000
>
> +#define DAVINCI_DMA_MMCRXEVT 26
> +#define DAVINCI_DMA_MMCTXEVT 27
> +
> void __iomem *davinci_sysmod_base;
>
> void davinci_map_sysmod(void)
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index b49c3b7..53998d8 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -19,7 +19,6 @@
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> #include <mach/irqs.h>
> @@ -28,6 +27,7 @@
> #include <mach/common.h>
> #include <linux/platform_data/spi-davinci.h>
> #include <mach/gpio-davinci.h>
> +#include <linux/platform_data/edma.h>
>
> #include "davinci.h"
> #include "clock.h"
> diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
> index 6c39805..9b41d33 100644
> --- a/arch/arm/mach-davinci/dm365.c
> +++ b/arch/arm/mach-davinci/dm365.c
> @@ -18,11 +18,11 @@
> #include <linux/platform_device.h>
> #include <linux/dma-mapping.h>
> #include <linux/spi/spi.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> #include <mach/irqs.h>
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index db1dd92..e8bf21f 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -12,11 +12,11 @@
> #include <linux/clk.h>
> #include <linux/serial_8250.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/irqs.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> index ac7b431..6d52a32 100644
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -13,11 +13,11 @@
> #include <linux/clk.h>
> #include <linux/serial_8250.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
>
> #include <asm/mach/map.h>
>
> #include <mach/cputype.h>
> -#include <mach/edma.h>
> #include <mach/irqs.h>
> #include <mach/psc.h>
> #include <mach/mux.h>
> diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
> index de439b7..311daec 100644
> --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
> @@ -20,8 +20,8 @@
> #include <linux/videodev2.h>
>
> #include <mach/serial.h>
> -#include <mach/edma.h>
> #include <mach/pm.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/platform_data/i2c-davinci.h>
> #include <linux/platform_data/mmc-davinci.h>
> #include <linux/platform_data/usb-davinci.h>
> diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
> index cd7e328..5f3e532 100644
> --- a/drivers/dma/edma.c
> +++ b/drivers/dma/edma.c
> @@ -24,7 +24,7 @@
> #include <linux/slab.h>
> #include <linux/spinlock.h>
>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> #include "dmaengine.h"
> #include "virt-dma.h"
> diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c
> index 2063677..f5d46ea 100644
> --- a/drivers/mmc/host/davinci_mmc.c
> +++ b/drivers/mmc/host/davinci_mmc.c
> @@ -35,6 +35,7 @@
> #include <linux/edma.h>
> #include <linux/mmc/mmc.h>
>
> +#include <linux/platform_data/edma.h>
> #include <linux/platform_data/mmc-davinci.h>
>
> /*
> diff --git a/include/linux/mfd/davinci_voicecodec.h b/include/linux/mfd/davinci_voicecodec.h
> index 0ab6132..7dd6524 100644
> --- a/include/linux/mfd/davinci_voicecodec.h
> +++ b/include/linux/mfd/davinci_voicecodec.h
> @@ -26,8 +26,7 @@
> #include <linux/kernel.h>
> #include <linux/platform_device.h>
> #include <linux/mfd/core.h>
> -
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> /*
> * Register values.
> diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/include/linux/platform_data/edma.h
> similarity index 59%
> rename from arch/arm/mach-davinci/include/mach/edma.h
> rename to include/linux/platform_data/edma.h
> index 7e84c90..2344ea2 100644
> --- a/arch/arm/mach-davinci/include/mach/edma.h
> +++ b/include/linux/platform_data/edma.h
> @@ -1,28 +1,12 @@
> /*
> - * TI DAVINCI dma definitions
> + * TI EDMA definitions
> *
> - * Copyright (C) 2006-2009 Texas Instruments.
> + * Copyright (C) 2006-2013 Texas Instruments.
> *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms of the GNU General Public License as published by the
> * Free Software Foundation; either version 2 of the License, or (at your
> * option) any later version.
> - *
> - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
> - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
> - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
> - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
> - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
> - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
> - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
> - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> - *
> - * You should have received a copy of the GNU General Public License along
> - * with this program; if not, write to the Free Software Foundation, Inc.,
> - * 675 Mass Ave, Cambridge, MA 02139, USA.
> - *
> */
>
> /*
> @@ -69,11 +53,6 @@ struct edmacc_param {
> unsigned int ccnt;
> };
>
> -#define CCINT0_INTERRUPT 16
> -#define CCERRINT_INTERRUPT 17
> -#define TCERRINT0_INTERRUPT 18
> -#define TCERRINT1_INTERRUPT 19
> -
> /* fields in edmacc_param.opt */
> #define SAM BIT(0)
> #define DAM BIT(1)
> @@ -87,70 +66,6 @@ struct edmacc_param {
> #define TCCHEN BIT(22)
> #define ITCCHEN BIT(23)
>
> -#define TRWORD (0x7<<2)
> -#define PAENTRY (0x1ff<<5)
> -
> -/* Drivers should avoid using these symbolic names for dm644x
> - * channels, and use platform_device IORESOURCE_DMA resources
> - * instead. (Other DaVinci chips have different peripherals
> - * and thus have different DMA channel mappings.)
> - */
> -#define DAVINCI_DMA_MCBSP_TX 2
> -#define DAVINCI_DMA_MCBSP_RX 3
> -#define DAVINCI_DMA_VPSS_HIST 4
> -#define DAVINCI_DMA_VPSS_H3A 5
> -#define DAVINCI_DMA_VPSS_PRVU 6
> -#define DAVINCI_DMA_VPSS_RSZ 7
> -#define DAVINCI_DMA_IMCOP_IMXINT 8
> -#define DAVINCI_DMA_IMCOP_VLCDINT 9
> -#define DAVINCI_DMA_IMCO_PASQINT 10
> -#define DAVINCI_DMA_IMCOP_DSQINT 11
> -#define DAVINCI_DMA_SPI_SPIX 16
> -#define DAVINCI_DMA_SPI_SPIR 17
> -#define DAVINCI_DMA_UART0_URXEVT0 18
> -#define DAVINCI_DMA_UART0_UTXEVT0 19
> -#define DAVINCI_DMA_UART1_URXEVT1 20
> -#define DAVINCI_DMA_UART1_UTXEVT1 21
> -#define DAVINCI_DMA_UART2_URXEVT2 22
> -#define DAVINCI_DMA_UART2_UTXEVT2 23
> -#define DAVINCI_DMA_MEMSTK_MSEVT 24
> -#define DAVINCI_DMA_MMCRXEVT 26
> -#define DAVINCI_DMA_MMCTXEVT 27
> -#define DAVINCI_DMA_I2C_ICREVT 28
> -#define DAVINCI_DMA_I2C_ICXEVT 29
> -#define DAVINCI_DMA_GPIO_GPINT0 32
> -#define DAVINCI_DMA_GPIO_GPINT1 33
> -#define DAVINCI_DMA_GPIO_GPINT2 34
> -#define DAVINCI_DMA_GPIO_GPINT3 35
> -#define DAVINCI_DMA_GPIO_GPINT4 36
> -#define DAVINCI_DMA_GPIO_GPINT5 37
> -#define DAVINCI_DMA_GPIO_GPINT6 38
> -#define DAVINCI_DMA_GPIO_GPINT7 39
> -#define DAVINCI_DMA_GPIO_GPBNKINT0 40
> -#define DAVINCI_DMA_GPIO_GPBNKINT1 41
> -#define DAVINCI_DMA_GPIO_GPBNKINT2 42
> -#define DAVINCI_DMA_GPIO_GPBNKINT3 43
> -#define DAVINCI_DMA_GPIO_GPBNKINT4 44
> -#define DAVINCI_DMA_TIMER0_TINT0 48
> -#define DAVINCI_DMA_TIMER1_TINT1 49
> -#define DAVINCI_DMA_TIMER2_TINT2 50
> -#define DAVINCI_DMA_TIMER3_TINT3 51
> -#define DAVINCI_DMA_PWM0 52
> -#define DAVINCI_DMA_PWM1 53
> -#define DAVINCI_DMA_PWM2 54
> -
> -/* DA830 specific EDMA3 information */
> -#define EDMA_DA830_NUM_DMACH 32
> -#define EDMA_DA830_NUM_TCC 32
> -#define EDMA_DA830_NUM_PARAMENTRY 128
> -#define EDMA_DA830_NUM_EVQUE 2
> -#define EDMA_DA830_NUM_TC 2
> -#define EDMA_DA830_CHMAP_EXIST 0
> -#define EDMA_DA830_NUM_REGIONS 4
> -#define DA830_DMACH2EVENT_MAP0 0x000FC03Fu
> -#define DA830_DMACH2EVENT_MAP1 0x00000000u
> -#define DA830_EDMA_ARM_OWN 0x30FFCCFFu
> -
> /*ch_status paramater of callback function possible values*/
> #define DMA_COMPLETE 1
> #define DMA_CC_ERROR 2
> diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h
> index 7af305b..8dc2fa47 100644
> --- a/include/linux/platform_data/spi-davinci.h
> +++ b/include/linux/platform_data/spi-davinci.h
> @@ -19,7 +19,7 @@
> #ifndef __ARCH_ARM_DAVINCI_SPI_H
> #define __ARCH_ARM_DAVINCI_SPI_H
>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> #define SPI_INTERN_CS 0xFF
>
> diff --git a/sound/soc/davinci/davinci-evm.c b/sound/soc/davinci/davinci-evm.c
> index 484b22c..fd7c45b 100644
> --- a/sound/soc/davinci/davinci-evm.c
> +++ b/sound/soc/davinci/davinci-evm.c
> @@ -14,6 +14,7 @@
> #include <linux/timer.h>
> #include <linux/interrupt.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/i2c.h>
> #include <sound/core.h>
> #include <sound/pcm.h>
> diff --git a/sound/soc/davinci/davinci-pcm.c b/sound/soc/davinci/davinci-pcm.c
> index afab81f..9bdd71b 100644
> --- a/sound/soc/davinci/davinci-pcm.c
> +++ b/sound/soc/davinci/davinci-pcm.c
> @@ -17,6 +17,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/kernel.h>
> #include <linux/genalloc.h>
> +#include <linux/platform_data/edma.h>
>
> #include <sound/core.h>
> #include <sound/pcm.h>
> diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
> index b6ef703..fbb710c 100644
> --- a/sound/soc/davinci/davinci-pcm.h
> +++ b/sound/soc/davinci/davinci-pcm.h
> @@ -14,7 +14,7 @@
>
> #include <linux/genalloc.h>
> #include <linux/platform_data/davinci_asp.h>
> -#include <mach/edma.h>
> +#include <linux/platform_data/edma.h>
>
> struct davinci_pcm_dma_params {
> int channel; /* sync dma channel ID */
> diff --git a/sound/soc/davinci/davinci-sffsdr.c b/sound/soc/davinci/davinci-sffsdr.c
> index 5be65aa..76ea586 100644
> --- a/sound/soc/davinci/davinci-sffsdr.c
> +++ b/sound/soc/davinci/davinci-sffsdr.c
> @@ -17,6 +17,7 @@
> #include <linux/timer.h>
> #include <linux/interrupt.h>
> #include <linux/platform_device.h>
> +#include <linux/platform_data/edma.h>
> #include <linux/gpio.h>
> #include <sound/core.h>
> #include <sound/pcm.h>
> @@ -28,12 +29,14 @@
> #include <asm/plat-sffsdr/sffsdr-fpga.h>
> #endif
>
> -#include <mach/edma.h>
>
> #include "../codecs/pcm3008.h"
> #include "davinci-pcm.h"
> #include "davinci-i2s.h"
>
> +#define DAVINCI_DMA_MCBSP_TX 2
> +#define DAVINCI_DMA_MCBSP_RX 3
> +
> /*
> * CLKX and CLKR are the inputs for the Sample Rate Generator.
> * FSX and FSR are outputs, driven by the sample Rate Generator.
>
Hi,
On Fri, Jun 07 2013, Sekhar Nori wrote:
> + Chris since the patch has some davinci_mmc.c changes.
>
> Chris, Mark,
>
> On 3/6/2013 9:45 PM, Matt Porter wrote:
>> Move mach-davinci/dma.c to common/edma.c so it can be used
>> by OMAP (specifically AM33xx) as well.
>>
>> Signed-off-by: Matt Porter <[email protected]>
>> Acked-by: Sekhar Nori <[email protected]>
>
> Can you please ack changes in mmc and sound respectively? I would like
> to take the patch for v3.11.
For davinci_mmc.c:
Acked-by: Chris Ball <[email protected]>
Thanks,
- Chris.
--
Chris Ball <[email protected]> <http://printf.net/>
One Laptop Per Child