This series is a repost of Matt Porter's EDMA patches for AM33XX EDMA support
with changes for few pending review comments on v9 series.
Currently this is required for AM33XX (Beaglebone or EVM) to access MMC
and be able mount to rootfs and boot till command prompt over MMC.
Unless there are other pending review comments, I hope this series can
make it into 3.11 merge window, the dependent series has been posted at [1]
and completed review.
Tested EDMA on AM1808 EVM and AM33XX Beaglebone with MMC.
Sekhar Nori has posted a GIT PULL [1] which has 2 patches this series depends on:
[1] http://www.spinics.net/lists/arm-kernel/msg251503.html
Changes since v10:
- Reworked documentation based on Arnd's feedback
- Moved EDMA bindings documentation earlier in series
- Dropped mention on am33xx on 2/8 and 3/8 in the series
Changes since v9:
- Droped reserved and queue DT entries from Documentation
for now from the original patch series.
- Drop DT entries that are non-hardware-description
- Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
- Rewrite shift and offset calculation xbar event mapping.
- Setup default one-to-one mapping for queue_priority and queue_tc
mapping as discussed in.
- Split out xbar stuff to separate patch.
Reference discussion:
https://patchwork.kernel.org/patch/2226761/
Changes since v8:
- Removed edma node interrupt-parent property, it is inherited
Changes since v7:
- Dropped dmaengine compat() patch. It is upstream.
- Submitted edma_alloc_slot() error checking bug fix separately,
now a dependency
- Fixed bisect issues due to 3/10 hunks that went into 1/10
- Fixed incorrect IS_ERRVALUE() use in 3/10
Changes since v6:
- Converted edma_of_read_*() to wrappers around of_property_read_*()
- Fixed wording on the omap-spi generic DMA properties
- Added comment/check to clarify that the driver only supports
a single EDMA instance when booting from DT
Changes since v5:
- Dropped mmc portion and moved it to a separate series
- Incorporate corrected version of dma_request_slave_channel_compat()
- Fix #defines and enablement of TI_PRIV_EDMA option
Changes since v4:
- Fixed debug section mismatch in private edma api [01/14]
- Respun format-patch to catch the platform_data/edma.h rename [01/14]
- Removed address/size-cells from the EDMA binding [05/14]
Changes since v3:
- Rebased on 3.8-rc3
- No longer an RFC
- Fixed bugs in DT/pdata parsing reported by Vaibhav Bedia
- Restored all the Davinci pdata to const
- Removed max_segs hack in favor of using dma_get_channel_caps()
- Fixed extra parens, __raw_* accessors and, ioremap error checks
in xbar handling
- Removed excess license info in platform_data/edma.h
- Removed unneeded reserved channels data for AM33xx
- Removed test-specific pinmuxing from dts files
- Adjusted mmc1 node to be disabled by default in the dtsi
Changes since v2:
- Rebased on 3.7-rc1
- Fixed bug in DT/pdata parsing first found by Gururaja
that turned out to be masked by some toolchains
- Dropped unused mach-omap2/devices.c hsmmc patch
- Added AM33XX crossbar DMA event mux support
- Added am335x-evm support
Changes since v1:
- Rebased on top of mainline from 12250d8
- Dropped the feature removal schedule patch
- Implemented dma_request_slave_channel_compat() and
converted the mmc and spi drivers to use it
- Dropped unneeded #address-cells and #size-cells from
EDMA DT support
- Moved private EDMA header to linux/platform_data/ and
removed some unneeded definitions
- Fixed parsing of optional properties
This series adds DMA Engine support for AM33xx, which uses
an EDMA DMAC. The EDMA DMAC has been previously supported by only
a private API implementation (much like the situation with OMAP
DMA) found on the DaVinci family of SoCs.
The series applies on top of 3.10-rc4.
The approach taken is similar to how OMAP DMA is being converted to
DMA Engine support. With the functional EDMA private API already
existing in mach-davinci/dma.c, we first move that to an ARM common
area so it can be shared. Adding DT and runtime PM support to the
private EDMA API implementation allows it to run on AM33xx. AM33xx
*only* boots using DT so the upstream generic DT DMA helpers are
leveraged to register EDMA DMAC with the of_dma framework. SPI (and
MMC in a separate series) are supported using the upstream
dma_request_slave_channel_compat() dmaengine call that allows
compatibility with !DT platforms.
With this series both BeagleBone and the AM335x EVM have working
SPI DMA support (and MMC support with the separate MMC series).
This is tested on BeagleBone with a SPI framebuffer driver and MMC
rootfs. A trivial gpio DMA event misc driver was used to test the
crossbar DMA event support. It is also tested on the AM335x EVM
with the onboard SPI flash and MMC rootfs. Note that MMC can only
be tested with a separate MMC dmaengine/DT series applied.
Regression testing was done on AM180x-EVM (which also makes use
of the EDMA dmaengine driver and the EDMA private API) using SD,
SPI flash, and the onboard audio supported by the ASoC Davinci
driver. Regression testing was also done on a BeagleBoard xM
booting from the legacy board file using MMC rootfs.
Matt Porter (8):
dmaengine: edma: Add TI EDMA device tree binding
ARM: edma: Add DT and runtime PM support to the private EDMA API
ARM: edma: Add EDMA crossbar event mux support
ARM: dts: add AM33XX EDMA support
ARM: dts: add AM33XX SPI DMA support
dmaengine: edma: enable build for AM33XX
spi: omap2-mcspi: add generic DMA request support to the DT binding
spi: omap2-mcspi: convert to dma_request_slave_channel_compat()
Documentation/devicetree/bindings/dma/ti-edma.txt | 34 +++
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 ++-
arch/arm/boot/dts/am33xx.dtsi | 22 ++
arch/arm/common/edma.c | 249 +++++++++++++++++++-
arch/arm/mach-omap2/Kconfig | 1 +
drivers/dma/Kconfig | 2 +-
drivers/spi/spi-omap2-mcspi.c | 64 +++--
include/linux/platform_data/edma.h | 5 +-
8 files changed, 368 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
--
1.7.9.5
From: Matt Porter <[email protected]>
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the OMAP DMA
filter.
Signed-off-by: Matt Porter <[email protected]>
Acked-by: Mark Brown <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
drivers/spi/spi-omap2-mcspi.c | 64 ++++++++++++++++++++++++++++-------------
1 file changed, 44 insertions(+), 20 deletions(-)
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 86d2158..ca4ab78 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -102,6 +102,9 @@ struct omap2_mcspi_dma {
struct completion dma_tx_completion;
struct completion dma_rx_completion;
+
+ char dma_rx_ch_name[14];
+ char dma_tx_ch_name[14];
};
/* use PIO for small transfers, avoiding DMA setup/teardown overhead and
@@ -830,12 +833,20 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = mcspi_dma->dma_rx_sync_dev;
- mcspi_dma->dma_rx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+
+ mcspi_dma->dma_rx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_rx_ch_name);
if (!mcspi_dma->dma_rx)
goto no_dma;
sig = mcspi_dma->dma_tx_sync_dev;
- mcspi_dma->dma_tx = dma_request_channel(mask, omap_dma_filter_fn, &sig);
+ mcspi_dma->dma_tx =
+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
+ &sig, &master->dev,
+ mcspi_dma->dma_tx_ch_name);
+
if (!mcspi_dma->dma_tx) {
dma_release_channel(mcspi_dma->dma_rx);
mcspi_dma->dma_rx = NULL;
@@ -1256,29 +1267,42 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
goto free_master;
for (i = 0; i < master->num_chipselect; i++) {
- char dma_ch_name[14];
+ char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
+ char *dma_tx_ch_name = mcspi->dma_channels[i].dma_tx_ch_name;
struct resource *dma_res;
- sprintf(dma_ch_name, "rx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA RX channel\n");
- status = -ENODEV;
- break;
- }
+ sprintf(dma_rx_ch_name, "rx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_rx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA RX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start;
- sprintf(dma_ch_name, "tx%d", i);
- dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- dma_ch_name);
- if (!dma_res) {
- dev_dbg(&pdev->dev, "cannot get DMA TX channel\n");
- status = -ENODEV;
- break;
+ mcspi->dma_channels[i].dma_rx_sync_dev =
+ dma_res->start;
}
+ sprintf(dma_tx_ch_name, "tx%d", i);
+ if (!pdev->dev.of_node) {
+ dma_res =
+ platform_get_resource_byname(pdev,
+ IORESOURCE_DMA,
+ dma_tx_ch_name);
+ if (!dma_res) {
+ dev_dbg(&pdev->dev,
+ "cannot get DMA TX channel\n");
+ status = -ENODEV;
+ break;
+ }
- mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
+ mcspi->dma_channels[i].dma_tx_sync_dev =
+ dma_res->start;
+ }
}
if (status < 0)
--
1.7.9.5
From: Matt Porter <[email protected]>
The binding definition is based on the generic DMA request binding
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt
index 938809c..4c85c4c 100644
--- a/Documentation/devicetree/bindings/spi/omap-spi.txt
+++ b/Documentation/devicetree/bindings/spi/omap-spi.txt
@@ -10,7 +10,18 @@ Required properties:
input. The default is D0 as input and
D1 as output.
-Example:
+Optional properties:
+- dmas: List of DMA specifiers with the controller specific format
+ as described in the generic DMA client binding. A tx and rx
+ specifier is required for each chip select.
+- dma-names: List of DMA request names. These strings correspond
+ 1:1 with the DMA specifiers listed in dmas. The string naming
+ is to be "rxN" and "txN" for RX and TX requests,
+ respectively, where N equals the chip select number.
+
+Examples:
+
+[hwmod populated DMA resources]
mcspi1: mcspi@1 {
#address-cells = <1>;
@@ -20,3 +31,17 @@ mcspi1: mcspi@1 {
ti,spi-num-cs = <4>;
};
+[generic DMA request binding]
+
+mcspi1: mcspi@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ti,omap4-mcspi";
+ ti,hwmods = "mcspi1";
+ ti,spi-num-cs = <2>;
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
+};
--
1.7.9.5
From: Matt Porter <[email protected]>
Changes by Joel:
* Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
* Rewrite shift and offset calculation.
Suggested-by: Sekhar Nori <[email protected]>
Suggested by: Andy Shevchenko <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
Reference:
[1] https://patchwork.kernel.org/patch/2226991/
---
arch/arm/common/edma.c | 59 ++++++++++++++++++++++++++++++++++++
include/linux/platform_data/edma.h | 1 +
2 files changed, 60 insertions(+)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 9823b79..1c2fb15 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1410,6 +1410,52 @@ static int edma_of_read_u32_to_s16_array(const struct device_node *np,
return 0;
}
+static int edma_xbar_event_map(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata, int len)
+{
+ int ret = 0;
+ int i;
+ struct resource res;
+ void *xbar;
+ const s16 (*xbar_chans)[2];
+ u32 shift, offset, mux;
+
+ xbar_chans = devm_kzalloc(dev,
+ len/sizeof(s16) + 2*sizeof(s16),
+ GFP_KERNEL);
+ if (!xbar_chans)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(node, 1, &res);
+ if (ret)
+ return -EIO;
+
+ xbar = devm_ioremap(dev, res.start, resource_size(&res));
+ if (!xbar)
+ return -ENOMEM;
+
+ ret = edma_of_read_u32_to_s16_array(node,
+ "ti,edma-xbar-event-map",
+ (s16 *)xbar_chans,
+ len/sizeof(u32));
+ if (ret)
+ return -EIO;
+
+ for (i = 0; xbar_chans[i][0] != -1; i++) {
+ shift = (xbar_chans[i][1] & 0x03) << 3;
+ offset = xbar_chans[i][1] & 0xfffffffc;
+ mux = readl((void *)((u32)xbar + offset));
+ mux &= ~(0xff << shift);
+ mux |= xbar_chans[i][0] << shift;
+ writel(mux, (void *)((u32)xbar + offset));
+ }
+
+ pdata->xbar_chans = xbar_chans;
+
+ return 0;
+}
+
static int edma_of_parse_dt(struct device *dev,
struct device_node *node,
struct edma_soc_info *pdata)
@@ -1470,6 +1516,9 @@ static int edma_of_parse_dt(struct device *dev,
pdata->default_queue = 0;
+ prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
+ if (prop)
+ ret = edma_xbar_event_map(dev, node, pdata, sz);
return ret;
}
@@ -1489,6 +1538,7 @@ static int edma_probe(struct platform_device *pdev)
int status = -1;
const s16 (*rsv_chans)[2];
const s16 (*rsv_slots)[2];
+ const s16 (*xbar_chans)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
@@ -1617,6 +1667,15 @@ static int edma_probe(struct platform_device *pdev)
}
}
+ /* Clear the xbar mapped channels in unused list */
+ xbar_chans = info[j]->xbar_chans;
+ if (xbar_chans) {
+ for (i = 0; xbar_chans[i][1] != -1; i++) {
+ off = xbar_chans[i][1];
+ clear_bits(off, 1,
+ edma_cc[j]->edma_unused);
+ }
+ }
if (node)
irq[j] = irq_of_parse_and_map(node, 0);
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 317f2be..57300fd 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -177,6 +177,7 @@ struct edma_soc_info {
s8 (*queue_tc_mapping)[2];
s8 (*queue_priority_mapping)[2];
+ const s16 (*xbar_chans)[2];
};
#endif
--
1.7.9.5
From: Matt Porter <[email protected]>
Adds AM33XX EDMA support to the am33xx.dtsi as documented in
Documentation/devicetree/bindings/dma/ti-edma.txt
Joel: Drop DT entries that are non-hardware-description for now as discussed in [1]
[1] https://patchwork.kernel.org/patch/2226761/
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
arch/arm/boot/dts/am33xx.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index d9cad72..3d59bb3 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -89,6 +89,18 @@
reg = <0x48200000 0x1000>;
};
+ edma: edma@49000000 {
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ reg = <0x49000000 0x10000>,
+ <0x44e10f90 0x10>;
+ interrupts = <12 13 14>;
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ };
+
gpio0: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
--
1.7.9.5
From: Matt Porter <[email protected]>
Adds DMA resources to the AM33XX SPI nodes.
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
arch/arm/boot/dts/am33xx.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 3d59bb3..fb17103 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -361,6 +361,11 @@
interrupts = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
+ dmas = <&edma 16
+ &edma 17
+ &edma 18
+ &edma 19>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
@@ -372,6 +377,11 @@
interrupts = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
+ dmas = <&edma 42
+ &edma 43
+ &edma 44
+ &edma 45>;
+ dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
--
1.7.9.5
From: Matt Porter <[email protected]>
Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.
Changes by Joel:
* Setup default one-to-one mapping for queue_priority and queue_tc
mapping as discussed in [1].
* Split out xbar stuff to separate patch. [1]
[1] https://patchwork.kernel.org/patch/2226761/
Signed-off-by: Matt Porter <[email protected]>
Acked-by: Sekhar Nori <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
arch/arm/common/edma.c | 190 +++++++++++++++++++++++++++++++++---
arch/arm/mach-omap2/Kconfig | 1 +
include/linux/platform_data/edma.h | 4 +-
3 files changed, 181 insertions(+), 14 deletions(-)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a1db6cd..9823b79 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -24,6 +24,13 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>
+#include <linux/edma.h>
+#include <linux/err.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_dma.h>
+#include <linux/of_irq.h>
+#include <linux/pm_runtime.h>
#include <linux/platform_data/edma.h>
@@ -1369,31 +1376,173 @@ void edma_clear_event(unsigned channel)
EXPORT_SYMBOL(edma_clear_event);
/*-----------------------------------------------------------------------*/
+static int edma_of_read_u32_to_s8_array(const struct device_node *np,
+ const char *propname, s8 *out_values,
+ size_t sz)
+{
+ int ret;
+
+ ret = of_property_read_u8_array(np, propname, out_values, sz);
+ if (ret)
+ return ret;
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
+
+static int edma_of_read_u32_to_s16_array(const struct device_node *np,
+ const char *propname, s16 *out_values,
+ size_t sz)
+{
+ int ret;
+
+ ret = of_property_read_u16_array(np, propname, out_values, sz);
+ if (ret)
+ return ret;
+
+ /* Terminate it */
+ *out_values++ = -1;
+ *out_values++ = -1;
+
+ return 0;
+}
-static int __init edma_probe(struct platform_device *pdev)
+static int edma_of_parse_dt(struct device *dev,
+ struct device_node *node,
+ struct edma_soc_info *pdata)
+{
+ int ret = 0, i;
+ u32 value;
+ struct property *prop;
+ size_t sz;
+ struct edma_rsv_info *rsv_info;
+ const s16 (*rsv_chans)[2], (*rsv_slots)[2];
+ s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
+
+ memset(pdata, 0, sizeof(struct edma_soc_info));
+
+ ret = of_property_read_u32(node, "dma-channels", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_channel = value;
+
+ ret = of_property_read_u32(node, "ti,edma-regions", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_region = value;
+
+ ret = of_property_read_u32(node, "ti,edma-slots", &value);
+ if (ret < 0)
+ return ret;
+ pdata->n_slot = value;
+
+ pdata->n_cc = 1;
+ pdata->n_tc = 3;
+
+ rsv_info =
+ devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
+ if (!rsv_info)
+ return -ENOMEM;
+ pdata->rsv = rsv_info;
+
+ queue_tc_map = devm_kzalloc(dev, 8*sizeof(s8), GFP_KERNEL);
+ if (!queue_tc_map)
+ return -ENOMEM;
+
+ for (i = 0; i < 3; i++)
+ queue_tc_map[i][0] = queue_tc_map[i][1] = i;
+ queue_tc_map[i][0] = queue_tc_map[i][1] = -1;
+
+ pdata->queue_tc_mapping = queue_tc_map;
+
+ queue_priority_map = devm_kzalloc(dev, 8*sizeof(s8), GFP_KERNEL);
+ if (!queue_priority_map)
+ return -ENOMEM;
+
+ for (i = 0; i < 3; i++)
+ queue_priority_map[i][0] = queue_priority_map[i][1] = i;
+ queue_priority_map[i][0] = queue_priority_map[i][1] = -1;
+
+ pdata->queue_priority_mapping = queue_priority_map;
+
+ pdata->default_queue = 0;
+
+
+ return ret;
+}
+
+static struct of_dma_filter_info edma_filter_info = {
+ .filter_fn = edma_filter_fn,
+};
+
+static int edma_probe(struct platform_device *pdev)
{
struct edma_soc_info **info = pdev->dev.platform_data;
- const s8 (*queue_priority_mapping)[2];
- const s8 (*queue_tc_mapping)[2];
+ struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
+ struct edma_soc_info tmpinfo;
+ s8 (*queue_priority_mapping)[2];
+ s8 (*queue_tc_mapping)[2];
int i, j, off, ln, found = 0;
int status = -1;
const s16 (*rsv_chans)[2];
const s16 (*rsv_slots)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
- struct resource *r[EDMA_MAX_CC] = {NULL};
+ struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
+ struct resource res[EDMA_MAX_CC];
resource_size_t len[EDMA_MAX_CC];
char res_name[10];
char irq_name[10];
+ struct device_node *node = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ if (node) {
+ /* Check if this is a second instance registered */
+ if (arch_num_cc) {
+ dev_err(dev, "only one EDMA instance is supported via DT\n");
+ return -ENODEV;
+ }
+ info = ninfo;
+ edma_of_parse_dt(dev, node, &tmpinfo);
+ info[0] = &tmpinfo;
+
+ dma_cap_set(DMA_SLAVE, edma_filter_info.dma_cap);
+ of_dma_controller_register(dev->of_node,
+ of_dma_simple_xlate,
+ &edma_filter_info);
+ }
if (!info)
return -ENODEV;
+ pm_runtime_enable(dev);
+ ret = pm_runtime_get_sync(dev);
+ if (ret < 0) {
+ dev_err(dev, "pm_runtime_get_sync() failed\n");
+ return ret;
+ }
+
for (j = 0; j < EDMA_MAX_CC; j++) {
- sprintf(res_name, "edma_cc%d", j);
- r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ if (!info[j]) {
+ if (!found)
+ return -ENODEV;
+ break;
+ }
+ if (node) {
+ ret = of_address_to_resource(node, j, &res[j]);
+ if (!ret)
+ r[j] = &res[j];
+ } else {
+ sprintf(res_name, "edma_cc%d", j);
+ r[j] = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
res_name);
- if (!r[j] || !info[j]) {
+ }
+ if (!r[j]) {
if (found)
break;
else
@@ -1468,8 +1617,13 @@ static int __init edma_probe(struct platform_device *pdev)
}
}
- sprintf(irq_name, "edma%d", j);
- irq[j] = platform_get_irq_byname(pdev, irq_name);
+
+ if (node)
+ irq[j] = irq_of_parse_and_map(node, 0);
+ else {
+ sprintf(irq_name, "edma%d", j);
+ irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_start = irq[j];
status = request_irq(irq[j], dma_irq_handler, 0, "edma",
&pdev->dev);
@@ -1479,8 +1633,12 @@ static int __init edma_probe(struct platform_device *pdev)
goto fail;
}
- sprintf(irq_name, "edma%d_err", j);
- err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ if (node)
+ err_irq[j] = irq_of_parse_and_map(node, 2);
+ else {
+ sprintf(irq_name, "edma%d_err", j);
+ err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+ }
edma_cc[j]->irq_res_end = err_irq[j];
status = request_irq(err_irq[j], dma_ccerr_handler, 0,
"edma_error", &pdev->dev);
@@ -1541,9 +1699,17 @@ fail1:
return status;
}
+static const struct of_device_id edma_of_ids[] = {
+ { .compatible = "ti,edma3", },
+ {}
+};
static struct platform_driver edma_driver = {
- .driver.name = "edma",
+ .driver = {
+ .name = "edma",
+ .of_match_table = edma_of_ids,
+ },
+ .probe = edma_probe,
};
static int __init edma_init(void)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index f49cd51..f91b07f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -17,6 +17,7 @@ config ARCH_OMAP2PLUS
select PROC_DEVICETREE if PROC_FS
select SOC_BUS
select SPARSE_IRQ
+ select TI_PRIV_EDMA
select USE_OF
help
Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index 2344ea2..317f2be 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -175,8 +175,8 @@ struct edma_soc_info {
/* Resource reservation for other cores */
struct edma_rsv_info *rsv;
- const s8 (*queue_tc_mapping)[2];
- const s8 (*queue_priority_mapping)[2];
+ s8 (*queue_tc_mapping)[2];
+ s8 (*queue_priority_mapping)[2];
};
#endif
--
1.7.9.5
From: Matt Porter <[email protected]>
The binding definition is based on the generic DMA controller
binding.
Joel:
* Droped reserved and queue DT entries from Documentation
for now from the original patch series (v10)
* Included properties in Documentation and clarified DMA properties (V11)
* Made ti,hwmod option
* Clarified DMA entries
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 34 +++++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
new file mode 100644
index 0000000..9fbbdb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti-edma.txt
@@ -0,0 +1,34 @@
+TI EDMA
+
+Required properties:
+- compatible : "ti,edma3"
+- ti,edma-regions: Number of regions
+- ti,edma-slots: Number of slots
+- #dma-cells: Should be set to <1>
+ Clients should use a single channel number per DMA request.
+- dma-channels: Specify total DMA channels per CC
+- reg: Memory map for accessing module
+- interrupt-parent: Interrupt controller the interrupt is routed through
+- interrupts: Exactly 3 interrupts need to be specified in the order:
+ 1. Transfer completion interrupt.
+ 2. Memory protection interrupt.
+ 3. Error interrupt.
+Optional properties:
+- ti,hwmods: Name of the hwmods associated to the EDMA
+- ti,edma-xbar-event-map: Crossbar event to channel map
+
+Example:
+
+edma: edma@49000000 {
+ reg = <0x49000000 0x10000>;
+ interrupt-parent = <&intc>;
+ interrupts = <12 13 14>;
+ compatible = "ti,edma3";
+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
+ #dma-cells = <1>;
+ dma-channels = <64>;
+ ti,edma-regions = <4>;
+ ti,edma-slots = <256>;
+ ti,edma-xbar-event-map = <1 12
+ 2 13>;
+};
--
1.7.9.5
From: Matt Porter <[email protected]>
Enable TI EDMA option on OMAP.
Signed-off-by: Matt Porter <[email protected]>
Signed-off-by: Joel A Fernandes <[email protected]>
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index e992489..3215a3c 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -213,7 +213,7 @@ config SIRF_DMA
config TI_EDMA
tristate "TI EDMA support"
- depends on ARCH_DAVINCI
+ depends on ARCH_DAVINCI || ARCH_OMAP
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
default n
--
1.7.9.5
On 6/18/2013 12:08 PM, Joel A Fernandes wrote:
> From: Matt Porter <[email protected]>
>
> Adds support for parsing the TI EDMA DT data into the required EDMA
> private API platform data. Enables runtime PM support to initialize
> the EDMA hwmod. Enables build on OMAP.
>
> Changes by Joel:
> * Setup default one-to-one mapping for queue_priority and queue_tc
> mapping as discussed in [1].
> * Split out xbar stuff to separate patch. [1]
>
> [1] https://patchwork.kernel.org/patch/2226761/
>
> Signed-off-by: Matt Porter <[email protected]>
> Acked-by: Sekhar Nori <[email protected]>
> Signed-off-by: Joel A Fernandes <[email protected]>
> ---
> arch/arm/common/edma.c | 190 +++++++++++++++++++++++++++++++++---
> arch/arm/mach-omap2/Kconfig | 1 +
> include/linux/platform_data/edma.h | 4 +-
> 3 files changed, 181 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index a1db6cd..9823b79 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -24,6 +24,13 @@
> #include <linux/platform_device.h>
> #include <linux/io.h>
> #include <linux/slab.h>
> +#include <linux/edma.h>
> +#include <linux/err.h>
> +#include <linux/of_address.h>
> +#include <linux/of_device.h>
> +#include <linux/of_dma.h>
> +#include <linux/of_irq.h>
> +#include <linux/pm_runtime.h>
>
> #include <linux/platform_data/edma.h>
>
> @@ -1369,31 +1376,173 @@ void edma_clear_event(unsigned channel)
> EXPORT_SYMBOL(edma_clear_event);
>
> /*-----------------------------------------------------------------------*/
> +static int edma_of_read_u32_to_s8_array(const struct device_node *np,
> + const char *propname, s8 *out_values,
> + size_t sz)
> +{
> + int ret;
> +
> + ret = of_property_read_u8_array(np, propname, out_values, sz);
> + if (ret)
> + return ret;
> +
> + /* Terminate it */
> + *out_values++ = -1;
> + *out_values++ = -1;
> +
> + return 0;
> +}
> +
> +static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> + const char *propname, s16 *out_values,
> + size_t sz)
> +{
> + int ret;
> +
> + ret = of_property_read_u16_array(np, propname, out_values, sz);
> + if (ret)
> + return ret;
> +
> + /* Terminate it */
> + *out_values++ = -1;
> + *out_values++ = -1;
> +
> + return 0;
> +}
These functions dont get used here. Can you introduce them when you
actually need them?
>
> -static int __init edma_probe(struct platform_device *pdev)
> +static int edma_of_parse_dt(struct device *dev,
> + struct device_node *node,
> + struct edma_soc_info *pdata)
> +{
> + int ret = 0, i;
> + u32 value;
> + struct property *prop;
> + size_t sz;
> + struct edma_rsv_info *rsv_info;
> + const s16 (*rsv_chans)[2], (*rsv_slots)[2];
rsv_slots is unused. You get an unused variable warning here. rsv_chans
is also unused.
> + s8 (*queue_tc_map)[2], (*queue_priority_map)[2];
> +
> + memset(pdata, 0, sizeof(struct edma_soc_info));
> +
> + ret = of_property_read_u32(node, "dma-channels", &value);
> + if (ret < 0)
> + return ret;
> + pdata->n_channel = value;
> +
> + ret = of_property_read_u32(node, "ti,edma-regions", &value);
> + if (ret < 0)
> + return ret;
> + pdata->n_region = value;
> +
> + ret = of_property_read_u32(node, "ti,edma-slots", &value);
> + if (ret < 0)
> + return ret;
> + pdata->n_slot = value;
> +
> + pdata->n_cc = 1;
> + pdata->n_tc = 3;
n_tc is not used in the driver AFAICS. You can drop this line and also
possibly remove the platform data member as well.
> +
> + rsv_info =
> + devm_kzalloc(dev, sizeof(struct edma_rsv_info), GFP_KERNEL);
> + if (!rsv_info)
> + return -ENOMEM;
> + pdata->rsv = rsv_info;
> +
> + queue_tc_map = devm_kzalloc(dev, 8*sizeof(s8), GFP_KERNEL);
> + if (!queue_tc_map)
> + return -ENOMEM;
> +
> + for (i = 0; i < 3; i++)
> + queue_tc_map[i][0] = queue_tc_map[i][1] = i;
> + queue_tc_map[i][0] = queue_tc_map[i][1] = -1;
> +
> + pdata->queue_tc_mapping = queue_tc_map;
> +
> + queue_priority_map = devm_kzalloc(dev, 8*sizeof(s8), GFP_KERNEL);
> + if (!queue_priority_map)
> + return -ENOMEM;
> +
> + for (i = 0; i < 3; i++)
> + queue_priority_map[i][0] = queue_priority_map[i][1] = i;
> + queue_priority_map[i][0] = queue_priority_map[i][1] = -1;
> +
> + pdata->queue_priority_mapping = queue_priority_map;
> +
> + pdata->default_queue = 0;
> +
> +
Extra empty line here.
> + return ret;
> +}
Usage of devres APIs in this function is nice, but, there is no check
for return value of edma_of_parse_dt() in the probe down below. So in
effect it leaks memory on error.
> +
> +static struct of_dma_filter_info edma_filter_info = {
> + .filter_fn = edma_filter_fn,
> +};
> +
> +static int edma_probe(struct platform_device *pdev)
> {
> struct edma_soc_info **info = pdev->dev.platform_data;
> - const s8 (*queue_priority_mapping)[2];
> - const s8 (*queue_tc_mapping)[2];
> + struct edma_soc_info *ninfo[EDMA_MAX_CC] = {NULL, NULL};
Nit: just {NULL} is enough.
> + struct edma_soc_info tmpinfo;
> + s8 (*queue_priority_mapping)[2];
> + s8 (*queue_tc_mapping)[2];
> int i, j, off, ln, found = 0;
> int status = -1;
> const s16 (*rsv_chans)[2];
> const s16 (*rsv_slots)[2];
> int irq[EDMA_MAX_CC] = {0, 0};
> int err_irq[EDMA_MAX_CC] = {0, 0};
> - struct resource *r[EDMA_MAX_CC] = {NULL};
> + struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
No need for this change. C array initialization will initialize missing
values to 0.
> + struct resource res[EDMA_MAX_CC];
> resource_size_t len[EDMA_MAX_CC];
res and len should disappear once you rebase to Prabhakar's patch. That
patch is present in v3.11/soc-2 branch of my tree. Please rebase your
series to that.
> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index f49cd51..f91b07f 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -17,6 +17,7 @@ config ARCH_OMAP2PLUS
> select PROC_DEVICETREE if PROC_FS
> select SOC_BUS
> select SPARSE_IRQ
> + select TI_PRIV_EDMA
> select USE_OF
> help
> Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
This hunk doesnt really belong here. You can merge it with the patch
which introduces EDMA support to AM335x.
> diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
> index 2344ea2..317f2be 100644
> --- a/include/linux/platform_data/edma.h
> +++ b/include/linux/platform_data/edma.h
> @@ -175,8 +175,8 @@ struct edma_soc_info {
> /* Resource reservation for other cores */
> struct edma_rsv_info *rsv;
>
> - const s8 (*queue_tc_mapping)[2];
> - const s8 (*queue_priority_mapping)[2];
> + s8 (*queue_tc_mapping)[2];
> + s8 (*queue_priority_mapping)[2];
This causes a bunch of gcc and sparse warnings in devices-da8xx.c (and
probably elsewhere in mach-davinci). Can you please check those and fix?
See: http://paste.ubuntu.com/5776604/
Thanks,
Sekhar
On 6/18/2013 12:08 PM, Joel A Fernandes wrote:
> From: Matt Porter <[email protected]>
>
> Changes by Joel:
> * Split EDMA xbar support out of original EDMA DT parsing patch
> to keep it easier for review.
> * Rewrite shift and offset calculation.
>
> Suggested-by: Sekhar Nori <[email protected]>
> Suggested by: Andy Shevchenko <[email protected]>
> Signed-off-by: Joel A Fernandes <[email protected]>
>
> Reference:
> [1] https://patchwork.kernel.org/patch/2226991/
> ---
> arch/arm/common/edma.c | 59 ++++++++++++++++++++++++++++++++++++
> include/linux/platform_data/edma.h | 1 +
> 2 files changed, 60 insertions(+)
>
> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
> index 9823b79..1c2fb15 100644
> --- a/arch/arm/common/edma.c
> +++ b/arch/arm/common/edma.c
> @@ -1410,6 +1410,52 @@ static int edma_of_read_u32_to_s16_array(const struct device_node *np,
> return 0;
> }
>
> +static int edma_xbar_event_map(struct device *dev,
> + struct device_node *node,
> + struct edma_soc_info *pdata, int len)
> +{
> + int ret = 0;
> + int i;
> + struct resource res;
> + void *xbar;
void __iomem *xbar;
> + const s16 (*xbar_chans)[2];
> + u32 shift, offset, mux;
> +
> + xbar_chans = devm_kzalloc(dev,
> + len/sizeof(s16) + 2*sizeof(s16),
> + GFP_KERNEL);
> + if (!xbar_chans)
> + return -ENOMEM;
> +
> + ret = of_address_to_resource(node, 1, &res);
> + if (ret)
> + return -EIO;
> +
> + xbar = devm_ioremap(dev, res.start, resource_size(&res));
> + if (!xbar)
> + return -ENOMEM;
> +
> + ret = edma_of_read_u32_to_s16_array(node,
> + "ti,edma-xbar-event-map",
> + (s16 *)xbar_chans,
> + len/sizeof(u32));
> + if (ret)
> + return -EIO;
> +
> + for (i = 0; xbar_chans[i][0] != -1; i++) {
> + shift = (xbar_chans[i][1] & 0x03) << 3;
> + offset = xbar_chans[i][1] & 0xfffffffc;
> + mux = readl((void *)((u32)xbar + offset));
Please drop unnecessary casting. Simply:
mux = readl(xbar + offset);
> + mux &= ~(0xff << shift);
> + mux |= xbar_chans[i][0] << shift;
> + writel(mux, (void *)((u32)xbar + offset));
Fix the writel likewise.
> + }
> +
> + pdata->xbar_chans = xbar_chans;
> +
> + return 0;
> +}
> +
> static int edma_of_parse_dt(struct device *dev,
> struct device_node *node,
> struct edma_soc_info *pdata)
> @@ -1470,6 +1516,9 @@ static int edma_of_parse_dt(struct device *dev,
>
> pdata->default_queue = 0;
>
> + prop = of_find_property(node, "ti,edma-xbar-event-map", &sz);
> + if (prop)
> + ret = edma_xbar_event_map(dev, node, pdata, sz);
>
> return ret;
> }
> @@ -1489,6 +1538,7 @@ static int edma_probe(struct platform_device *pdev)
> int status = -1;
> const s16 (*rsv_chans)[2];
> const s16 (*rsv_slots)[2];
> + const s16 (*xbar_chans)[2];
> int irq[EDMA_MAX_CC] = {0, 0};
> int err_irq[EDMA_MAX_CC] = {0, 0};
> struct resource *r[EDMA_MAX_CC] = {NULL, NULL};
> @@ -1617,6 +1667,15 @@ static int edma_probe(struct platform_device *pdev)
> }
> }
>
> + /* Clear the xbar mapped channels in unused list */
> + xbar_chans = info[j]->xbar_chans;
> + if (xbar_chans) {
> + for (i = 0; xbar_chans[i][1] != -1; i++) {
> + off = xbar_chans[i][1];
> + clear_bits(off, 1,
> + edma_cc[j]->edma_unused);
Please fix the alignment here.
Thanks,
Sekhar
On Tuesday 18 June 2013, Joel A Fernandes wrote:
>
> This series is a repost of Matt Porter's EDMA patches for AM33XX EDMA support
> with changes for few pending review comments on v9 series.
>
> Currently this is required for AM33XX (Beaglebone or EVM) to access MMC
> and be able mount to rootfs and boot till command prompt over MMC.
> Unless there are other pending review comments, I hope this series can
> make it into 3.11 merge window, the dependent series has been posted at [1]
> and completed review.
>
> Tested EDMA on AM1808 EVM and AM33XX Beaglebone with MMC.
>
Acked-by: Arnd Bergmann <[email protected]>
The binding looks good now.
My usual comment about the fact that we shouldn't use a filter function in
.xlate() applies here, but that is more about the missing interface of
the dmaengine layer than the particular driver.
Arnd
Hi Sekhar,
Thanks for the feedback.
On Tue, Jun 18, 2013 at 5:19 AM, Sekhar Nori <[email protected]> wrote:
> On 6/18/2013 12:08 PM, Joel A Fernandes wrote:
>> From: Matt Porter <[email protected]>
>>
>> Changes by Joel:
>> * Split EDMA xbar support out of original EDMA DT parsing patch
>> to keep it easier for review.
>> * Rewrite shift and offset calculation.
>>
>> Suggested-by: Sekhar Nori <[email protected]>
>> Suggested by: Andy Shevchenko <[email protected]>
>> Signed-off-by: Joel A Fernandes <[email protected]>
>>
>> Reference:
>> [1] https://patchwork.kernel.org/patch/2226991/
>> ---
>> arch/arm/common/edma.c | 59 ++++++++++++++++++++++++++++++++++++
>> include/linux/platform_data/edma.h | 1 +
>> 2 files changed, 60 insertions(+)
>>
>> diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
>> index 9823b79..1c2fb15 100644
>> --- a/arch/arm/common/edma.c
>> +++ b/arch/arm/common/edma.c
>> @@ -1410,6 +1410,52 @@ static int edma_of_read_u32_to_s16_array(const struct device_node *np,
>> return 0;
>> }
>>
>> +static int edma_xbar_event_map(struct device *dev,
>> + struct device_node *node,
>> + struct edma_soc_info *pdata, int len)
>> +{
>> + int ret = 0;
>> + int i;
>> + struct resource res;
>> + void *xbar;
>
> void __iomem *xbar;
OK.
>> + const s16 (*xbar_chans)[2];
>> + u32 shift, offset, mux;
>> +
>> + xbar_chans = devm_kzalloc(dev,
>> + len/sizeof(s16) + 2*sizeof(s16),
>> + GFP_KERNEL);
>> + if (!xbar_chans)
>> + return -ENOMEM;
>> +
>> + ret = of_address_to_resource(node, 1, &res);
>> + if (ret)
>> + return -EIO;
>> +
>> + xbar = devm_ioremap(dev, res.start, resource_size(&res));
>> + if (!xbar)
>> + return -ENOMEM;
>> +
>> + ret = edma_of_read_u32_to_s16_array(node,
>> + "ti,edma-xbar-event-map",
>> + (s16 *)xbar_chans,
>> + len/sizeof(u32));
>> + if (ret)
>> + return -EIO;
>> +
>> + for (i = 0; xbar_chans[i][0] != -1; i++) {
>> + shift = (xbar_chans[i][1] & 0x03) << 3;
>> + offset = xbar_chans[i][1] & 0xfffffffc;
>> + mux = readl((void *)((u32)xbar + offset));
>
> Please drop unnecessary casting. Simply:
Done.
>
> mux = readl(xbar + offset);
>
>> + mux &= ~(0xff << shift);
>> + mux |= xbar_chans[i][0] << shift;
>> + writel(mux, (void *)((u32)xbar + offset));
>
> Fix the writel likewise.
Done.
>> }
>>
>> + /* Clear the xbar mapped channels in unused list */
>> + xbar_chans = info[j]->xbar_chans;
>> + if (xbar_chans) {
>> + for (i = 0; xbar_chans[i][1] != -1; i++) {
>> + off = xbar_chans[i][1];
>> + clear_bits(off, 1,
>> + edma_cc[j]->edma_unused);
>
> Please fix the alignment here.
I noticed the alignment was off in a few other places in that driver.
Fixed those up too.
Thanks,
Joel
On 6/20/2013 6:06 AM, Joel A Fernandes wrote:
>>> + /* Clear the xbar mapped channels in unused list */
>>> + xbar_chans = info[j]->xbar_chans;
>>> + if (xbar_chans) {
>>> + for (i = 0; xbar_chans[i][1] != -1; i++) {
>>> + off = xbar_chans[i][1];
>>> + clear_bits(off, 1,
>>> + edma_cc[j]->edma_unused);
>>
>> Please fix the alignment here.
>
> I noticed the alignment was off in a few other places in that driver.
> Fixed those up too.
If you do, please make it a separate (pre)patch.
Thanks,
Sekhar