Hello,
This patch series adds support for the remaining devices (or device options)
not yet supported in dt.
AFAICT there is no more infos/devices not converted to dt for this board,
and we should be able to remove board-at91rm9200ek.c (when we decide to
do it).
This series was not tested (the dt compilation passed), could someone
owning this board test it ?
In order to test it, you need to apply these series first:
https://lkml.org/lkml/2013/8/27/58
pinctrl: at91: add support for OUTPUT config
Best Regards,
Boris
Boris BREZILLON (9):
ARM: at91/dt: rm9200: add spi0 chip select pins definitions
ARM: at91/dt: add ethernet phy to at91rm9200ek board
ARM: at91/dt: add usb1 vbus and pullup pins
ARM: at91/dt: add atmel,pullup-gpio to at91rm9200ek usb1 definition
ARM: at91/dt: add mmc0 slot0 support to at91rm9200ek board
ARM: at91/dt: add spi0 support to at91rm9200ek board
ARM: at91/dt: add i2c devices connected to at91rm9200ek board
ARM: at91/dt: add new at91rm9200ek_mmc board
ARM: at91/dt: add new at91rm9200ek_dataflash board
arch/arm/boot/dts/at91rm9200.dtsi | 20 ++++++
arch/arm/boot/dts/at91rm9200ek.dts | 88 ++++++++++++++++++++++++++
arch/arm/boot/dts/at91rm9200ek_dataflash.dts | 33 ++++++++++
arch/arm/boot/dts/at91rm9200ek_mmc.dts | 23 +++++++
4 files changed, 164 insertions(+)
create mode 100644 arch/arm/boot/dts/at91rm9200ek_dataflash.dts
create mode 100644 arch/arm/boot/dts/at91rm9200ek_mmc.dts
--
1.7.9.5
Add spi0 cs pinctrl pins definitions.
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index f770655..69b76c7 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -486,6 +486,26 @@
AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
};
+
+ pinctrl_spi0_cs0: spi0_cs0-0 {
+ atmel,pins =
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A SPI0_NPCS0 pin */
+ };
+
+ pinctrl_spi0_cs1: spi0_cs1-0 {
+ atmel,pins =
+ <AT91_PIOA 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA4 GPIO SPI0_NPCS1 pin */
+ };
+
+ pinctrl_spi0_cs2: spi0_cs2-0 {
+ atmel,pins =
+ <AT91_PIOA 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA5 GPIO SPI0_NPCS2 pin */
+ };
+
+ pinctrl_spi0_cs3: spi0_cs3-0 {
+ atmel,pins =
+ <AT91_PIOA 6 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA6 GPIO SPI0_NPCS3 pin */
+ };
};
pioA: gpio@fffff400 {
--
1.7.9.5
Add ethernet phy node in at91rm9200ek.dts.
The reg register is not specified, as it may differ depending on the init
process of the board:
ADDR0/1 phy pins are connected to PA13/14 rm9200 pins. Which means the phy
will take its address from these pins during the reset process.
The macb driver will launch a full scan on the mdio bus to discover the phy
address.
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index d2d72c3..37b0880 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -47,6 +47,11 @@
macb0: ethernet@fffbc000 {
phy-mode = "rmii";
status = "okay";
+
+ phy0: ethernet-phy {
+ interrupt-parent = <&pioC>;
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
+ };
};
usb1: gadget@fffb0000 {
--
1.7.9.5
Add vbus and pullup pinctrl definitions.
Request the vbus and pullup pins in usb1 node.
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index 37b0880..76f3e87 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -29,6 +29,18 @@
ahb {
apb {
+ pinctrl@fffff400 {
+ usb1 {
+ pinctrl_usb1_vbus: usb1_vbus-0 {
+ atmel,pins = <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usb1_pullup: usb1_pullup-0 {
+ atmel,pins = <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
+ };
+ };
+ };
+
dbgu: serial@fffff200 {
status = "okay";
};
@@ -56,6 +68,9 @@
usb1: gadget@fffb0000 {
atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1_vbus
+ &pinctrl_usb1_pullup>;
status = "okay";
};
--
1.7.9.5
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index 76f3e87..f2d6d79 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -68,6 +68,7 @@
usb1: gadget@fffb0000 {
atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
+ atmel,pullup-gpio = <&pioD 5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_vbus
&pinctrl_usb1_pullup>;
--
1.7.9.5
Add slot0 of mmc0 pinctrl pins definitions:
- detect pin
- write protect pin
- enable slot0 pin: this pin is connected to an external switch which
enable mmc0 slot0 or spi dataflash connected to cs3
The mmc0 device is not enabled, as it depends on the choosen functionnality
(spi cs3 or mmc0 slot0).
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek.dts | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index f2d6d79..2bad423 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -39,6 +39,23 @@
atmel,pins = <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
};
};
+
+ mmc0 {
+ pinctrl_mmc0_slot0_detect: mmc0_slot0_detect-0 {
+ atmel,pins =
+ <AT91_PIOB 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+ };
+
+ pinctrl_mmc0_slot0_write_protect: mmc0_slot0_write_protect-0 {
+ atmel,pins =
+ <AT91_PIOA 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_mmc0_slot0_switch: mmc0_slot0_switch-0 {
+ atmel,pins =
+ <AT91_PIOB 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(1))>;
+ };
+ };
};
dbgu: serial@fffff200 {
@@ -84,6 +101,24 @@
reg = <0>;
};
};
+
+ mmc0: mmc@fffb4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pinctrl_mmc0_clk
+ &pinctrl_mmc0_slot0_cmd_dat0
+ &pinctrl_mmc0_slot0_dat1_3
+ &pinctrl_mmc0_slot0_detect
+ &pinctrl_mmc0_slot0_write_protect
+ &pinctrl_mmc0_slot0_switch>;
+
+ slot0: slot@0 {
+ reg = <0>;
+ bus-width = <4>;
+ cd-gpios = <&pioB 27 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&pioA 17 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
usb0: ohci@00300000 {
--
1.7.9.5
Add spi0 cs3 switch pinctrl pin definitions: this pin is used to select
between mmc0 slot0 and spi dataflash connected to cs3.
Enable spi0 controller and define the mtd_dataflash connected to cs0.
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek.dts | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index 2bad423..b3e7425 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -56,6 +56,13 @@
<AT91_PIOB 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(1))>;
};
};
+
+ spi0 {
+ pinctrl_spi0_cs3_switch: spi0_cs3_switch-0 {
+ atmel,pins =
+ <AT91_PIOB 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>;
+ };
+ };
};
dbgu: serial@fffff200 {
@@ -119,6 +126,19 @@
wp-gpios = <&pioA 17 GPIO_ACTIVE_HIGH>;
};
};
+
+ spi0: spi@fffe0000 {
+ pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs0>;
+ cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <0>,
+ <0>, <0>;
+ status = "okay";
+
+ mtd_dataflash@0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <15000000>;
+ reg = <0>;
+ };
+ };
};
usb0: ohci@00300000 {
--
1.7.9.5
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index b3e7425..fd2601a 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -147,6 +147,18 @@
};
};
+ i2c@0 {
+ status = "okay";
+
+ ics1523@26 {
+ reg = <0x26>;
+ };
+
+ dac3550@4d {
+ reg = <0x4d>;
+ };
+ };
+
leds {
compatible = "gpio-leds";
--
1.7.9.5
Add a new at91rm9200ek_mmc board (based on at91rm9200ek board) which enables
mmc0/slot0.
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek_mmc.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 arch/arm/boot/dts/at91rm9200ek_mmc.dts
diff --git a/arch/arm/boot/dts/at91rm9200ek_mmc.dts b/arch/arm/boot/dts/at91rm9200ek_mmc.dts
new file mode 100644
index 0000000..c87a861
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200ek_mmc.dts
@@ -0,0 +1,23 @@
+/*
+ * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit with
+ * an MMC slot
+ *
+ * Copyright (C) 2013 Boris BREZILLON <[email protected]>
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+#include "at91rm9200ek.dts"
+
+/ {
+ model = "Atmel AT91RM9200 evaluation kit with MMC slot";
+ compatible = "atmel,at91rm9200ek-mmc", "atmel,at91rm9200ek", "atmel,at91rm9200";
+
+ ahb {
+ apb {
+ mmc0: mmc@fffb4000 {
+ status = "okay";
+ };
+ };
+ };
+};
--
1.7.9.5
Add a new at91rm9200ek_dataflash board (based on at91rm9200ek board) which
enables dataflash connected to cs3 of spi0.
Signed-off-by: Boris BREZILLON <[email protected]>
---
arch/arm/boot/dts/at91rm9200ek_dataflash.dts | 33 ++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 arch/arm/boot/dts/at91rm9200ek_dataflash.dts
diff --git a/arch/arm/boot/dts/at91rm9200ek_dataflash.dts b/arch/arm/boot/dts/at91rm9200ek_dataflash.dts
new file mode 100644
index 0000000..a43412e
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200ek_dataflash.dts
@@ -0,0 +1,33 @@
+/*
+ * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit with
+ * 2 SPI dataflash
+ *
+ * Copyright (C) 2013 Boris BREZILLON <[email protected]>
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+#include "at91rm9200ek.dts"
+
+/ {
+ model = "Atmel AT91RM9200 evaluation kit with 2 SPI dataflash";
+ compatible = "atmel,at91rm9200ek-dataflash", "atmel,at91rm9200ek", "atmel,at91rm9200";
+
+ ahb {
+ apb {
+ spi0: spi@fffe0000 {
+ pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs0
+ &pinctrl_spi0_cs3
+ &pinctrl_spi0_cs3_switch>;
+ cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <0>,
+ <0>, <&pioA 6 GPIO_ACTIVE_HIGH>;
+
+ mtd_dataflash@3 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <15000000>;
+ reg = <3>;
+ };
+ };
+ };
+ };
+};
--
1.7.9.5