Hi,
This patch series provide USB host support for the OMAP5 uEVM board.
As ethernet port is over USB, it brings up ethernet as well.
Series depends on the OMAP clock tree DT data series by Tero Kristo [1]
Tested on OMAP5 uEVM and OMAP4 Panda.
cheers,
-roger
[1] - OMAP Clock DT conversion
http://www.spinics.net/lists/arm-kernel/msg275311.html
Roger Quadros (6):
ARM: OMAP5: hwmod data: Add USB Host and TLL modules
ARM: dts: OMAP5: Add 60MHz clock reference to USB Host module
ARM: dts: omap4-panda: Provide USB PHY clock
ARM: dts: omap5-uevm: Provide USB PHY clock
Revert "ARM: OMAP2+: Provide alias to USB PHY clock"
mfd: omap-usb: prepare/unprepare clock while enable/disable
arch/arm/boot/dts/omap4-panda-common.dtsi | 8 +--
arch/arm/boot/dts/omap5-uevm.dts | 8 +--
arch/arm/boot/dts/omap5.dtsi | 2 +
arch/arm/mach-omap2/board-generic.c | 23 +-----
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 135 ++++++++++++++++++++++++++++
drivers/mfd/omap-usb-host.c | 16 ++--
drivers/mfd/omap-usb-tll.c | 4 +-
7 files changed, 152 insertions(+), 44 deletions(-)
--
1.7.4.1
Add hwmod data for High Speed USB host and TLL modules
CC: Paul Walmsley <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 135 ++++++++++++++++++++++++++++
1 files changed, 135 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 1a21a81..1dd2c20 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1501,6 +1501,123 @@ static struct omap_hwmod omap54xx_uart6_hwmod = {
};
/*
+ * 'usb_host_hs' class
+ * high-speed multi-port usb host controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_usb_host_hs_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+ .sysc_fields = &omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap54xx_usb_host_hs_hwmod_class = {
+ .name = "usb_host_hs",
+ .sysc = &omap54xx_usb_host_hs_sysc,
+};
+
+static struct omap_hwmod omap54xx_usb_host_hs_hwmod = {
+ .name = "usb_host_hs",
+ .class = &omap54xx_usb_host_hs_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ /*
+ * Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
+ * id: i660
+ *
+ * Description:
+ * In the following configuration :
+ * - USBHOST module is set to smart-idle mode
+ * - PRCM asserts idle_req to the USBHOST module ( This typically
+ * happens when the system is going to a low power mode : all ports
+ * have been suspended, the master part of the USBHOST module has
+ * entered the standby state, and SW has cut the functional clocks)
+ * - an USBHOST interrupt occurs before the module is able to answer
+ * idle_ack, typically a remote wakeup IRQ.
+ * Then the USB HOST module will enter a deadlock situation where it
+ * is no more accessible nor functional.
+ *
+ * Workaround:
+ * Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
+ */
+
+ /*
+ * Errata: USB host EHCI may stall when entering smart-standby mode
+ * Id: i571
+ *
+ * Description:
+ * When the USBHOST module is set to smart-standby mode, and when it is
+ * ready to enter the standby state (i.e. all ports are suspended and
+ * all attached devices are in suspend mode), then it can wrongly assert
+ * the Mstandby signal too early while there are still some residual OCP
+ * transactions ongoing. If this condition occurs, the internal state
+ * machine may go to an undefined state and the USB link may be stuck
+ * upon the next resume.
+ *
+ * Workaround:
+ * Don't use smart standby; use only force standby,
+ * hence HWMOD_SWSUP_MSTANDBY
+ */
+
+ /*
+ * During system boot; If the hwmod framework resets the module
+ * the module will have smart idle settings; which can lead to deadlock
+ * (above Errata Id:i660); so, dont reset the module during boot;
+ * Use HWMOD_INIT_NO_RESET.
+ */
+
+ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
+ HWMOD_INIT_NO_RESET,
+ .main_clk = "l3init_60m_fclk",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = OMAP54XX_CM_L3INIT_USB_HOST_HS_CLKCTRL_OFFSET,
+ .context_offs = OMAP54XX_RM_L3INIT_USB_HOST_HS_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/*
+ * 'usb_tll_hs' class
+ * usb_tll_hs module is the adapter on the usb_host_hs ports
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_usb_tll_hs_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap54xx_usb_tll_hs_hwmod_class = {
+ .name = "usb_tll_hs",
+ .sysc = &omap54xx_usb_tll_hs_sysc,
+};
+
+static struct omap_hwmod omap54xx_usb_tll_hs_hwmod = {
+ .name = "usb_tll_hs",
+ .class = &omap54xx_usb_tll_hs_hwmod_class,
+ .clkdm_name = "l3init_clkdm",
+ .main_clk = "l4_root_clk_div",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = OMAP54XX_CM_L3INIT_USB_TLL_HS_CLKCTRL_OFFSET,
+ .context_offs = OMAP54XX_RM_L3INIT_USB_TLL_HS_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+};
+
+/*
* 'usb_otg_ss' class
* 2.0 super speed (usb_otg_ss) controller
*/
@@ -2140,6 +2257,22 @@ static struct omap_hwmod_ocp_if omap54xx_l4_per__uart6 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_cfg -> usb_host_hs */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_host_hs = {
+ .master = &omap54xx_l4_cfg_hwmod,
+ .slave = &omap54xx_usb_host_hs_hwmod,
+ .clk = "l3_iclk_div",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_cfg -> usb_tll_hs */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_tll_hs = {
+ .master = &omap54xx_l4_cfg_hwmod,
+ .slave = &omap54xx_usb_tll_hs_hwmod,
+ .clk = "l4_root_clk_div",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l4_cfg -> usb_otg_ss */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_otg_ss = {
.master = &omap54xx_l4_cfg_hwmod,
@@ -2225,6 +2358,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l4_per__uart4,
&omap54xx_l4_per__uart5,
&omap54xx_l4_per__uart6,
+ &omap54xx_l4_cfg__usb_host_hs,
+ &omap54xx_l4_cfg__usb_tll_hs,
&omap54xx_l4_cfg__usb_otg_ss,
&omap54xx_l4_wkup__wd_timer2,
NULL,
--
1.7.4.1
The USB PHY gets its clock from AUXCLK3. Provide this
information.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 8 ++------
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 3e6801c..f90a1d4 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -83,12 +83,8 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
vcc-supply = <&hsusb1_power>;
- /**
- * FIXME:
- * put the right clock phandle here when available
- * clocks = <&auxclk3>;
- * clock-names = "main_clk";
- */
+ clocks = <&auxclk3_ck>;
+ clock-names = "main_clk";
clock-frequency = <19200000>;
};
--
1.7.4.1
This should fix the following warning at boot on OMAP5 uEVM
[ 8.783155] WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:883 __clk_enable+0x94/0xa4()
CC: Samuel Ortiz <[email protected]>
CC: Lee Jones <[email protected]>
CC: Tero Kristo <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
---
drivers/mfd/omap-usb-host.c | 16 ++++++++--------
drivers/mfd/omap-usb-tll.c | 4 ++--
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 29ee54d..a5b91f1 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -328,13 +328,13 @@ static int usbhs_runtime_resume(struct device *dev)
omap_tll_enable(pdata);
if (!IS_ERR(omap->ehci_logic_fck))
- clk_enable(omap->ehci_logic_fck);
+ clk_prepare_enable(omap->ehci_logic_fck);
for (i = 0; i < omap->nports; i++) {
switch (pdata->port_mode[i]) {
case OMAP_EHCI_PORT_MODE_HSIC:
if (!IS_ERR(omap->hsic60m_clk[i])) {
- r = clk_enable(omap->hsic60m_clk[i]);
+ r = clk_prepare_enable(omap->hsic60m_clk[i]);
if (r) {
dev_err(dev,
"Can't enable port %d hsic60m clk:%d\n",
@@ -343,7 +343,7 @@ static int usbhs_runtime_resume(struct device *dev)
}
if (!IS_ERR(omap->hsic480m_clk[i])) {
- r = clk_enable(omap->hsic480m_clk[i]);
+ r = clk_prepare_enable(omap->hsic480m_clk[i]);
if (r) {
dev_err(dev,
"Can't enable port %d hsic480m clk:%d\n",
@@ -354,7 +354,7 @@ static int usbhs_runtime_resume(struct device *dev)
case OMAP_EHCI_PORT_MODE_TLL:
if (!IS_ERR(omap->utmi_clk[i])) {
- r = clk_enable(omap->utmi_clk[i]);
+ r = clk_prepare_enable(omap->utmi_clk[i]);
if (r) {
dev_err(dev,
"Can't enable port %d clk : %d\n",
@@ -382,15 +382,15 @@ static int usbhs_runtime_suspend(struct device *dev)
switch (pdata->port_mode[i]) {
case OMAP_EHCI_PORT_MODE_HSIC:
if (!IS_ERR(omap->hsic60m_clk[i]))
- clk_disable(omap->hsic60m_clk[i]);
+ clk_disable_unprepare(omap->hsic60m_clk[i]);
if (!IS_ERR(omap->hsic480m_clk[i]))
- clk_disable(omap->hsic480m_clk[i]);
+ clk_disable_unprepare(omap->hsic480m_clk[i]);
/* Fall through as utmi_clks were used in HSIC mode */
case OMAP_EHCI_PORT_MODE_TLL:
if (!IS_ERR(omap->utmi_clk[i]))
- clk_disable(omap->utmi_clk[i]);
+ clk_disable_unprepare(omap->utmi_clk[i]);
break;
default:
break;
@@ -398,7 +398,7 @@ static int usbhs_runtime_suspend(struct device *dev)
}
if (!IS_ERR(omap->ehci_logic_fck))
- clk_disable(omap->ehci_logic_fck);
+ clk_disable_unprepare(omap->ehci_logic_fck);
omap_tll_disable(pdata);
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index e59ac4c..1e57712 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -429,7 +429,7 @@ int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
if (IS_ERR(tll->ch_clk[i]))
continue;
- r = clk_enable(tll->ch_clk[i]);
+ r = clk_prepare_enable(tll->ch_clk[i]);
if (r) {
dev_err(tll_dev,
"Error enabling ch %d clock: %d\n", i, r);
@@ -460,7 +460,7 @@ int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
for (i = 0; i < tll->nch; i++) {
if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
if (!IS_ERR(tll->ch_clk[i]))
- clk_disable(tll->ch_clk[i]);
+ clk_disable_unprepare(tll->ch_clk[i]);
}
}
--
1.7.4.1
This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
The proper clock reference is provided in device tree so we
no longer need this.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/mach-omap2/board-generic.c | 23 +----------------------
1 files changed, 1 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index cd85b36..da4e9b2 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,7 +15,6 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/irqdomain.h>
-#include <linux/clk.h>
#include <asm/mach/arch.h>
@@ -36,21 +35,6 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
{ }
};
-/*
- * Create alias for USB host PHY clock.
- * Remove this when clock phandle can be provided via DT
- */
-static void __init legacy_init_ehci_clk(char *clkname)
-{
- int ret;
-
- ret = clk_add_alias("main_clk", NULL, clkname, NULL);
- if (ret) {
- pr_err("%s:Failed to add main_clk alias to %s :%d\n",
- __func__, clkname, ret);
- }
-}
-
static void __init omap_generic_init(void)
{
omap_sdrc_init(NULL, NULL);
@@ -61,15 +45,10 @@ static void __init omap_generic_init(void)
* HACK: call display setup code for selected boards to enable omapdss.
* This will be removed when omapdss supports DT.
*/
- if (of_machine_is_compatible("ti,omap4-panda")) {
+ if (of_machine_is_compatible("ti,omap4-panda"))
omap4_panda_display_init_of();
- legacy_init_ehci_clk("auxclk3_ck");
-
- }
else if (of_machine_is_compatible("ti,omap4-sdp"))
omap_4430sdp_display_init_of();
- else if (of_machine_is_compatible("ti,omap5-uevm"))
- legacy_init_ehci_clk("auxclk1_ck");
}
#ifdef CONFIG_SOC_OMAP2420
--
1.7.4.1
The HS USB 2 PHY gets its clock from AUXCLK1. Provide this
information.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/boot/dts/omap5-uevm.dts | 8 ++------
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 748f6bf..6a0d73c 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -31,12 +31,8 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
- /**
- * FIXME
- * Put the right clock phandle here when available
- * clocks = <&auxclk1>;
- * clock-names = "main_clk";
- */
+ clocks = <&auxclk1_ck>;
+ clock-names = "main_clk";
clock-frequency = <19200000>;
};
--
1.7.4.1
USB Host driver (drivers/mfd/omap-usb-host.c) expects the 60MHz
reference clock to be named "init_60m_fclk". Provide this
information.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/boot/dts/omap5.dtsi | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index edc801f..6f98be2 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -703,6 +703,8 @@
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ clocks = <&l3init_60m_fclk>;
+ clock-names = "init_60m_fclk";
usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3", "usb-ohci";
--
1.7.4.1
On Tue, 8 Oct 2013, Roger Quadros wrote:
> Add hwmod data for High Speed USB host and TLL modules
>
> CC: Paul Walmsley <[email protected]>
> Signed-off-by: Roger Quadros <[email protected]>
Thanks, queued.
- Paul
Hi Tony,
On 10/08/2013 01:06 PM, Roger Quadros wrote:
> This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
>
> The proper clock reference is provided in device tree so we
> no longer need this.
Could you please Ack this one? I think it is best if it goes through Benoit's tree.
cheers,
-roger
>
> Signed-off-by: Roger Quadros <[email protected]>
> ---
> arch/arm/mach-omap2/board-generic.c | 23 +----------------------
> 1 files changed, 1 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
> index cd85b36..da4e9b2 100644
> --- a/arch/arm/mach-omap2/board-generic.c
> +++ b/arch/arm/mach-omap2/board-generic.c
> @@ -15,7 +15,6 @@
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> #include <linux/irqdomain.h>
> -#include <linux/clk.h>
>
> #include <asm/mach/arch.h>
>
> @@ -36,21 +35,6 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
> { }
> };
>
> -/*
> - * Create alias for USB host PHY clock.
> - * Remove this when clock phandle can be provided via DT
> - */
> -static void __init legacy_init_ehci_clk(char *clkname)
> -{
> - int ret;
> -
> - ret = clk_add_alias("main_clk", NULL, clkname, NULL);
> - if (ret) {
> - pr_err("%s:Failed to add main_clk alias to %s :%d\n",
> - __func__, clkname, ret);
> - }
> -}
> -
> static void __init omap_generic_init(void)
> {
> omap_sdrc_init(NULL, NULL);
> @@ -61,15 +45,10 @@ static void __init omap_generic_init(void)
> * HACK: call display setup code for selected boards to enable omapdss.
> * This will be removed when omapdss supports DT.
> */
> - if (of_machine_is_compatible("ti,omap4-panda")) {
> + if (of_machine_is_compatible("ti,omap4-panda"))
> omap4_panda_display_init_of();
> - legacy_init_ehci_clk("auxclk3_ck");
> -
> - }
> else if (of_machine_is_compatible("ti,omap4-sdp"))
> omap_4430sdp_display_init_of();
> - else if (of_machine_is_compatible("ti,omap5-uevm"))
> - legacy_init_ehci_clk("auxclk1_ck");
> }
>
> #ifdef CONFIG_SOC_OMAP2420
>
* Roger Quadros <[email protected]> [131009 00:19]:
> Hi Tony,
>
> On 10/08/2013 01:06 PM, Roger Quadros wrote:
> > This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
> >
> > The proper clock reference is provided in device tree so we
> > no longer need this.
>
> Could you please Ack this one? I think it is best if it goes through Benoit's tree.
I could queue this into my board removal series that will be
based on Benoit's branch if that works for you. And this
also seems to depend on the omap-for-v3.13/quirk branch
that moves all the legacy pdata handling into pdata-quirks.c.
The reason for this is that we want to keep the .dts changes
completely separate from the code changes to avoid dependencies
that cause pointless merge conflicts. And the .dts files will
be moved to live in a separate repo soonish, so it's good
to be prepared for that.
Regards,
Tony
On 10/09/2013 06:15 PM, Tony Lindgren wrote:
> * Roger Quadros <[email protected]> [131009 00:19]:
>> Hi Tony,
>>
>> On 10/08/2013 01:06 PM, Roger Quadros wrote:
>>> This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
>>>
>>> The proper clock reference is provided in device tree so we
>>> no longer need this.
>>
>> Could you please Ack this one? I think it is best if it goes through Benoit's tree.
>
> I could queue this into my board removal series that will be
> based on Benoit's branch if that works for you. And this
> also seems to depend on the omap-for-v3.13/quirk branch
> that moves all the legacy pdata handling into pdata-quirks.c.
OK Tony. Thanks.
cheers,
-roger
Hi Samuel,
Could you please pick this one for 3.13 if OK? Thanks.
cheers,
-roger
On 10/08/2013 01:06 PM, Roger Quadros wrote:
> This should fix the following warning at boot on OMAP5 uEVM
> [ 8.783155] WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:883 __clk_enable+0x94/0xa4()
>
> CC: Samuel Ortiz <[email protected]>
> CC: Lee Jones <[email protected]>
> CC: Tero Kristo <[email protected]>
> Signed-off-by: Roger Quadros <[email protected]>
> ---
> drivers/mfd/omap-usb-host.c | 16 ++++++++--------
> drivers/mfd/omap-usb-tll.c | 4 ++--
> 2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
> index 29ee54d..a5b91f1 100644
> --- a/drivers/mfd/omap-usb-host.c
> +++ b/drivers/mfd/omap-usb-host.c
> @@ -328,13 +328,13 @@ static int usbhs_runtime_resume(struct device *dev)
> omap_tll_enable(pdata);
>
> if (!IS_ERR(omap->ehci_logic_fck))
> - clk_enable(omap->ehci_logic_fck);
> + clk_prepare_enable(omap->ehci_logic_fck);
>
> for (i = 0; i < omap->nports; i++) {
> switch (pdata->port_mode[i]) {
> case OMAP_EHCI_PORT_MODE_HSIC:
> if (!IS_ERR(omap->hsic60m_clk[i])) {
> - r = clk_enable(omap->hsic60m_clk[i]);
> + r = clk_prepare_enable(omap->hsic60m_clk[i]);
> if (r) {
> dev_err(dev,
> "Can't enable port %d hsic60m clk:%d\n",
> @@ -343,7 +343,7 @@ static int usbhs_runtime_resume(struct device *dev)
> }
>
> if (!IS_ERR(omap->hsic480m_clk[i])) {
> - r = clk_enable(omap->hsic480m_clk[i]);
> + r = clk_prepare_enable(omap->hsic480m_clk[i]);
> if (r) {
> dev_err(dev,
> "Can't enable port %d hsic480m clk:%d\n",
> @@ -354,7 +354,7 @@ static int usbhs_runtime_resume(struct device *dev)
>
> case OMAP_EHCI_PORT_MODE_TLL:
> if (!IS_ERR(omap->utmi_clk[i])) {
> - r = clk_enable(omap->utmi_clk[i]);
> + r = clk_prepare_enable(omap->utmi_clk[i]);
> if (r) {
> dev_err(dev,
> "Can't enable port %d clk : %d\n",
> @@ -382,15 +382,15 @@ static int usbhs_runtime_suspend(struct device *dev)
> switch (pdata->port_mode[i]) {
> case OMAP_EHCI_PORT_MODE_HSIC:
> if (!IS_ERR(omap->hsic60m_clk[i]))
> - clk_disable(omap->hsic60m_clk[i]);
> + clk_disable_unprepare(omap->hsic60m_clk[i]);
>
> if (!IS_ERR(omap->hsic480m_clk[i]))
> - clk_disable(omap->hsic480m_clk[i]);
> + clk_disable_unprepare(omap->hsic480m_clk[i]);
> /* Fall through as utmi_clks were used in HSIC mode */
>
> case OMAP_EHCI_PORT_MODE_TLL:
> if (!IS_ERR(omap->utmi_clk[i]))
> - clk_disable(omap->utmi_clk[i]);
> + clk_disable_unprepare(omap->utmi_clk[i]);
> break;
> default:
> break;
> @@ -398,7 +398,7 @@ static int usbhs_runtime_suspend(struct device *dev)
> }
>
> if (!IS_ERR(omap->ehci_logic_fck))
> - clk_disable(omap->ehci_logic_fck);
> + clk_disable_unprepare(omap->ehci_logic_fck);
>
> omap_tll_disable(pdata);
>
> diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
> index e59ac4c..1e57712 100644
> --- a/drivers/mfd/omap-usb-tll.c
> +++ b/drivers/mfd/omap-usb-tll.c
> @@ -429,7 +429,7 @@ int omap_tll_enable(struct usbhs_omap_platform_data *pdata)
> if (IS_ERR(tll->ch_clk[i]))
> continue;
>
> - r = clk_enable(tll->ch_clk[i]);
> + r = clk_prepare_enable(tll->ch_clk[i]);
> if (r) {
> dev_err(tll_dev,
> "Error enabling ch %d clock: %d\n", i, r);
> @@ -460,7 +460,7 @@ int omap_tll_disable(struct usbhs_omap_platform_data *pdata)
> for (i = 0; i < tll->nch; i++) {
> if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
> if (!IS_ERR(tll->ch_clk[i]))
> - clk_disable(tll->ch_clk[i]);
> + clk_disable_unprepare(tll->ch_clk[i]);
> }
> }
>
>
* Roger Quadros <[email protected]> [131010 02:23]:
> On 10/09/2013 06:15 PM, Tony Lindgren wrote:
> > * Roger Quadros <[email protected]> [131009 00:19]:
> >> Hi Tony,
> >>
> >> On 10/08/2013 01:06 PM, Roger Quadros wrote:
> >>> This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
> >>>
> >>> The proper clock reference is provided in device tree so we
> >>> no longer need this.
> >>
> >> Could you please Ack this one? I think it is best if it goes through Benoit's tree.
> >
> > I could queue this into my board removal series that will be
> > based on Benoit's branch if that works for you. And this
> > also seems to depend on the omap-for-v3.13/quirk branch
> > that moves all the legacy pdata handling into pdata-quirks.c.
>
> OK Tony. Thanks.
Actually, can you please update this patch against branch
omap-for-v3.13/board-removal-take2 and check the
omap5_uevm_legacy_init() part as well?
Tony
On 10/22/2013 06:17 PM, Tony Lindgren wrote:
> * Roger Quadros <[email protected]> [131010 02:23]:
>> On 10/09/2013 06:15 PM, Tony Lindgren wrote:
>>> * Roger Quadros <[email protected]> [131009 00:19]:
>>>> Hi Tony,
>>>>
>>>> On 10/08/2013 01:06 PM, Roger Quadros wrote:
>>>>> This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
>>>>>
>>>>> The proper clock reference is provided in device tree so we
>>>>> no longer need this.
>>>>
>>>> Could you please Ack this one? I think it is best if it goes through Benoit's tree.
>>>
>>> I could queue this into my board removal series that will be
>>> based on Benoit's branch if that works for you. And this
>>> also seems to depend on the omap-for-v3.13/quirk branch
>>> that moves all the legacy pdata handling into pdata-quirks.c.
>>
>> OK Tony. Thanks.
>
> Actually, can you please update this patch against branch
> omap-for-v3.13/board-removal-take2 and check the
> omap5_uevm_legacy_init() part as well?
Updated patch is below. Note that this must go in only after Benoit has picked
up Tero's clock series and the dts patches in this series.
If needed, you can wait and I can send you a reminder when that happens. Thanks.
>From ab81199d5b9c487c8493e6aa1d8b4bf17c0c5110 Mon Sep 17 00:00:00 2001
From: Roger Quadros <[email protected]>
Date: Wed, 23 Oct 2013 12:58:59 +0300
Subject: [PATCH] ARM: OMAP2+: Get rid of legacy_init_ehci_clk()
The proper clock reference is provided in device tree so we
no longer need this.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/mach-omap2/pdata-quirks.c | 25 -------------------------
1 file changed, 25 deletions(-)
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 10c7145..22537ed 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -26,20 +26,6 @@ struct pdata_init {
void (*fn)(void);
};
-/*
- * Create alias for USB host PHY clock.
- * Remove this when clock phandle can be provided via DT
- */
-static void __init __used legacy_init_ehci_clk(char *clkname)
-{
- int ret;
-
- ret = clk_add_alias("main_clk", NULL, clkname, NULL);
- if (ret)
- pr_err("%s:Failed to add main_clk alias to %s :%d\n",
- __func__, clkname, ret);
-}
-
#if IS_ENABLED(CONFIG_WL12XX)
static struct wl12xx_platform_data wl12xx __initdata;
@@ -105,18 +91,10 @@ static void __init omap4_sdp_legacy_init(void)
static void __init omap4_panda_legacy_init(void)
{
omap4_panda_display_init_of();
- legacy_init_ehci_clk("auxclk3_ck");
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
}
#endif
-#ifdef CONFIG_SOC_OMAP5
-static void __init omap5_uevm_legacy_init(void)
-{
- legacy_init_ehci_clk("auxclk1_ck");
-}
-#endif
-
static struct pcs_pdata pcs_pdata;
void omap_pcs_legacy_init(int irq, void (*rearm)(void))
@@ -149,9 +127,6 @@ static struct pdata_init pdata_quirks[] __initdata = {
{ "ti,omap4-sdp", omap4_sdp_legacy_init, },
{ "ti,omap4-panda", omap4_panda_legacy_init, },
#endif
-#ifdef CONFIG_SOC_OMAP5
- { "ti,omap5-uevm", omap5_uevm_legacy_init, },
-#endif
{ /* sentinel */ },
};
--
1.8.3.2