2013-10-30 16:27:32

by Aristeu Rozanski

Subject: [PATCH 02/12] sb_edac: make RANK_CFG_A value part of sbridge_info

This is in preparation of Ivy Bridge support.

Signed-off-by: Aristeu Rozanski <[email protected]>
---
drivers/edac/sb_edac.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index 4cdd948..466c313 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -245,7 +245,7 @@ static const u32 correrrthrsld[] = {

/* Device 17, function 0 */

-#define RANK_CFG_A 0x0328
+#define SB_RANK_CFG_A 0x0328

#define IS_RDIMM_ENABLED(reg) GET_BITFIELD(reg, 11, 11)

@@ -258,6 +258,7 @@ static const u32 correrrthrsld[] = {

struct sbridge_info {
u32 mcmtr;
+ u32 rankcfgr;
};

struct sbridge_channel {
@@ -503,6 +504,8 @@ static int get_dimm_config(struct mem_ctl_info *mci)
enum edac_type mode;
enum mem_type mtype;

+ pvt->info.rankcfgr = SB_RANK_CFG_A;
+
pci_read_config_dword(pvt->pci_br, SAD_TARGET, &reg);
pvt->sbridge_dev->source_id = SOURCE_ID(reg);

@@ -541,7 +544,8 @@ static int get_dimm_config(struct mem_ctl_info *mci)
}

if (pvt->pci_ddrio) {
- pci_read_config_dword(pvt->pci_ddrio, RANK_CFG_A, &reg);
+ pci_read_config_dword(pvt->pci_ddrio, pvt->info.rankcfgr,
+ &reg);
if (IS_RDIMM_ENABLED(reg)) {
/* FIXME: Can also be LRDIMM */
edac_dbg(0, "Memory is registered\n");
--
1.7.1