S5M8767 chip has 3 crystal oscillators which are operated in the same
as the crystal oscillators in S2MPS11. Extend s2mps11-clk driver to
support clocks in S5M8767.
The patches are based on next-20131030.
Tushar Behera (4):
clk: clk-s2mps11: Refactor for including support for other MFD clocks
clk: clk-s2mps11: Add support for clocks in S5M8767 MFD
mfd: sec-core: Add cells for S5M8767-clocks
ARM: dts: Add S5M8767 clock nodes on Arndale board
arch/arm/boot/dts/exynos5250-arndale.dts | 7 +++++++
drivers/clk/Kconfig | 6 ++++--
drivers/clk/clk-s2mps11.c | 25 +++++++++++++++++++++----
drivers/mfd/sec-core.c | 4 +++-
4 files changed, 35 insertions(+), 7 deletions(-)
--
1.7.9.5
The clocks in S2MPS11 and S5M8767 are managed in the same way, baring
a difference in the register offset. It would be better to update
existing S2MPS11 driver to support the clocks in S5M8767, rather than
creating an almost duplicate driver altogether.
Signed-off-by: Tushar Behera <[email protected]>
CC: Yadwinder Singh Brar <[email protected]>
CC: Mike Turquette <[email protected]>
---
drivers/clk/clk-s2mps11.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index 7be41e6..2262cb4 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -48,6 +48,7 @@ struct s2mps11_clk {
struct clk_lookup *lookup;
u32 mask;
bool enabled;
+ unsigned int reg;
};
static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
@@ -61,7 +62,7 @@ static int s2mps11_clk_prepare(struct clk_hw *hw)
int ret;
ret = regmap_update_bits(s2mps11->iodev->regmap,
- S2MPS11_REG_RTC_CTRL,
+ s2mps11->reg,
s2mps11->mask, s2mps11->mask);
if (!ret)
s2mps11->enabled = true;
@@ -74,7 +75,7 @@ static void s2mps11_clk_unprepare(struct clk_hw *hw)
struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
int ret;
- ret = regmap_update_bits(s2mps11->iodev->regmap, S2MPS11_REG_RTC_CTRL,
+ ret = regmap_update_bits(s2mps11->iodev->regmap, s2mps11->reg,
s2mps11->mask, ~s2mps11->mask);
if (!ret)
@@ -155,6 +156,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
struct device_node *clk_np = NULL;
+ unsigned int s2mps11_reg;
int i, ret = 0;
u32 val;
@@ -169,13 +171,23 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
if (IS_ERR(clk_np))
return PTR_ERR(clk_np);
+ switch(platform_get_device_id(pdev)->driver_data) {
+ case S2MPS11X:
+ s2mps11_reg = S2MPS11_REG_RTC_CTRL;
+ break;
+ default:
+ dev_err(&pdev->dev, "Invalid device type\n");
+ return -EINVAL;
+ };
+
for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
s2mps11_clk->iodev = iodev;
s2mps11_clk->hw.init = &s2mps11_clks_init[i];
s2mps11_clk->mask = 1 << i;
+ s2mps11_clk->reg = s2mps11_reg;
ret = regmap_read(s2mps11_clk->iodev->regmap,
- S2MPS11_REG_RTC_CTRL, &val);
+ s2mps11_clk->reg, &val);
if (ret < 0)
goto err_reg;
@@ -241,7 +253,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
}
static const struct platform_device_id s2mps11_clk_id[] = {
- { "s2mps11-clk", 0},
+ { "s2mps11-clk", S2MPS11X},
{ },
};
MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
--
1.7.9.5
S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
supported by s2mps11-clk driver.
Signed-off-by: Tushar Behera <[email protected]>
CC: Lee Jones <[email protected]>
---
drivers/mfd/sec-core.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index 34c18fb..020b86b 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
.name = "s5m8767-pmic",
}, {
.name = "s5m-rtc",
- },
+ }, {
+ .name = "s5m8767-clk",
+ }
};
static struct mfd_cell s2mps11_devs[] = {
--
1.7.9.5
Signed-off-by: Tushar Behera <[email protected]>
CC: Kukjin Kim <[email protected]>
---
arch/arm/boot/dts/exynos5250-arndale.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index b77a37e..34b305d 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -70,6 +70,13 @@
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 0>,
<&gpx2 4 0>,
<&gpx2 5 0>;
+
+ s5m8767_osc: clocks {
+ #clock-cells = <1>;
+ clock-output-names = "s5m8767_ap",
+ "s5m8767_cp", "s5m8767_bt";
+ };
+
regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ALIVE_1.0V";
--
1.7.9.5
Since clock operation within S2MPS11 and S5M8767 are similar, we can
support both the devices within a single driver.
Signed-off-by: Tushar Behera <[email protected]>
CC: Yadwinder Singh Brar <[email protected]>
CC: Mike Turquette <[email protected]>
---
drivers/clk/Kconfig | 6 ++++--
drivers/clk/clk-s2mps11.c | 5 +++++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 5c51115..7f2aef2 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -65,10 +65,12 @@ config COMMON_CLK_SI5351
generators.
config COMMON_CLK_S2MPS11
- tristate "Clock driver for S2MPS11 MFD"
+ tristate "Clock driver for S2MPS11/S5M8767 MFD"
depends on MFD_SEC_CORE
---help---
- This driver supports S2MPS11 crystal oscillator clock.
+ This driver supports S2MPS11/S5M8767 crystal oscillator clock. These
+ multi-function devices have 3 fixed-rate oscillators, clocked at
+ 32KHz each.
config CLK_TWL6040
tristate "External McPDM functional clock from twl6040"
diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c
index 2262cb4..19c075c 100644
--- a/drivers/clk/clk-s2mps11.c
+++ b/drivers/clk/clk-s2mps11.c
@@ -27,6 +27,7 @@
#include <linux/clk-provider.h>
#include <linux/platform_device.h>
#include <linux/mfd/samsung/s2mps11.h>
+#include <linux/mfd/samsung/s5m8767.h>
#include <linux/mfd/samsung/core.h>
#define s2mps11_name(a) (a->hw.init->name)
@@ -175,6 +176,9 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
case S2MPS11X:
s2mps11_reg = S2MPS11_REG_RTC_CTRL;
break;
+ case S5M8767X:
+ s2mps11_reg = S5M8767_REG_CTRL1;
+ break;
default:
dev_err(&pdev->dev, "Invalid device type\n");
return -EINVAL;
@@ -254,6 +258,7 @@ static int s2mps11_clk_remove(struct platform_device *pdev)
static const struct platform_device_id s2mps11_clk_id[] = {
{ "s2mps11-clk", S2MPS11X},
+ { "s5m8767-clk", S5M8767X},
{ },
};
MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
--
1.7.9.5
On Thu, 31 Oct 2013, Tushar Behera wrote:
> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are
> supported by s2mps11-clk driver.
>
> Signed-off-by: Tushar Behera <[email protected]>
> CC: Lee Jones <[email protected]>
> ---
> drivers/mfd/sec-core.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
> index 34c18fb..020b86b 100644
> --- a/drivers/mfd/sec-core.c
> +++ b/drivers/mfd/sec-core.c
> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = {
> .name = "s5m8767-pmic",
> }, {
> .name = "s5m-rtc",
> - },
> + }, {
> + .name = "s5m8767-clk",
> + }
> };
>
> static struct mfd_cell s2mps11_devs[] = {
Acked-by: Lee Jones <[email protected]>
I'd prefer to take this patch in via the MFD tree once you have
support from the other maintainers for the set.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
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