2014-01-17 09:23:05

by Lad, Prabhakar

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Subject: [PATCH] media: i2c: mt9v032: Check return value of clk_prepare_enable/clk_set_rate

From: "Lad, Prabhakar" <[email protected]>

clk_set_rate(), clk_prepare_enable() functions can fail, so check the return
values to avoid surprises.

Signed-off-by: Lad, Prabhakar <[email protected]>
---
drivers/media/i2c/mt9v032.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/media/i2c/mt9v032.c b/drivers/media/i2c/mt9v032.c
index 36c504b..40172b8 100644
--- a/drivers/media/i2c/mt9v032.c
+++ b/drivers/media/i2c/mt9v032.c
@@ -317,8 +317,14 @@ static int mt9v032_power_on(struct mt9v032 *mt9v032)
struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
int ret;

- clk_set_rate(mt9v032->clk, mt9v032->sysclk);
- clk_prepare_enable(mt9v032->clk);
+ ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_prepare_enable(mt9v032->clk);
+ if (ret)
+ return ret;
+
udelay(1);

/* Reset the chip and stop data read out */
--
1.7.9.5


2014-01-19 20:04:55

by Laurent Pinchart

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Subject: Re: [PATCH] media: i2c: mt9v032: Check return value of clk_prepare_enable/clk_set_rate

Hi Prabhakar,

Thank you for the patch.

On Friday 17 January 2014 14:52:47 Prabhakar Lad wrote:
> From: "Lad, Prabhakar" <[email protected]>
>
> clk_set_rate(), clk_prepare_enable() functions can fail, so check the return
> values to avoid surprises.
>
> Signed-off-by: Lad, Prabhakar <[email protected]>

Acked-by: Laurent Pinchart <[email protected]>

I've applied the patch to my tree and will send a pull request.

> ---
> drivers/media/i2c/mt9v032.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/i2c/mt9v032.c b/drivers/media/i2c/mt9v032.c
> index 36c504b..40172b8 100644
> --- a/drivers/media/i2c/mt9v032.c
> +++ b/drivers/media/i2c/mt9v032.c
> @@ -317,8 +317,14 @@ static int mt9v032_power_on(struct mt9v032 *mt9v032)
> struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
> int ret;
>
> - clk_set_rate(mt9v032->clk, mt9v032->sysclk);
> - clk_prepare_enable(mt9v032->clk);
> + ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
> + if (ret < 0)
> + return ret;
> +
> + ret = clk_prepare_enable(mt9v032->clk);
> + if (ret)
> + return ret;
> +
> udelay(1);
>
> /* Reset the chip and stop data read out */
--
Regards,

Laurent Pinchart