This patch adds imprecise abort enable/disable macros.
It also enables imprecise aborts when starting kernel.
Changes in v2:
Only ARMv6 and later have CPSR.A bit. On earlier CPUs,
and ARMv7M this should be a no-op.
Signed-off-by: Fabrice Gasnier <[email protected]>
---
arch/arm/include/asm/irqflags.h | 10 ++++++++++
arch/arm/kernel/smp.c | 1 +
arch/arm/kernel/traps.c | 4 ++++
3 files changed, 15 insertions(+)
diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
index 3b763d6..8301f87 100644
--- a/arch/arm/include/asm/irqflags.h
+++ b/arch/arm/include/asm/irqflags.h
@@ -51,6 +51,14 @@ static inline void arch_local_irq_disable(void)
#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
+
+#ifndef CONFIG_CPU_V7M
+#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
+#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
+#else
+#define local_abt_enable() do { } while (0)
+#define local_abt_disable() do { } while (0)
+#endif
#else
/*
@@ -130,6 +138,8 @@ static inline void arch_local_irq_disable(void)
: "memory", "cc"); \
})
+#define local_abt_enable() do { } while (0)
+#define local_abt_disable() do { } while (0)
#endif
/*
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index dc894ab..c2093cb 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -377,6 +377,7 @@ asmlinkage void secondary_start_kernel(void)
local_irq_enable();
local_fiq_enable();
+ local_abt_enable();
/*
* OK, it's off to the idle thread for us
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 4636d56..ef15709 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -900,6 +900,10 @@ void __init early_trap_init(void *vectors_base)
flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
+
+ /* Enable imprecise aborts */
+ local_abt_enable();
+
#else /* ifndef CONFIG_CPU_V7M */
/*
* on V7-M there is no need to copy the vector table to a dedicated
--
1.7.9.5
Hi,
Any comments on this patch ?
Russel, can I add this patch to your patch tracker system ?
Thanks,
Fabrice
On 02/10/2014 05:45 PM, Fabrice GASNIER wrote:
> This patch adds imprecise abort enable/disable macros.
> It also enables imprecise aborts when starting kernel.
>
> Changes in v2:
> Only ARMv6 and later have CPSR.A bit. On earlier CPUs,
> and ARMv7M this should be a no-op.
>
> Signed-off-by: Fabrice Gasnier <[email protected]>
> ---
> arch/arm/include/asm/irqflags.h | 10 ++++++++++
> arch/arm/kernel/smp.c | 1 +
> arch/arm/kernel/traps.c | 4 ++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
> index 3b763d6..8301f87 100644
> --- a/arch/arm/include/asm/irqflags.h
> +++ b/arch/arm/include/asm/irqflags.h
> @@ -51,6 +51,14 @@ static inline void arch_local_irq_disable(void)
>
> #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
> #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
> +
> +#ifndef CONFIG_CPU_V7M
> +#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
> +#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
> +#else
> +#define local_abt_enable() do { } while (0)
> +#define local_abt_disable() do { } while (0)
> +#endif
> #else
>
> /*
> @@ -130,6 +138,8 @@ static inline void arch_local_irq_disable(void)
> : "memory", "cc"); \
> })
>
> +#define local_abt_enable() do { } while (0)
> +#define local_abt_disable() do { } while (0)
> #endif
>
> /*
> diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
> index dc894ab..c2093cb 100644
> --- a/arch/arm/kernel/smp.c
> +++ b/arch/arm/kernel/smp.c
> @@ -377,6 +377,7 @@ asmlinkage void secondary_start_kernel(void)
>
> local_irq_enable();
> local_fiq_enable();
> + local_abt_enable();
>
> /*
> * OK, it's off to the idle thread for us
> diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
> index 4636d56..ef15709 100644
> --- a/arch/arm/kernel/traps.c
> +++ b/arch/arm/kernel/traps.c
> @@ -900,6 +900,10 @@ void __init early_trap_init(void *vectors_base)
>
> flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
> modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
> +
> + /* Enable imprecise aborts */
> + local_abt_enable();
> +
> #else /* ifndef CONFIG_CPU_V7M */
> /*
> * on V7-M there is no need to copy the vector table to a dedicated
On Wed, Feb 12, 2014 at 02:05:39PM +0100, Fabrice GASNIER wrote:
> Hi,
>
> Any comments on this patch ?
>
> Russell, can I add this patch to your patch tracker system ?
I don't see how this works on anything but ARMv7M.
--
FTTC broadband for 0.8mile line: 5.8Mbps down 500kbps up. Estimation
in database were 13.1 to 19Mbit for a good line, about 7.5+ for a bad.
Estimate before purchase was "up to 13.2Mbit".
Hi,
Any comments on this patch ?
Russell, can I add this patch to your patch tracker system ?
Thanks,
Fabrice
On 02/10/2014 05:45 PM, Fabrice GASNIER wrote:
> This patch adds imprecise abort enable/disable macros.
> It also enables imprecise aborts when starting kernel.
>
> Changes in v2:
> Only ARMv6 and later have CPSR.A bit. On earlier CPUs,
> and ARMv7M this should be a no-op.
>
> Signed-off-by: Fabrice Gasnier <[email protected]>
> ---
> arch/arm/include/asm/irqflags.h | 10 ++++++++++
> arch/arm/kernel/smp.c | 1 +
> arch/arm/kernel/traps.c | 4 ++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
> index 3b763d6..8301f87 100644
> --- a/arch/arm/include/asm/irqflags.h
> +++ b/arch/arm/include/asm/irqflags.h
> @@ -51,6 +51,14 @@ static inline void arch_local_irq_disable(void)
>
> #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
> #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
> +
> +#ifndef CONFIG_CPU_V7M
> +#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
> +#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
> +#else
> +#define local_abt_enable() do { } while (0)
> +#define local_abt_disable() do { } while (0)
> +#endif
> #else
>
> /*
> @@ -130,6 +138,8 @@ static inline void arch_local_irq_disable(void)
> : "memory", "cc"); \
> })
>
> +#define local_abt_enable() do { } while (0)
> +#define local_abt_disable() do { } while (0)
> #endif
>
> /*
> diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
> index dc894ab..c2093cb 100644
> --- a/arch/arm/kernel/smp.c
> +++ b/arch/arm/kernel/smp.c
> @@ -377,6 +377,7 @@ asmlinkage void secondary_start_kernel(void)
>
> local_irq_enable();
> local_fiq_enable();
> + local_abt_enable();
>
> /*
> * OK, it's off to the idle thread for us
> diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
> index 4636d56..ef15709 100644
> --- a/arch/arm/kernel/traps.c
> +++ b/arch/arm/kernel/traps.c
> @@ -900,6 +900,10 @@ void __init early_trap_init(void *vectors_base)
>
> flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
> modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
> +
> + /* Enable imprecise aborts */
> + local_abt_enable();
> +
> #else /* ifndef CONFIG_CPU_V7M */
> /*
> * on V7-M there is no need to copy the vector table to a dedicated
Hi Russell,
On 02/12/2014 02:18 PM, Russell King - ARM Linux wrote:
> On Wed, Feb 12, 2014 at 02:05:39PM +0100, Fabrice GASNIER wrote:
>> Hi,
>>
>> Any comments on this patch ?
>>
>> Russell, can I add this patch to your patch tracker system ?
> I don't see how this works on anything but ARMv7M.
Sorry, i'm confused.
In the first patch you proposed,
http://archive.arm.linux.org.uk/lurker/message/20140131.170827.d752a1cc.en.html
there was :
#ifndef CONFIG_CPU_V7M
[...]
/* Enable imprecise aborts */
[...]
#else /* ifndef CONFIG_CPU_V7M */
I understand that abort handling (vectors and masking ?) is different on
armv7-m ?
Or should we make no distinction ?
I have kept the same principle regarding abort enable/disable macro.
#if __LINUX_ARM_ARCH__ >= 6
[...]
#ifndef CONFIG_CPU_V7M
#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory",
"cc")
#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory",
"cc")
#else
#define local_abt_enable() do { } while (0)
#define local_abt_disable() do { } while (0)
#endif
#else
[...]
#define local_abt_enable() do { } while (0)
#define local_abt_disable() do { } while (0)
#endif
Sorry if this is silly question ...
BR,
Fabrice
>
On 02/12/2014 02:18 PM, Russell King - ARM Linux wrote:
> On Wed, Feb 12, 2014 at 02:05:39PM +0100, Fabrice GASNIER wrote:
>> Hi,
>>
>> Any comments on this patch ?
>>
>> Russell, can I add this patch to your patch tracker system ?
> I don't see how this works on anything but ARMv7M.
>
Hi Russel,
I'm not sure how I can help to do that part for ARMv7M.
Point is I don't have any ARMv7M hardware at my disposal to develop
and/or test with.
Hopefully someone can help or take care of this part ?
BR,
Fabrice
Russell,
can you please revisit this patch? It got stuck in February after you
questioned if it works on anything but ARMv7M. Fabrice responded with an
E-Mail that showed that the logic in this patch is supposedly right and
it should work.
Do you still see anything wrong with this patch? It is a prerequisite
for proper PCI abort handling on a number of SoCs and I would like to
see this moving forward.
Thanks,
Lucas
Am Montag, den 10.02.2014, 17:45 +0100 schrieb Fabrice GASNIER:
> This patch adds imprecise abort enable/disable macros.
> It also enables imprecise aborts when starting kernel.
>
> Changes in v2:
> Only ARMv6 and later have CPSR.A bit. On earlier CPUs,
> and ARMv7M this should be a no-op.
>
> Signed-off-by: Fabrice Gasnier <[email protected]>
> ---
> arch/arm/include/asm/irqflags.h | 10 ++++++++++
> arch/arm/kernel/smp.c | 1 +
> arch/arm/kernel/traps.c | 4 ++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h
> index 3b763d6..8301f87 100644
> --- a/arch/arm/include/asm/irqflags.h
> +++ b/arch/arm/include/asm/irqflags.h
> @@ -51,6 +51,14 @@ static inline void arch_local_irq_disable(void)
>
> #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
> #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
> +
> +#ifndef CONFIG_CPU_V7M
> +#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
> +#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
> +#else
> +#define local_abt_enable() do { } while (0)
> +#define local_abt_disable() do { } while (0)
> +#endif
> #else
>
> /*
> @@ -130,6 +138,8 @@ static inline void arch_local_irq_disable(void)
> : "memory", "cc"); \
> })
>
> +#define local_abt_enable() do { } while (0)
> +#define local_abt_disable() do { } while (0)
> #endif
>
> /*
> diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
> index dc894ab..c2093cb 100644
> --- a/arch/arm/kernel/smp.c
> +++ b/arch/arm/kernel/smp.c
> @@ -377,6 +377,7 @@ asmlinkage void secondary_start_kernel(void)
>
> local_irq_enable();
> local_fiq_enable();
> + local_abt_enable();
>
> /*
> * OK, it's off to the idle thread for us
> diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
> index 4636d56..ef15709 100644
> --- a/arch/arm/kernel/traps.c
> +++ b/arch/arm/kernel/traps.c
> @@ -900,6 +900,10 @@ void __init early_trap_init(void *vectors_base)
>
> flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
> modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
> +
> + /* Enable imprecise aborts */
> + local_abt_enable();
> +
> #else /* ifndef CONFIG_CPU_V7M */
> /*
> * on V7-M there is no need to copy the vector table to a dedicated
--
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