This series adds DT support for the at91sam9rl SoC, then the at91sam9rl-ek
evaluation board.
While the at91sam9rl dtsi should be almost complete (still missing LCD and
touchscreen bits). The at91sam9rlek DT now support the following tested
features:
- MMC
- dbgu
- usart1
- watchdog
- nand
- leds
- buttons
- common clock framework
Next:
- spi
- dataflash
- i2c
- lcd
- touchscreen
- usb gadget
- audio
Changes since v1:
- rebased on 3.14-rc3
- improved dtsi compatible string
- changed the kernel command line
- reordered the dbgu description in the dtsi
- added interrupts to the watchdog description (new in 3.14)
- added CCF conversion
Alexandre Belloni (7):
ARM: at91: Add at91sam9rl DT SoC support
ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs
ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek
ARM: at91: prepare common clk transition for sam9rl SoCs
ARM: at91/dt: define at91sam9rl clocks
ARM: at91/dt: define main clk frequency of at91sam9rlek
ARM: at91: switch sam9rl to common clock framework
Boris BREZILLON (1):
ARM: at91: prepare sam9 dt boards transition to common clk
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/at91sam9rl.dtsi | 855 +++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/at91sam9rlek.dts | 157 +++++++
arch/arm/configs/at91_dt_defconfig | 1 +
arch/arm/mach-at91/Kconfig | 1 -
arch/arm/mach-at91/at91sam9rl.c | 22 +-
arch/arm/mach-at91/board-dt-sam9.c | 11 +-
7 files changed, 1046 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
create mode 100644 arch/arm/boot/dts/at91sam9rlek.dts
--
1.8.3.2
This adds preliminary DT support for the at91sam9rl.
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/at91sam9rl.c | 16 +
2 files changed, 644 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
new file mode 100644
index 000000000000..9a6208b046b6
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -0,0 +1,628 @@
+/*
+ * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
+ *
+ * Copyright (C) 2014 Alexandre Belloni <[email protected]>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Atmel AT91SAM9RL family SoC";
+ compatible = "atmel,at91sam9rl", "atmel,at91sam9";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ serial4 = &usart3;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ gpio3 = &pioD;
+ tcb0 = &tcb0;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ ssc0 = &ssc0;
+ ssc1 = &ssc1;
+ };
+
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x04000000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ tcb0: timer@fffa0000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffa0000 0x100>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
+ 17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0>;
+ };
+
+ mmc0: mmc@fffa4000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfffa4000 0x600>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ i2c0: i2c@fffa8000 {
+ compatible = "atmel,at91sam9260-i2c";
+ reg = <0xfffa8000 0x100>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@fffac000 {
+ compatible = "atmel,at91sam9260-i2c";
+ reg = <0xfffac000 0x100>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ usart0: serial@fffb0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb0000 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ status = "disabled";
+ };
+
+ usart1: serial@fffb4000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb4000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ status = "disabled";
+ };
+
+ usart2: serial@fffb8000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb8000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ status = "disabled";
+ };
+
+ usart3: serial@fffbc000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffbc000 0x200>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart3>;
+ status = "disabled";
+ };
+
+ ssc0: ssc@fffc0000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc0000 0x4000>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ status = "disabled";
+ };
+
+ ssc1: ssc@fffc4000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc4000 0x4000>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ status = "disabled";
+ };
+
+ spi0: spi@fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ status = "disabled";
+ };
+
+ adc0: adc@fffd0000 {
+ compatible = "atmel,at91sam9260-adc";
+ reg = <0xfffd0000 0x100>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+ atmel,adc-use-external-triggers;
+ atmel,adc-channels-used = <0xf>;
+ atmel,adc-vref = <3300>;
+ atmel,adc-num-channels = <4>;
+ atmel,adc-startup-time = <15>;
+ atmel,adc-channel-base = <0x30>;
+ atmel,adc-drdy-mask = <0x10000>;
+ atmel,adc-status-register = <0x1c>;
+ atmel,adc-trigger-register = <0x04>;
+ atmel,adc-res = <8 10>;
+ atmel,adc-res-names = "lowres", "highres";
+ atmel,adc-use-res = "highres";
+
+ trigger@0 {
+ trigger-name = "timer-counter-0";
+ trigger-value = <0x1>;
+ };
+ trigger@1 {
+ trigger-name = "timer-counter-1";
+ trigger-value = <0x3>;
+ };
+
+ trigger@2 {
+ trigger-name = "timer-counter-2";
+ trigger-value = <0x5>;
+ };
+
+ trigger@3 {
+ trigger-name = "external";
+ trigger-value = <0x13>;
+ trigger-external;
+ };
+ };
+
+ usb0: gadget@fffd4000 {
+ compatible = "atmel,at91rm9200-udc";
+ reg = <0xfffd4000 0x4000>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+ status = "disabled";
+ };
+
+ ramc0: ramc@ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
+ aic: interrupt-controller@fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <31>;
+ };
+
+ dbgu: serial@fffff200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ status = "disabled";
+ };
+
+ pinctrl@fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff400 0xfffff400 0x800>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xffffffff 0xe05c6738 /* pioA */
+ 0xffffffff 0x0000c780 /* pioB */
+ 0xffffffff 0xe3ffff0e /* pioC */
+ 0x003fffff 0x0001ff3c /* pioD */
+ >;
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
+ atmel,pins =
+ <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_dcd: usart0_dcd-0 {
+ atmel,pins =
+ <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_ri: usart0_ri-0 {
+ atmel,pins =
+ <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_sck: usart0_sck-0 {
+ atmel,pins =
+ <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ /*TODO check pullup necessary*/
+ <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_sck: usart1_sck-0 {
+ atmel,pins =
+ <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_sck: usart2_sck-0 {
+ atmel,pins =
+ <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart3 {
+ pinctrl_usart3: usart3-0 {
+ atmel,pins =
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
+ atmel,pins =
+ <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart3_sck: usart3_sck-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
+ AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_nand0_ale_cle: nand_ale_cle-0 {
+ atmel,pins =
+ <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_nand0_oe_we: nand_oe_we-0 {
+ atmel,pins =
+ <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_nand0_cs: nand_cs-0 {
+ atmel,pins =
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+ AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ ssc1 {
+ pinctrl_ssc1_tx: ssc1_tx-0 {
+ atmel,pins =
+ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc1_rx: ssc1_rx-0 {
+ atmel,pins =
+ <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE
+ AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE
+ AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ i2c_gpio0 {
+ pinctrl_i2c_gpio0: i2c_gpio0-0 {
+ atmel,pins =
+ <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
+ AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
+ };
+ };
+
+ i2c_gpio1 {
+ pinctrl_i2c_gpio1: i2c_gpio1-0 {
+ atmel,pins =
+ <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
+ AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ pioA: gpio@fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioB: gpio@fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioC: gpio@fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioD: gpio@fffffa00 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffffa00 0x200>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ pmc: pmc@fffffc00 {
+ compatible = "atmel,at91rm9200-pmc";
+ reg = <0xfffffc00 0x100>;
+ };
+
+ rstc@fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ };
+
+ shdwc@fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ };
+
+ pit: timer@fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ };
+
+ watchdog@fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ status = "disabled";
+ };
+ };
+
+ nand0: nand@40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000
+ 0xffffe800 0x200
+ >;
+ atmel,nand-addr-offset = <21>;
+ atmel,nand-cmd-offset = <22>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+ gpios = <&pioD 17 GPIO_ACTIVE_HIGH
+ &pioB 6 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
+ };
+
+ i2c@0 {
+ compatible = "i2c-gpio";
+ gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 24 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_gpio0>;
+ status = "disabled";
+ };
+
+ i2c@1 {
+ compatible = "i2c-gpio";
+ gpios = <&pioD 10 GPIO_ACTIVE_HIGH /* sda */
+ &pioD 11 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_gpio1>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 3651517abedf..d6ee8bb47213 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
CLKDEV_CON_ID("pioD", &pioD_clk),
+ /* more lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+ CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
--
1.8.3.2
From: Boris BREZILLON <[email protected]>
This patch prepare the transition to common clk for sam9 dt boards by
replacing the timer init callback.
Clocks registration cannot be done in early init callback (as formerly done
by the old clk implementation) because it requires dynamic allocation
which is not ready yet during early init.
In the other hand, at91 clocks must be registered before
at91sam926x_pit_init is called because PIT (Periodic Interval Timer) driver
request the master clk (mck).
A new function (at91sam9_dt_timer_init) is created to fullfil these needs.
This function registers all at91 clks using the dt definition before
calling the PIT init function.
The device tree clock registration is enabled only if common clk is
selected. Else the old clk registration is been done during
at91_dt_initialize call.
Signed-off-by: Boris BREZILLON <[email protected]>
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/mach-at91/board-dt-sam9.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c
index 3dab868b02fa..575b0be66ca8 100644
--- a/arch/arm/mach-at91/board-dt-sam9.c
+++ b/arch/arm/mach-at91/board-dt-sam9.c
@@ -13,6 +13,7 @@
#include <linux/gpio.h>
#include <linux/of.h>
#include <linux/of_irq.h>
+#include <linux/clk-provider.h>
#include <asm/setup.h>
#include <asm/irq.h>
@@ -25,6 +26,14 @@
#include "generic.h"
+static void __init sam9_dt_timer_init(void)
+{
+#if defined(CONFIG_COMMON_CLK)
+ of_clk_init(NULL);
+#endif
+ at91sam926x_pit_init();
+}
+
static const struct of_device_id irq_of_match[] __initconst = {
{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
@@ -43,7 +52,7 @@ static const char *at91_dt_board_compat[] __initdata = {
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
/* Maintainer: Atmel */
- .init_time = at91sam926x_pit_init,
+ .init_time = sam9_dt_timer_init,
.map_io = at91_map_io,
.handle_irq = at91_aic_handle_irq,
.init_early = at91_dt_initialize,
--
1.8.3.2
This patch encloses sam9rl old clk registration in
#if defined(CONFIG_OLD_CLK_AT91)/#endif sections.
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/mach-at91/at91sam9rl.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index d6ee8bb47213..db4ec02d2045 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -25,13 +25,14 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
/*
* The peripheral clocks.
@@ -254,6 +255,7 @@ static void __init at91sam9rl_register_clocks(void)
clk_register(&pck0);
clk_register(&pck1);
}
+#endif
/* --------------------------------------------------------------------
* GPIO
@@ -366,6 +368,8 @@ AT91_SOC_START(at91sam9rl)
.default_irq_priority = at91sam9rl_default_irq_priority,
.extern_irq = (1 << AT91SAM9RL_ID_IRQ0),
.ioremap_registers = at91sam9rl_ioremap_registers,
+#if defined(CONFIG_OLD_CLK_AT91)
.register_clocks = at91sam9rl_register_clocks,
+#endif
.init = at91sam9rl_initialize,
AT91_SOC_END
--
1.8.3.2
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/mach-at91/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4f0e800e7e71..7013b7b66a1e 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -137,7 +137,6 @@ config SOC_AT91SAM9RL
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
- select AT91_USE_OLD_CLK
select HAVE_AT91_UTMI
config SOC_AT91SAM9G45
--
1.8.3.2
Define at91sam9rl clocks in at91sam9rl dtsi file.
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/boot/dts/at91sam9rl.dtsi | 231 +++++++++++++++++++++++++++++++++++++-
1 file changed, 229 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 9a6208b046b6..16f74f98b9ef 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -8,6 +8,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/clk/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
@@ -65,6 +66,8 @@
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
17 IRQ_TYPE_LEVEL_HIGH 0
18 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk";
};
mmc0: mmc@fffa4000 {
@@ -74,6 +77,8 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
status = "disabled";
};
@@ -83,6 +88,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
+ clocks = <&twi0_clk>;
status = "disabled";
};
@@ -103,6 +109,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -114,6 +122,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -125,6 +135,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -136,6 +148,8 @@
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
status = "disabled";
};
@@ -165,6 +179,8 @@
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
status = "disabled";
};
@@ -207,9 +223,11 @@
};
usb0: gadget@fffd4000 {
- compatible = "atmel,at91rm9200-udc";
+ compatible = "atmel,at91sam9rl-udc";
reg = <0xfffd4000 0x4000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udphs_clk>, <&utmi>;
+ clock-names = "pclk", "hclk";
status = "disabled";
};
@@ -232,6 +250,8 @@
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
status = "disabled";
};
@@ -515,6 +535,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
};
pioB: gpio@fffff600 {
@@ -525,6 +546,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
};
pioC: gpio@fffff800 {
@@ -535,6 +557,7 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
};
pioD: gpio@fffffa00 {
@@ -545,12 +568,215 @@
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
+ clocks = <&pioD_clk>;
};
};
pmc: pmc@fffffc00 {
- compatible = "atmel,at91rm9200-pmc";
+ compatible = "atmel,at91sam9g45-pmc";
reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ clk32k: slck {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&clk32k>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+ };
+
+ utmi: utmick {
+ compatible = "atmel,at91sam9x5-clk-utmi";
+ #clock-cells = <0>;
+ interrupt-parent = <&pmc>;
+ interrupts = <AT91_PMC_LOCKU>;
+ clocks = <&main>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
+ atmel,clk-output-range = <0 94000000>;
+ atmel,clk-divisors = <1 2 4 3>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ pioD_clk: pioD_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ twi0_clk: twi0_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ twi1_clk: twi1_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ pmw_clk: pwm_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ adc_clk: adc_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ dma0_clk: dma0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ udphs_clk: udphs_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+ };
};
rstc@fffffd00 {
@@ -567,6 +793,7 @@
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
};
watchdog@fffffd40 {
--
1.8.3.2
Define the main clock frequency for the new main clock node in
at91sam9rlek.dts
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/boot/dts/at91sam9rlek.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9rlek.dts b/arch/arm/boot/dts/at91sam9rlek.dts
index aa76b1d7285a..813ca76a19cd 100644
--- a/arch/arm/boot/dts/at91sam9rlek.dts
+++ b/arch/arm/boot/dts/at91sam9rlek.dts
@@ -68,6 +68,12 @@
};
};
+ pmc: pmc@fffffc00 {
+ main: mainck {
+ clock-frequency = <12000000>;
+ };
+ };
+
watchdog@fffffd40 {
status = "okay";
};
--
1.8.3.2
at91sam9rl now has a device tree, add it to the at91_dt_defconfig.
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 0b4e9b5210d8..d0bddb699865 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -20,6 +20,7 @@ CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
CONFIG_SOC_AT91SAM9N12=y
+CONFIG_SOC_AT91SAM9RL=y
CONFIG_MACH_AT91RM9200_DT=y
CONFIG_MACH_AT91SAM9_DT=y
CONFIG_AT91_TIMER_HZ=128
--
1.8.3.2
Add a device tree for the at91sam9rl-ek. For now it supports:
- MMC
- dbgu
- usart1
- watchdog
- nand
- leds
- buttons
Signed-off-by: Alexandre Belloni <[email protected]>
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/at91sam9rlek.dts | 151 +++++++++++++++++++++++++++++++++++++
2 files changed, 153 insertions(+)
create mode 100644 arch/arm/boot/dts/at91sam9rlek.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6d1e43d46187..ce58477cfa33 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -29,6 +29,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
# sam9n12
dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
+# sam9rl
+dtb-$(CONFIG_ARCH_AT91) += at91sam9rlek.dtb
# sam9x5
dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb
diff --git a/arch/arm/boot/dts/at91sam9rlek.dts b/arch/arm/boot/dts/at91sam9rlek.dts
new file mode 100644
index 000000000000..aa76b1d7285a
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9rlek.dts
@@ -0,0 +1,151 @@
+/*
+ * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
+ *
+ * Copyright (C) 2014 Alexandre Belloni <[email protected]>
+ *
+ * Licensed under GPLv2 only
+ */
+/dts-v1/;
+#include "at91sam9rl.dtsi"
+
+/ {
+ model = "Atmel at91sam9rlek";
+ compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ main_clock: clock@0 {
+ compatible = "atmel,osc", "fixed-clock";
+ clock-frequency = <12000000>;
+ };
+ };
+
+ ahb {
+ apb {
+ mmc0: mmc@fffa4000 {
+ pinctrl-0 = <
+ &pinctrl_board_mmc0
+ &pinctrl_mmc0_clk
+ &pinctrl_mmc0_slot0_cmd_dat0
+ &pinctrl_mmc0_slot0_dat1_3>;
+ status = "okay";
+ slot@0 {
+ reg = <0>;
+ bus-width = <4>;
+ cd-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ usart0: serial@fffb0000 {
+ pinctrl-0 = <
+ &pinctrl_usart0
+ &pinctrl_usart0_rts
+ &pinctrl_usart0_cts>;
+ status = "okay";
+ };
+
+ dbgu: serial@fffff200 {
+ status = "okay";
+ };
+
+ pinctrl@fffff400 {
+ mmc0 {
+ pinctrl_board_mmc0: mmc0-board {
+ atmel,pins =
+ <AT91_PIOA 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+ };
+ };
+ };
+
+ watchdog@fffffd40 {
+ status = "okay";
+ };
+ };
+
+ nand0: nand@40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt = <1>;
+ status = "okay";
+
+ at91bootstrap@0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x40000>;
+ };
+
+ bootloader@40000 {
+ label = "bootloader";
+ reg = <0x40000 0x80000>;
+ };
+
+ bootloaderenv@c0000 {
+ label = "bootloader env";
+ reg = <0xc0000 0xc0000>;
+ };
+
+ dtb@180000 {
+ label = "device tree";
+ reg = <0x180000 0x80000>;
+ };
+
+ kernel@200000 {
+ label = "kernel";
+ reg = <0x200000 0x600000>;
+ };
+
+ rootfs@800000 {
+ label = "rootfs";
+ reg = <0x800000 0x0f800000>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ ds1 {
+ label = "ds1";
+ gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
+ };
+
+ ds2 {
+ label = "ds2";
+ gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
+ };
+
+ ds3 {
+ label = "ds3";
+ gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ right_click {
+ label = "right_click";
+ gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
+ linux,code = <273>;
+ gpio-key,wakeup;
+ };
+
+ left_click {
+ label = "left_click";
+ gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
+ linux,code = <272>;
+ gpio-key,wakeup;
+ };
+ };
+};
--
1.8.3.2
Hi boris,
I don't know if splitting the patch is needed. For the 9261 I was
asked to keep the patch number low and the board won't boot up if the
one of the 2 patches is missing.
Jean-Jacques
2014-02-19 17:01 GMT+01:00 Boris BREZILLON <[email protected]>:
> Hi Alexandre,
>
>
> On 19/02/2014 16:32, Alexandre Belloni wrote:
>>
>> This adds preliminary DT support for the at91sam9rl.
>>
>> Signed-off-by: Alexandre Belloni <[email protected]>
>> ---
>> arch/arm/boot/dts/at91sam9rl.dtsi | 628
>> ++++++++++++++++++++++++++++++++++++++
>> arch/arm/mach-at91/at91sam9rl.c | 16 +
>> 2 files changed, 644 insertions(+)
>> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>>
>> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi
>> b/arch/arm/boot/dts/at91sam9rl.dtsi
>> new file mode 100644
>> index 000000000000..9a6208b046b6
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
>> @@ -0,0 +1,628 @@
>> +/*
>> + * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
>> + *
>> + * Copyright (C) 2014 Alexandre Belloni
>> <[email protected]>
>> + *
>> + * Licensed under GPLv2 or later.
>> + */
>> +
>> +#include "skeleton.dtsi"
>> +#include <dt-bindings/pinctrl/at91.h>
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +/ {
>> + model = "Atmel AT91SAM9RL family SoC";
>> + compatible = "atmel,at91sam9rl", "atmel,at91sam9";
>> + interrupt-parent = <&aic>;
>> +
>> + aliases {
>> + serial0 = &dbgu;
>> + serial1 = &usart0;
>> + serial2 = &usart1;
>> + serial3 = &usart2;
>> + serial4 = &usart3;
>> + gpio0 = &pioA;
>> + gpio1 = &pioB;
>> + gpio2 = &pioC;
>> + gpio3 = &pioD;
>> + tcb0 = &tcb0;
>> + i2c0 = &i2c0;
>> + i2c1 = &i2c1;
>> + ssc0 = &ssc0;
>> + ssc1 = &ssc1;
>> + };
>> +
>> + cpus {
>> + #address-cells = <0>;
>> + #size-cells = <0>;
>> +
>> + cpu {
>> + compatible = "arm,arm926ej-s";
>> + device_type = "cpu";
>> + };
>> + };
>> +
>> + memory {
>> + reg = <0x20000000 0x04000000>;
>> + };
>> +
>> + ahb {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + apb {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + tcb0: timer@fffa0000 {
>> + compatible = "atmel,at91rm9200-tcb";
>> + reg = <0xfffa0000 0x100>;
>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
>> + 17 IRQ_TYPE_LEVEL_HIGH 0
>> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
>> + };
>> +
>> + mmc0: mmc@fffa4000 {
>> + compatible = "atmel,hsmci";
>> + reg = <0xfffa4000 0x600>;
>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-names = "default";
>> + status = "disabled";
>> + };
>> +
>> + i2c0: i2c@fffa8000 {
>> + compatible = "atmel,at91sam9260-i2c";
>> + reg = <0xfffa8000 0x100>;
>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c@fffac000 {
>> + compatible = "atmel,at91sam9260-i2c";
>> + reg = <0xfffac000 0x100>;
>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "disabled";
>> + };
>> +
>> + usart0: serial@fffb0000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb0000 0x200>;
>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart0>;
>> + status = "disabled";
>> + };
>> +
>> + usart1: serial@fffb4000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb4000 0x200>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart1>;
>> + status = "disabled";
>> + };
>> +
>> + usart2: serial@fffb8000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffb8000 0x200>;
>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart2>;
>> + status = "disabled";
>> + };
>> +
>> + usart3: serial@fffbc000 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffbc000 0x200>;
>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>> + atmel,use-dma-rx;
>> + atmel,use-dma-tx;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_usart3>;
>> + status = "disabled";
>> + };
>> +
>> + ssc0: ssc@fffc0000 {
>> + compatible = "atmel,at91rm9200-ssc";
>> + reg = <0xfffc0000 0x4000>;
>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_ssc0_tx
>> &pinctrl_ssc0_rx>;
>> + status = "disabled";
>> + };
>> +
>> + ssc1: ssc@fffc4000 {
>> + compatible = "atmel,at91rm9200-ssc";
>> + reg = <0xfffc4000 0x4000>;
>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_ssc1_tx
>> &pinctrl_ssc1_rx>;
>> + status = "disabled";
>> + };
>> +
>> + spi0: spi@fffcc000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "atmel,at91rm9200-spi";
>> + reg = <0xfffcc000 0x200>;
>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_spi0>;
>> + status = "disabled";
>> + };
>> +
>> + adc0: adc@fffd0000 {
>> + compatible = "atmel,at91sam9260-adc";
>> + reg = <0xfffd0000 0x100>;
>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
>> + atmel,adc-use-external-triggers;
>> + atmel,adc-channels-used = <0xf>;
>> + atmel,adc-vref = <3300>;
>> + atmel,adc-num-channels = <4>;
>> + atmel,adc-startup-time = <15>;
>> + atmel,adc-channel-base = <0x30>;
>> + atmel,adc-drdy-mask = <0x10000>;
>> + atmel,adc-status-register = <0x1c>;
>> + atmel,adc-trigger-register = <0x04>;
>> + atmel,adc-res = <8 10>;
>> + atmel,adc-res-names = "lowres", "highres";
>> + atmel,adc-use-res = "highres";
>> +
>> + trigger@0 {
>> + trigger-name = "timer-counter-0";
>> + trigger-value = <0x1>;
>> + };
>> + trigger@1 {
>> + trigger-name = "timer-counter-1";
>> + trigger-value = <0x3>;
>> + };
>> +
>> + trigger@2 {
>> + trigger-name = "timer-counter-2";
>> + trigger-value = <0x5>;
>> + };
>> +
>> + trigger@3 {
>> + trigger-name = "external";
>> + trigger-value = <0x13>;
>> + trigger-external;
>> + };
>> + };
>> +
>> + usb0: gadget@fffd4000 {
>> + compatible = "atmel,at91rm9200-udc";
>> + reg = <0xfffd4000 0x4000>;
>> + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
>> + status = "disabled";
>> + };
>> +
>> + ramc0: ramc@ffffea00 {
>> + compatible = "atmel,at91sam9260-sdramc";
>> + reg = <0xffffea00 0x200>;
>> + };
>> +
>> + aic: interrupt-controller@fffff000 {
>> + #interrupt-cells = <3>;
>> + compatible = "atmel,at91rm9200-aic";
>> + interrupt-controller;
>> + reg = <0xfffff000 0x200>;
>> + atmel,external-irqs = <31>;
>> + };
>> +
>> + dbgu: serial@fffff200 {
>> + compatible = "atmel,at91sam9260-usart";
>> + reg = <0xfffff200 0x200>;
>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_dbgu>;
>> + status = "disabled";
>> + };
>> +
>> + pinctrl@fffff400 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "atmel,at91rm9200-pinctrl",
>> "simple-bus";
>> + ranges = <0xfffff400 0xfffff400 0x800>;
>> +
>> + atmel,mux-mask = <
>> + /* A B */
>> + 0xffffffff 0xe05c6738 /* pioA */
>> + 0xffffffff 0x0000c780 /* pioB */
>> + 0xffffffff 0xe3ffff0e /* pioC */
>> + 0x003fffff 0x0001ff3c /* pioD */
>> + >;
>> +
>> + /* shared pinctrl settings */
>> + dbgu {
>> + pinctrl_dbgu: dbgu-0 {
>> + atmel,pins =
>> + <AT91_PIOA 21
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOA 22
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>> + };
>> + };
>> +
>> + usart0 {
>> + pinctrl_usart0: usart0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 6
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOA 7
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>> + };
>> +
>> + pinctrl_usart0_rts: usart0_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 9
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart0_cts: usart0_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 10
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart0_dtr_dsr:
>> usart0_dtr_dsr-0 {
>> + atmel,pins =
>> + <AT91_PIOD 14
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOD 15
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart0_dcd: usart0_dcd-0 {
>> + atmel,pins =
>> + <AT91_PIOD 16
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart0_ri: usart0_ri-0 {
>> + atmel,pins =
>> + <AT91_PIOD 17
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart0_sck: usart0_sck-0 {
>> + atmel,pins =
>> + <AT91_PIOA 8
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + usart1 {
>> + pinctrl_usart1: usart1-0 {
>> + atmel,pins =
>> + /*TODO check pullup
>> necessary*/
>> + <AT91_PIOA 11
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOA 12
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart1_rts: usart1_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 18
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart1_cts: usart1_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 19
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart1_sck: usart1_sck-0 {
>> + atmel,pins =
>> + <AT91_PIOD 2
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + usart2 {
>> + pinctrl_usart2: usart2-0 {
>> + atmel,pins =
>> + <AT91_PIOA 13
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOA 14
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart2_rts: usart2_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 29
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart2_cts: usart2_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOA 30
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart2_sck: usart2_sck-0 {
>> + atmel,pins =
>> + <AT91_PIOD 9
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + usart3 {
>> + pinctrl_usart3: usart3-0 {
>> + atmel,pins =
>> + <AT91_PIOB 0
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOB 1
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart3_rts: usart3_rts-0 {
>> + atmel,pins =
>> + <AT91_PIOD 4
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart3_cts: usart3_cts-0 {
>> + atmel,pins =
>> + <AT91_PIOD 3
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_usart3_sck: usart3_sck-0 {
>> + atmel,pins =
>> + <AT91_PIOA 20
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + nand {
>> + pinctrl_nand: nand-0 {
>> + atmel,pins =
>> + <AT91_PIOD 17
>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
>> + AT91_PIOB 6
>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
>> + };
>> +
>> + pinctrl_nand0_ale_cle:
>> nand_ale_cle-0 {
>> + atmel,pins =
>> + <AT91_PIOB 2
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOB 3
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_nand0_oe_we: nand_oe_we-0
>> {
>> + atmel,pins =
>> + <AT91_PIOB 4
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOB 5
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_nand0_cs: nand_cs-0 {
>> + atmel,pins =
>> + <AT91_PIOB 6
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + mmc0 {
>> + pinctrl_mmc0_clk: mmc0_clk-0 {
>> + atmel,pins =
>> + <AT91_PIOA 2
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_mmc0_slot0_cmd_dat0:
>> mmc0_slot0_cmd_dat0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 0
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOA 1
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>> + };
>> +
>> + pinctrl_mmc0_slot0_dat1_3:
>> mmc0_slot0_dat1_3-0 {
>> + atmel,pins =
>> + <AT91_PIOA 3
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOA 4
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>> + AT91_PIOA 5
>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>> + };
>> + };
>> +
>> + ssc0 {
>> + pinctrl_ssc0_tx: ssc0_tx-0 {
>> + atmel,pins =
>> + <AT91_PIOA 15
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOC 0
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOC 1
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_ssc0_rx: ssc0_rx-0 {
>> + atmel,pins =
>> + <AT91_PIOA 10
>> AT91_PERIPH_B AT91_PINCTRL_NONE
>> + AT91_PIOA 16
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOA 22
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + ssc1 {
>> + pinctrl_ssc1_tx: ssc1_tx-0 {
>> + atmel,pins =
>> + <AT91_PIOA 13
>> AT91_PERIPH_B AT91_PINCTRL_NONE
>> + AT91_PIOA 29
>> AT91_PERIPH_B AT91_PINCTRL_NONE
>> + AT91_PIOA 30
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_ssc1_rx: ssc1_rx-0 {
>> + atmel,pins =
>> + <AT91_PIOA 8
>> AT91_PERIPH_B AT91_PINCTRL_NONE
>> + AT91_PIOA 9
>> AT91_PERIPH_B AT91_PINCTRL_NONE
>> + AT91_PIOA 14
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + spi0 {
>> + pinctrl_spi0: spi0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 25
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOA 26
>> AT91_PERIPH_A AT91_PINCTRL_NONE
>> + AT91_PIOA 27
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + i2c_gpio0 {
>> + pinctrl_i2c_gpio0: i2c_gpio0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 23
>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
>> + AT91_PIOA 24
>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
>> + };
>> + };
>> +
>> + i2c_gpio1 {
>> + pinctrl_i2c_gpio1: i2c_gpio1-0 {
>> + atmel,pins =
>> + <AT91_PIOD 10
>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
>> + AT91_PIOD 11
>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
>> + };
>> + };
>> +
>> + tcb0 {
>> + pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
>> + atmel,pins = <AT91_PIOA 3
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
>> + atmel,pins = <AT91_PIOC 31
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
>> + atmel,pins = <AT91_PIOD 21
>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
>> + atmel,pins = <AT91_PIOA 4
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
>> + atmel,pins = <AT91_PIOC 29
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
>> + atmel,pins = <AT91_PIOD 10
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
>> + atmel,pins = <AT91_PIOA 5
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
>> + atmel,pins = <AT91_PIOC 30
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> +
>> + pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
>> + atmel,pins = <AT91_PIOD 11
>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>> + };
>> + };
>> +
>> + pioA: gpio@fffff400 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffff400 0x200>;
>> + interrupts = <2
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pioB: gpio@fffff600 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffff600 0x200>;
>> + interrupts = <3
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pioC: gpio@fffff800 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffff800 0x200>;
>> + interrupts = <4
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pioD: gpio@fffffa00 {
>> + compatible =
>> "atmel,at91rm9200-gpio";
>> + reg = <0xfffffa00 0x200>;
>> + interrupts = <5
>> IRQ_TYPE_LEVEL_HIGH 1>;
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> + };
>> +
>> + pmc: pmc@fffffc00 {
>> + compatible = "atmel,at91rm9200-pmc";
>> + reg = <0xfffffc00 0x100>;
>> + };
>> +
>> + rstc@fffffd00 {
>> + compatible = "atmel,at91sam9260-rstc";
>> + reg = <0xfffffd00 0x10>;
>> + };
>> +
>> + shdwc@fffffd10 {
>> + compatible = "atmel,at91sam9260-shdwc";
>> + reg = <0xfffffd10 0x10>;
>> + };
>> +
>> + pit: timer@fffffd30 {
>> + compatible = "atmel,at91sam9260-pit";
>> + reg = <0xfffffd30 0xf>;
>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> + };
>> +
>> + watchdog@fffffd40 {
>> + compatible = "atmel,at91sam9260-wdt";
>> + reg = <0xfffffd40 0x10>;
>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + nand0: nand@40000000 {
>> + compatible = "atmel,at91rm9200-nand";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + reg = <0x40000000 0x10000000
>> + 0xffffe800 0x200
>> + >;
>> + atmel,nand-addr-offset = <21>;
>> + atmel,nand-cmd-offset = <22>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_nand>;
>> + gpios = <&pioD 17 GPIO_ACTIVE_HIGH
>> + &pioB 6 GPIO_ACTIVE_HIGH
>> + 0
>> + >;
>> + status = "disabled";
>> + };
>> + };
>> +
>> + i2c@0 {
>> + compatible = "i2c-gpio";
>> + gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
>> + &pioA 24 GPIO_ACTIVE_HIGH /* scl */
>> + >;
>> + i2c-gpio,sda-open-drain;
>> + i2c-gpio,scl-open-drain;
>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c_gpio0>;
>> + status = "disabled";
>> + };
>> +
>> + i2c@1 {
>> + compatible = "i2c-gpio";
>> + gpios = <&pioD 10 GPIO_ACTIVE_HIGH /* sda */
>> + &pioD 11 GPIO_ACTIVE_HIGH /* scl */
>> + >;
>> + i2c-gpio,sda-open-drain;
>> + i2c-gpio,scl-open-drain;
>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pinctrl_i2c_gpio1>;
>> + status = "disabled";
>> + };
>> +};
>> diff --git a/arch/arm/mach-at91/at91sam9rl.c
>> b/arch/arm/mach-at91/at91sam9rl.c
>> index 3651517abedf..d6ee8bb47213 100644
>> --- a/arch/arm/mach-at91/at91sam9rl.c
>> +++ b/arch/arm/mach-at91/at91sam9rl.c
>
>
> I would have splitted this patch in 2 different patches:
> 1) define at91sam9rl DT clock lookup entries
> 2) add at91sam9rl DT SoC support
>
>
>> @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
>> CLKDEV_CON_ID("pioB", &pioB_clk),
>> CLKDEV_CON_ID("pioC", &pioC_clk),
>> CLKDEV_CON_ID("pioD", &pioD_clk),
>> + /* more lookup table for DT entries */
>> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
>> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
>> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
>> + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
>> + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
>> + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
>> };
>> static struct clk_lookup usart_clocks_lookups[] = {
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hi Alexandre,
On 19/02/2014 16:32, Alexandre Belloni wrote:
> This adds preliminary DT support for the at91sam9rl.
>
> Signed-off-by: Alexandre Belloni <[email protected]>
> ---
> arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/at91sam9rl.c | 16 +
> 2 files changed, 644 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>
> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
> new file mode 100644
> index 000000000000..9a6208b046b6
> --- /dev/null
> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
> @@ -0,0 +1,628 @@
> +/*
> + * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
> + *
> + * Copyright (C) 2014 Alexandre Belloni <[email protected]>
> + *
> + * Licensed under GPLv2 or later.
> + */
> +
> +#include "skeleton.dtsi"
> +#include <dt-bindings/pinctrl/at91.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + model = "Atmel AT91SAM9RL family SoC";
> + compatible = "atmel,at91sam9rl", "atmel,at91sam9";
> + interrupt-parent = <&aic>;
> +
> + aliases {
> + serial0 = &dbgu;
> + serial1 = &usart0;
> + serial2 = &usart1;
> + serial3 = &usart2;
> + serial4 = &usart3;
> + gpio0 = &pioA;
> + gpio1 = &pioB;
> + gpio2 = &pioC;
> + gpio3 = &pioD;
> + tcb0 = &tcb0;
> + i2c0 = &i2c0;
> + i2c1 = &i2c1;
> + ssc0 = &ssc0;
> + ssc1 = &ssc1;
> + };
> +
> + cpus {
> + #address-cells = <0>;
> + #size-cells = <0>;
> +
> + cpu {
> + compatible = "arm,arm926ej-s";
> + device_type = "cpu";
> + };
> + };
> +
> + memory {
> + reg = <0x20000000 0x04000000>;
> + };
> +
> + ahb {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + apb {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + tcb0: timer@fffa0000 {
> + compatible = "atmel,at91rm9200-tcb";
> + reg = <0xfffa0000 0x100>;
> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
> + 17 IRQ_TYPE_LEVEL_HIGH 0
> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
> + };
> +
> + mmc0: mmc@fffa4000 {
> + compatible = "atmel,hsmci";
> + reg = <0xfffa4000 0x600>;
> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + status = "disabled";
> + };
> +
> + i2c0: i2c@fffa8000 {
> + compatible = "atmel,at91sam9260-i2c";
> + reg = <0xfffa8000 0x100>;
> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + i2c1: i2c@fffac000 {
> + compatible = "atmel,at91sam9260-i2c";
> + reg = <0xfffac000 0x100>;
> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + usart0: serial@fffb0000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb0000 0x200>;
> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart0>;
> + status = "disabled";
> + };
> +
> + usart1: serial@fffb4000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb4000 0x200>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart1>;
> + status = "disabled";
> + };
> +
> + usart2: serial@fffb8000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffb8000 0x200>;
> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart2>;
> + status = "disabled";
> + };
> +
> + usart3: serial@fffbc000 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffbc000 0x200>;
> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
> + atmel,use-dma-rx;
> + atmel,use-dma-tx;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart3>;
> + status = "disabled";
> + };
> +
> + ssc0: ssc@fffc0000 {
> + compatible = "atmel,at91rm9200-ssc";
> + reg = <0xfffc0000 0x4000>;
> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
> + status = "disabled";
> + };
> +
> + ssc1: ssc@fffc4000 {
> + compatible = "atmel,at91rm9200-ssc";
> + reg = <0xfffc4000 0x4000>;
> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
> + status = "disabled";
> + };
> +
> + spi0: spi@fffcc000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "atmel,at91rm9200-spi";
> + reg = <0xfffcc000 0x200>;
> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi0>;
> + status = "disabled";
> + };
> +
> + adc0: adc@fffd0000 {
> + compatible = "atmel,at91sam9260-adc";
> + reg = <0xfffd0000 0x100>;
> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
> + atmel,adc-use-external-triggers;
> + atmel,adc-channels-used = <0xf>;
> + atmel,adc-vref = <3300>;
> + atmel,adc-num-channels = <4>;
> + atmel,adc-startup-time = <15>;
> + atmel,adc-channel-base = <0x30>;
> + atmel,adc-drdy-mask = <0x10000>;
> + atmel,adc-status-register = <0x1c>;
> + atmel,adc-trigger-register = <0x04>;
> + atmel,adc-res = <8 10>;
> + atmel,adc-res-names = "lowres", "highres";
> + atmel,adc-use-res = "highres";
> +
> + trigger@0 {
> + trigger-name = "timer-counter-0";
> + trigger-value = <0x1>;
> + };
> + trigger@1 {
> + trigger-name = "timer-counter-1";
> + trigger-value = <0x3>;
> + };
> +
> + trigger@2 {
> + trigger-name = "timer-counter-2";
> + trigger-value = <0x5>;
> + };
> +
> + trigger@3 {
> + trigger-name = "external";
> + trigger-value = <0x13>;
> + trigger-external;
> + };
> + };
> +
> + usb0: gadget@fffd4000 {
> + compatible = "atmel,at91rm9200-udc";
> + reg = <0xfffd4000 0x4000>;
> + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
> + status = "disabled";
> + };
> +
> + ramc0: ramc@ffffea00 {
> + compatible = "atmel,at91sam9260-sdramc";
> + reg = <0xffffea00 0x200>;
> + };
> +
> + aic: interrupt-controller@fffff000 {
> + #interrupt-cells = <3>;
> + compatible = "atmel,at91rm9200-aic";
> + interrupt-controller;
> + reg = <0xfffff000 0x200>;
> + atmel,external-irqs = <31>;
> + };
> +
> + dbgu: serial@fffff200 {
> + compatible = "atmel,at91sam9260-usart";
> + reg = <0xfffff200 0x200>;
> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dbgu>;
> + status = "disabled";
> + };
> +
> + pinctrl@fffff400 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
> + ranges = <0xfffff400 0xfffff400 0x800>;
> +
> + atmel,mux-mask = <
> + /* A B */
> + 0xffffffff 0xe05c6738 /* pioA */
> + 0xffffffff 0x0000c780 /* pioB */
> + 0xffffffff 0xe3ffff0e /* pioC */
> + 0x003fffff 0x0001ff3c /* pioD */
> + >;
> +
> + /* shared pinctrl settings */
> + dbgu {
> + pinctrl_dbgu: dbgu-0 {
> + atmel,pins =
> + <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
> + };
> + };
> +
> + usart0 {
> + pinctrl_usart0: usart0-0 {
> + atmel,pins =
> + <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
> + };
> +
> + pinctrl_usart0_rts: usart0_rts-0 {
> + atmel,pins =
> + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart0_cts: usart0_cts-0 {
> + atmel,pins =
> + <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
> + atmel,pins =
> + <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart0_dcd: usart0_dcd-0 {
> + atmel,pins =
> + <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart0_ri: usart0_ri-0 {
> + atmel,pins =
> + <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart0_sck: usart0_sck-0 {
> + atmel,pins =
> + <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + usart1 {
> + pinctrl_usart1: usart1-0 {
> + atmel,pins =
> + /*TODO check pullup necessary*/
> + <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart1_rts: usart1_rts-0 {
> + atmel,pins =
> + <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart1_cts: usart1_cts-0 {
> + atmel,pins =
> + <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart1_sck: usart1_sck-0 {
> + atmel,pins =
> + <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + usart2 {
> + pinctrl_usart2: usart2-0 {
> + atmel,pins =
> + <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart2_rts: usart2_rts-0 {
> + atmel,pins =
> + <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart2_cts: usart2_cts-0 {
> + atmel,pins =
> + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart2_sck: usart2_sck-0 {
> + atmel,pins =
> + <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + usart3 {
> + pinctrl_usart3: usart3-0 {
> + atmel,pins =
> + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart3_rts: usart3_rts-0 {
> + atmel,pins =
> + <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart3_cts: usart3_cts-0 {
> + atmel,pins =
> + <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_usart3_sck: usart3_sck-0 {
> + atmel,pins =
> + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + nand {
> + pinctrl_nand: nand-0 {
> + atmel,pins =
> + <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
> + AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> + };
> +
> + pinctrl_nand0_ale_cle: nand_ale_cle-0 {
> + atmel,pins =
> + <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_nand0_oe_we: nand_oe_we-0 {
> + atmel,pins =
> + <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_nand0_cs: nand_cs-0 {
> + atmel,pins =
> + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + mmc0 {
> + pinctrl_mmc0_clk: mmc0_clk-0 {
> + atmel,pins =
> + <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
> + atmel,pins =
> + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
> + };
> +
> + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
> + atmel,pins =
> + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
> + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
> + };
> + };
> +
> + ssc0 {
> + pinctrl_ssc0_tx: ssc0_tx-0 {
> + atmel,pins =
> + <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_ssc0_rx: ssc0_rx-0 {
> + atmel,pins =
> + <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE
> + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + ssc1 {
> + pinctrl_ssc1_tx: ssc1_tx-0 {
> + atmel,pins =
> + <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE
> + AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE
> + AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_ssc1_rx: ssc1_rx-0 {
> + atmel,pins =
> + <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE
> + AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE
> + AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + spi0 {
> + pinctrl_spi0: spi0-0 {
> + atmel,pins =
> + <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE
> + AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + i2c_gpio0 {
> + pinctrl_i2c_gpio0: i2c_gpio0-0 {
> + atmel,pins =
> + <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
> + AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
> + };
> + };
> +
> + i2c_gpio1 {
> + pinctrl_i2c_gpio1: i2c_gpio1-0 {
> + atmel,pins =
> + <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
> + AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
> + };
> + };
> +
> + tcb0 {
> + pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
> + atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
> + atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
> + atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
> + atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
> + atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
> + atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
> + atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
> + atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> +
> + pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
> + atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + pioA: gpio@fffff400 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff400 0x200>;
> + interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + pioB: gpio@fffff600 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff600 0x200>;
> + interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + pioC: gpio@fffff800 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffff800 0x200>;
> + interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + pioD: gpio@fffffa00 {
> + compatible = "atmel,at91rm9200-gpio";
> + reg = <0xfffffa00 0x200>;
> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
> + #gpio-cells = <2>;
> + gpio-controller;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + pmc: pmc@fffffc00 {
> + compatible = "atmel,at91rm9200-pmc";
> + reg = <0xfffffc00 0x100>;
> + };
> +
> + rstc@fffffd00 {
> + compatible = "atmel,at91sam9260-rstc";
> + reg = <0xfffffd00 0x10>;
> + };
> +
> + shdwc@fffffd10 {
> + compatible = "atmel,at91sam9260-shdwc";
> + reg = <0xfffffd10 0x10>;
> + };
> +
> + pit: timer@fffffd30 {
> + compatible = "atmel,at91sam9260-pit";
> + reg = <0xfffffd30 0xf>;
> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> + };
> +
> + watchdog@fffffd40 {
> + compatible = "atmel,at91sam9260-wdt";
> + reg = <0xfffffd40 0x10>;
> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> + status = "disabled";
> + };
> + };
> +
> + nand0: nand@40000000 {
> + compatible = "atmel,at91rm9200-nand";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x40000000 0x10000000
> + 0xffffe800 0x200
> + >;
> + atmel,nand-addr-offset = <21>;
> + atmel,nand-cmd-offset = <22>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_nand>;
> + gpios = <&pioD 17 GPIO_ACTIVE_HIGH
> + &pioB 6 GPIO_ACTIVE_HIGH
> + 0
> + >;
> + status = "disabled";
> + };
> + };
> +
> + i2c@0 {
> + compatible = "i2c-gpio";
> + gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
> + &pioA 24 GPIO_ACTIVE_HIGH /* scl */
> + >;
> + i2c-gpio,sda-open-drain;
> + i2c-gpio,scl-open-drain;
> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c_gpio0>;
> + status = "disabled";
> + };
> +
> + i2c@1 {
> + compatible = "i2c-gpio";
> + gpios = <&pioD 10 GPIO_ACTIVE_HIGH /* sda */
> + &pioD 11 GPIO_ACTIVE_HIGH /* scl */
> + >;
> + i2c-gpio,sda-open-drain;
> + i2c-gpio,scl-open-drain;
> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c_gpio1>;
> + status = "disabled";
> + };
> +};
> diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
> index 3651517abedf..d6ee8bb47213 100644
> --- a/arch/arm/mach-at91/at91sam9rl.c
> +++ b/arch/arm/mach-at91/at91sam9rl.c
I would have splitted this patch in 2 different patches:
1) define at91sam9rl DT clock lookup entries
2) add at91sam9rl DT SoC support
> @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
> CLKDEV_CON_ID("pioB", &pioB_clk),
> CLKDEV_CON_ID("pioC", &pioC_clk),
> CLKDEV_CON_ID("pioD", &pioD_clk),
> + /* more lookup table for DT entries */
> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
> + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
> + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
> + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
> };
>
> static struct clk_lookup usart_clocks_lookups[] = {
On Wed, Feb 19, 2014 at 03:32:26PM +0000, Alexandre Belloni wrote:
> Add a device tree for the at91sam9rl-ek. For now it supports:
> - MMC
> - dbgu
> - usart1
> - watchdog
> - nand
> - leds
> - buttons
>
> Signed-off-by: Alexandre Belloni <[email protected]>
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/at91sam9rlek.dts | 151 +++++++++++++++++++++++++++++++++++++
> 2 files changed, 153 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91sam9rlek.dts
[...]
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + main_clock: clock@0 {
> + compatible = "atmel,osc", "fixed-clock";
> + clock-frequency = <12000000>;
> + };
> + };
This has no reg. It shouldn't need the unit-address.
Thanks,
Mark.
On Wed, Feb 19, 2014 at 03:32:24PM +0000, Alexandre Belloni wrote:
> This adds preliminary DT support for the at91sam9rl.
>
> Signed-off-by: Alexandre Belloni <[email protected]>
> ---
> arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/at91sam9rl.c | 16 +
> 2 files changed, 644 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
[...]
> + tcb0: timer@fffa0000 {
> + compatible = "atmel,at91rm9200-tcb";
> + reg = <0xfffa0000 0x100>;
> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
> + 17 IRQ_TYPE_LEVEL_HIGH 0
> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
> + };
Nit: please bracket list entries individually. Also for other list
properties like reg and (*-)gpio(s).
[...]
> + adc0: adc@fffd0000 {
> + compatible = "atmel,at91sam9260-adc";
> + reg = <0xfffd0000 0x100>;
> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
> + atmel,adc-use-external-triggers;
> + atmel,adc-channels-used = <0xf>;
> + atmel,adc-vref = <3300>;
> + atmel,adc-num-channels = <4>;
> + atmel,adc-startup-time = <15>;
> + atmel,adc-channel-base = <0x30>;
> + atmel,adc-drdy-mask = <0x10000>;
> + atmel,adc-status-register = <0x1c>;
> + atmel,adc-trigger-register = <0x04>;
> + atmel,adc-res = <8 10>;
> + atmel,adc-res-names = "lowres", "highres";
> + atmel,adc-use-res = "highres";
> +
> + trigger@0 {
> + trigger-name = "timer-counter-0";
> + trigger-value = <0x1>;
> + };
A unit-address should go with a reg value. Either this needs a reg and
the parent node needs #address-cells and #size-cells, or the
unit-address should go, and the names made unique through other means.
[...]
> + pinctrl@fffff400 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
both; that doesn't make any sense.
> diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
> index 3651517abedf..d6ee8bb47213 100644
> --- a/arch/arm/mach-at91/at91sam9rl.c
> +++ b/arch/arm/mach-at91/at91sam9rl.c
> @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
> CLKDEV_CON_ID("pioB", &pioB_clk),
> CLKDEV_CON_ID("pioC", &pioC_clk),
> CLKDEV_CON_ID("pioD", &pioD_clk),
> + /* more lookup table for DT entries */
> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
> + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
> + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
> + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
> + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
> + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
Why can't these clocks be described in the DT?
Cheers,
Mark.
On 19/02/2014 17:19, Jean-Jacques Hiblot wrote:
> Hi boris,
>
> I don't know if splitting the patch is needed.
> For the 9261 I was
> asked to keep the patch number low
Okay, but then you mix DT modifications with source code modification.
IMHO, we should keep these modifications in different patches and prefix
patch subject differently :
- "ARM: at91/dt" or "ARM: at91: dt: " : for DT modifications
- "ARM: at91" : for SoC source code modifications
Note that I might have done the exact same thing (mixing source and DT
modifications in the same patch) in my previous submissions :-).
Nicolas, what do you think ?
> and the board won't boot up if the
> one of the 2 patches is missing.
That's not exactly true: if you add the clk lookup entries and then add
at91sam9rl DT support, the board will boot as expected.
>
> Jean-Jacques
>
> 2014-02-19 17:01 GMT+01:00 Boris BREZILLON <[email protected]>:
>> Hi Alexandre,
>>
>>
>> On 19/02/2014 16:32, Alexandre Belloni wrote:
>>> This adds preliminary DT support for the at91sam9rl.
>>>
>>> Signed-off-by: Alexandre Belloni <[email protected]>
>>> ---
>>> arch/arm/boot/dts/at91sam9rl.dtsi | 628
>>> ++++++++++++++++++++++++++++++++++++++
>>> arch/arm/mach-at91/at91sam9rl.c | 16 +
>>> 2 files changed, 644 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi
>>> b/arch/arm/boot/dts/at91sam9rl.dtsi
>>> new file mode 100644
>>> index 000000000000..9a6208b046b6
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
>>> @@ -0,0 +1,628 @@
>>> +/*
>>> + * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
>>> + *
>>> + * Copyright (C) 2014 Alexandre Belloni
>>> <[email protected]>
>>> + *
>>> + * Licensed under GPLv2 or later.
>>> + */
>>> +
>>> +#include "skeleton.dtsi"
>>> +#include <dt-bindings/pinctrl/at91.h>
>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>> +#include <dt-bindings/gpio/gpio.h>
>>> +
>>> +/ {
>>> + model = "Atmel AT91SAM9RL family SoC";
>>> + compatible = "atmel,at91sam9rl", "atmel,at91sam9";
>>> + interrupt-parent = <&aic>;
>>> +
>>> + aliases {
>>> + serial0 = &dbgu;
>>> + serial1 = &usart0;
>>> + serial2 = &usart1;
>>> + serial3 = &usart2;
>>> + serial4 = &usart3;
>>> + gpio0 = &pioA;
>>> + gpio1 = &pioB;
>>> + gpio2 = &pioC;
>>> + gpio3 = &pioD;
>>> + tcb0 = &tcb0;
>>> + i2c0 = &i2c0;
>>> + i2c1 = &i2c1;
>>> + ssc0 = &ssc0;
>>> + ssc1 = &ssc1;
>>> + };
>>> +
>>> + cpus {
>>> + #address-cells = <0>;
>>> + #size-cells = <0>;
>>> +
>>> + cpu {
>>> + compatible = "arm,arm926ej-s";
>>> + device_type = "cpu";
>>> + };
>>> + };
>>> +
>>> + memory {
>>> + reg = <0x20000000 0x04000000>;
>>> + };
>>> +
>>> + ahb {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> +
>>> + apb {
>>> + compatible = "simple-bus";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> +
>>> + tcb0: timer@fffa0000 {
>>> + compatible = "atmel,at91rm9200-tcb";
>>> + reg = <0xfffa0000 0x100>;
>>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
>>> + 17 IRQ_TYPE_LEVEL_HIGH 0
>>> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + };
>>> +
>>> + mmc0: mmc@fffa4000 {
>>> + compatible = "atmel,hsmci";
>>> + reg = <0xfffa4000 0x600>;
>>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pinctrl-names = "default";
>>> + status = "disabled";
>>> + };
>>> +
>>> + i2c0: i2c@fffa8000 {
>>> + compatible = "atmel,at91sam9260-i2c";
>>> + reg = <0xfffa8000 0x100>;
>>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + i2c1: i2c@fffac000 {
>>> + compatible = "atmel,at91sam9260-i2c";
>>> + reg = <0xfffac000 0x100>;
>>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart0: serial@fffb0000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb0000 0x200>;
>>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart0>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart1: serial@fffb4000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb4000 0x200>;
>>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart1>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart2: serial@fffb8000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffb8000 0x200>;
>>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart2>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + usart3: serial@fffbc000 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffbc000 0x200>;
>>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + atmel,use-dma-rx;
>>> + atmel,use-dma-tx;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_usart3>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc0: ssc@fffc0000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffc0000 0x4000>;
>>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc0_tx
>>> &pinctrl_ssc0_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + ssc1: ssc@fffc4000 {
>>> + compatible = "atmel,at91rm9200-ssc";
>>> + reg = <0xfffc4000 0x4000>;
>>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_ssc1_tx
>>> &pinctrl_ssc1_rx>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + spi0: spi@fffcc000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + compatible = "atmel,at91rm9200-spi";
>>> + reg = <0xfffcc000 0x200>;
>>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_spi0>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + adc0: adc@fffd0000 {
>>> + compatible = "atmel,at91sam9260-adc";
>>> + reg = <0xfffd0000 0x100>;
>>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
>>> + atmel,adc-use-external-triggers;
>>> + atmel,adc-channels-used = <0xf>;
>>> + atmel,adc-vref = <3300>;
>>> + atmel,adc-num-channels = <4>;
>>> + atmel,adc-startup-time = <15>;
>>> + atmel,adc-channel-base = <0x30>;
>>> + atmel,adc-drdy-mask = <0x10000>;
>>> + atmel,adc-status-register = <0x1c>;
>>> + atmel,adc-trigger-register = <0x04>;
>>> + atmel,adc-res = <8 10>;
>>> + atmel,adc-res-names = "lowres", "highres";
>>> + atmel,adc-use-res = "highres";
>>> +
>>> + trigger@0 {
>>> + trigger-name = "timer-counter-0";
>>> + trigger-value = <0x1>;
>>> + };
>>> + trigger@1 {
>>> + trigger-name = "timer-counter-1";
>>> + trigger-value = <0x3>;
>>> + };
>>> +
>>> + trigger@2 {
>>> + trigger-name = "timer-counter-2";
>>> + trigger-value = <0x5>;
>>> + };
>>> +
>>> + trigger@3 {
>>> + trigger-name = "external";
>>> + trigger-value = <0x13>;
>>> + trigger-external;
>>> + };
>>> + };
>>> +
>>> + usb0: gadget@fffd4000 {
>>> + compatible = "atmel,at91rm9200-udc";
>>> + reg = <0xfffd4000 0x4000>;
>>> + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + ramc0: ramc@ffffea00 {
>>> + compatible = "atmel,at91sam9260-sdramc";
>>> + reg = <0xffffea00 0x200>;
>>> + };
>>> +
>>> + aic: interrupt-controller@fffff000 {
>>> + #interrupt-cells = <3>;
>>> + compatible = "atmel,at91rm9200-aic";
>>> + interrupt-controller;
>>> + reg = <0xfffff000 0x200>;
>>> + atmel,external-irqs = <31>;
>>> + };
>>> +
>>> + dbgu: serial@fffff200 {
>>> + compatible = "atmel,at91sam9260-usart";
>>> + reg = <0xfffff200 0x200>;
>>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_dbgu>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + pinctrl@fffff400 {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + compatible = "atmel,at91rm9200-pinctrl",
>>> "simple-bus";
>>> + ranges = <0xfffff400 0xfffff400 0x800>;
>>> +
>>> + atmel,mux-mask = <
>>> + /* A B */
>>> + 0xffffffff 0xe05c6738 /* pioA */
>>> + 0xffffffff 0x0000c780 /* pioB */
>>> + 0xffffffff 0xe3ffff0e /* pioC */
>>> + 0x003fffff 0x0001ff3c /* pioD */
>>> + >;
>>> +
>>> + /* shared pinctrl settings */
>>> + dbgu {
>>> + pinctrl_dbgu: dbgu-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 21
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOA 22
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>> + };
>>> + };
>>> +
>>> + usart0 {
>>> + pinctrl_usart0: usart0-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 6
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOA 7
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>> + };
>>> +
>>> + pinctrl_usart0_rts: usart0_rts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 9
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart0_cts: usart0_cts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 10
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart0_dtr_dsr:
>>> usart0_dtr_dsr-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 14
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOD 15
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart0_dcd: usart0_dcd-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 16
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart0_ri: usart0_ri-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 17
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart0_sck: usart0_sck-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 8
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + usart1 {
>>> + pinctrl_usart1: usart1-0 {
>>> + atmel,pins =
>>> + /*TODO check pullup
>>> necessary*/
>>> + <AT91_PIOA 11
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>> + AT91_PIOA 12
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart1_rts: usart1_rts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 18
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart1_cts: usart1_cts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 19
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart1_sck: usart1_sck-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 2
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + usart2 {
>>> + pinctrl_usart2: usart2-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 13
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>> + AT91_PIOA 14
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart2_rts: usart2_rts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 29
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart2_cts: usart2_cts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 30
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart2_sck: usart2_sck-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 9
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + usart3 {
>>> + pinctrl_usart3: usart3-0 {
>>> + atmel,pins =
>>> + <AT91_PIOB 0
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>> + AT91_PIOB 1
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart3_rts: usart3_rts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 4
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart3_cts: usart3_cts-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 3
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_usart3_sck: usart3_sck-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 20
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + nand {
>>> + pinctrl_nand: nand-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 17
>>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
>>> + AT91_PIOB 6
>>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
>>> + };
>>> +
>>> + pinctrl_nand0_ale_cle:
>>> nand_ale_cle-0 {
>>> + atmel,pins =
>>> + <AT91_PIOB 2
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOB 3
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_nand0_oe_we: nand_oe_we-0
>>> {
>>> + atmel,pins =
>>> + <AT91_PIOB 4
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOB 5
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_nand0_cs: nand_cs-0 {
>>> + atmel,pins =
>>> + <AT91_PIOB 6
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + mmc0 {
>>> + pinctrl_mmc0_clk: mmc0_clk-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 2
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_mmc0_slot0_cmd_dat0:
>>> mmc0_slot0_cmd_dat0-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 0
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>> + AT91_PIOA 1
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>> + };
>>> +
>>> + pinctrl_mmc0_slot0_dat1_3:
>>> mmc0_slot0_dat1_3-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 3
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>> + AT91_PIOA 4
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>> + AT91_PIOA 5
>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>> + };
>>> + };
>>> +
>>> + ssc0 {
>>> + pinctrl_ssc0_tx: ssc0_tx-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 15
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOC 0
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOC 1
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_ssc0_rx: ssc0_rx-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 10
>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>> + AT91_PIOA 16
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOA 22
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + ssc1 {
>>> + pinctrl_ssc1_tx: ssc1_tx-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 13
>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>> + AT91_PIOA 29
>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>> + AT91_PIOA 30
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_ssc1_rx: ssc1_rx-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 8
>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>> + AT91_PIOA 9
>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>> + AT91_PIOA 14
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + spi0 {
>>> + pinctrl_spi0: spi0-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 25
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOA 26
>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>> + AT91_PIOA 27
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + i2c_gpio0 {
>>> + pinctrl_i2c_gpio0: i2c_gpio0-0 {
>>> + atmel,pins =
>>> + <AT91_PIOA 23
>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
>>> + AT91_PIOA 24
>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
>>> + };
>>> + };
>>> +
>>> + i2c_gpio1 {
>>> + pinctrl_i2c_gpio1: i2c_gpio1-0 {
>>> + atmel,pins =
>>> + <AT91_PIOD 10
>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
>>> + AT91_PIOD 11
>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
>>> + };
>>> + };
>>> +
>>> + tcb0 {
>>> + pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
>>> + atmel,pins = <AT91_PIOA 3
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
>>> + atmel,pins = <AT91_PIOC 31
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
>>> + atmel,pins = <AT91_PIOD 21
>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
>>> + atmel,pins = <AT91_PIOA 4
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
>>> + atmel,pins = <AT91_PIOC 29
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
>>> + atmel,pins = <AT91_PIOD 10
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
>>> + atmel,pins = <AT91_PIOA 5
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
>>> + atmel,pins = <AT91_PIOC 30
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> +
>>> + pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
>>> + atmel,pins = <AT91_PIOD 11
>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>> + };
>>> + };
>>> +
>>> + pioA: gpio@fffff400 {
>>> + compatible =
>>> "atmel,at91rm9200-gpio";
>>> + reg = <0xfffff400 0x200>;
>>> + interrupts = <2
>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>> + #gpio-cells = <2>;
>>> + gpio-controller;
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + };
>>> +
>>> + pioB: gpio@fffff600 {
>>> + compatible =
>>> "atmel,at91rm9200-gpio";
>>> + reg = <0xfffff600 0x200>;
>>> + interrupts = <3
>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>> + #gpio-cells = <2>;
>>> + gpio-controller;
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + };
>>> +
>>> + pioC: gpio@fffff800 {
>>> + compatible =
>>> "atmel,at91rm9200-gpio";
>>> + reg = <0xfffff800 0x200>;
>>> + interrupts = <4
>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>> + #gpio-cells = <2>;
>>> + gpio-controller;
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + };
>>> +
>>> + pioD: gpio@fffffa00 {
>>> + compatible =
>>> "atmel,at91rm9200-gpio";
>>> + reg = <0xfffffa00 0x200>;
>>> + interrupts = <5
>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>> + #gpio-cells = <2>;
>>> + gpio-controller;
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + };
>>> + };
>>> +
>>> + pmc: pmc@fffffc00 {
>>> + compatible = "atmel,at91rm9200-pmc";
>>> + reg = <0xfffffc00 0x100>;
>>> + };
>>> +
>>> + rstc@fffffd00 {
>>> + compatible = "atmel,at91sam9260-rstc";
>>> + reg = <0xfffffd00 0x10>;
>>> + };
>>> +
>>> + shdwc@fffffd10 {
>>> + compatible = "atmel,at91sam9260-shdwc";
>>> + reg = <0xfffffd10 0x10>;
>>> + };
>>> +
>>> + pit: timer@fffffd30 {
>>> + compatible = "atmel,at91sam9260-pit";
>>> + reg = <0xfffffd30 0xf>;
>>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>>> + };
>>> +
>>> + watchdog@fffffd40 {
>>> + compatible = "atmel,at91sam9260-wdt";
>>> + reg = <0xfffffd40 0x10>;
>>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>>> + status = "disabled";
>>> + };
>>> + };
>>> +
>>> + nand0: nand@40000000 {
>>> + compatible = "atmel,at91rm9200-nand";
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + reg = <0x40000000 0x10000000
>>> + 0xffffe800 0x200
>>> + >;
>>> + atmel,nand-addr-offset = <21>;
>>> + atmel,nand-cmd-offset = <22>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_nand>;
>>> + gpios = <&pioD 17 GPIO_ACTIVE_HIGH
>>> + &pioB 6 GPIO_ACTIVE_HIGH
>>> + 0
>>> + >;
>>> + status = "disabled";
>>> + };
>>> + };
>>> +
>>> + i2c@0 {
>>> + compatible = "i2c-gpio";
>>> + gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
>>> + &pioA 24 GPIO_ACTIVE_HIGH /* scl */
>>> + >;
>>> + i2c-gpio,sda-open-drain;
>>> + i2c-gpio,scl-open-drain;
>>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_i2c_gpio0>;
>>> + status = "disabled";
>>> + };
>>> +
>>> + i2c@1 {
>>> + compatible = "i2c-gpio";
>>> + gpios = <&pioD 10 GPIO_ACTIVE_HIGH /* sda */
>>> + &pioD 11 GPIO_ACTIVE_HIGH /* scl */
>>> + >;
>>> + i2c-gpio,sda-open-drain;
>>> + i2c-gpio,scl-open-drain;
>>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pinctrl_i2c_gpio1>;
>>> + status = "disabled";
>>> + };
>>> +};
>>> diff --git a/arch/arm/mach-at91/at91sam9rl.c
>>> b/arch/arm/mach-at91/at91sam9rl.c
>>> index 3651517abedf..d6ee8bb47213 100644
>>> --- a/arch/arm/mach-at91/at91sam9rl.c
>>> +++ b/arch/arm/mach-at91/at91sam9rl.c
>>
>> I would have splitted this patch in 2 different patches:
>> 1) define at91sam9rl DT clock lookup entries
>> 2) add at91sam9rl DT SoC support
>>
>>
>>> @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
>>> CLKDEV_CON_ID("pioB", &pioB_clk),
>>> CLKDEV_CON_ID("pioC", &pioC_clk),
>>> CLKDEV_CON_ID("pioD", &pioD_clk),
>>> + /* more lookup table for DT entries */
>>> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
>>> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
>>> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
>>> + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
>>> + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
>>> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
>>> + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
>>> + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
>>> + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
>>> + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
>>> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
>>> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
>>> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
>>> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
>>> + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
>>> };
>>> static struct clk_lookup usart_clocks_lookups[] = {
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> [email protected]
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On 19/02/2014 at 17:00:20 +0000, Mark Rutland wrote :
> On Wed, Feb 19, 2014 at 03:32:24PM +0000, Alexandre Belloni wrote:
> > This adds preliminary DT support for the at91sam9rl.
> >
> > Signed-off-by: Alexandre Belloni <[email protected]>
> > ---
> > arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
> > arch/arm/mach-at91/at91sam9rl.c | 16 +
> > 2 files changed, 644 insertions(+)
> > create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>
> [...]
>
> > + tcb0: timer@fffa0000 {
> > + compatible = "atmel,at91rm9200-tcb";
> > + reg = <0xfffa0000 0x100>;
> > + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
> > + 17 IRQ_TYPE_LEVEL_HIGH 0
> > + 18 IRQ_TYPE_LEVEL_HIGH 0>;
> > + };
>
> Nit: please bracket list entries individually. Also for other list
> properties like reg and (*-)gpio(s).
>
OK.
> [...]
>
> > + adc0: adc@fffd0000 {
> > + compatible = "atmel,at91sam9260-adc";
> > + reg = <0xfffd0000 0x100>;
> > + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
> > + atmel,adc-use-external-triggers;
> > + atmel,adc-channels-used = <0xf>;
> > + atmel,adc-vref = <3300>;
> > + atmel,adc-num-channels = <4>;
> > + atmel,adc-startup-time = <15>;
> > + atmel,adc-channel-base = <0x30>;
> > + atmel,adc-drdy-mask = <0x10000>;
> > + atmel,adc-status-register = <0x1c>;
> > + atmel,adc-trigger-register = <0x04>;
> > + atmel,adc-res = <8 10>;
> > + atmel,adc-res-names = "lowres", "highres";
> > + atmel,adc-use-res = "highres";
> > +
> > + trigger@0 {
> > + trigger-name = "timer-counter-0";
> > + trigger-value = <0x1>;
> > + };
>
> A unit-address should go with a reg value. Either this needs a reg and
> the parent node needs #address-cells and #size-cells, or the
> unit-address should go, and the names made unique through other means.
>
OK, I guess I'll have to fix
Documentation/devicetree/bindings/arm/atmel-adc.txt too.
> [...]
>
> > + pinctrl@fffff400 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
>
> NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
> both; that doesn't make any sense.
>
Simply a copy paste, I'll fix that here and also the 6 other atmel
dtsi includes.
What is your preference for those using:
compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ?
> > diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
> > index 3651517abedf..d6ee8bb47213 100644
> > --- a/arch/arm/mach-at91/at91sam9rl.c
> > +++ b/arch/arm/mach-at91/at91sam9rl.c
> > @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
> > CLKDEV_CON_ID("pioB", &pioB_clk),
> > CLKDEV_CON_ID("pioC", &pioC_clk),
> > CLKDEV_CON_ID("pioD", &pioD_clk),
> > + /* more lookup table for DT entries */
> > + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
> > + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
> > + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
> > + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
> > + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
> > + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
> > + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
> > + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
> > + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
> > + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
> > + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
> > + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
> > + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
> > + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
> > + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
>
> Why can't these clocks be described in the DT?
>
The issue is twofold:
- At that point in the series, at91sam9 SoCs are not supported through
the CCF.
- Even after supporting CCF, the at91_dt_defconfig is selecting at91
SoCs that are not supported through the CCF hence preventing us from
using it.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Hi Mark,
On 19/02/2014 18:00, Mark Rutland wrote:
> On Wed, Feb 19, 2014 at 03:32:24PM +0000, Alexandre Belloni wrote:
>> This adds preliminary DT support for the at91sam9rl.
>>
>> Signed-off-by: Alexandre Belloni <[email protected]>
>> ---
>> arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
>> arch/arm/mach-at91/at91sam9rl.c | 16 +
>> 2 files changed, 644 insertions(+)
>> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>
> [...]
>
>> + tcb0: timer@fffa0000 {
>> + compatible = "atmel,at91rm9200-tcb";
>> + reg = <0xfffa0000 0x100>;
>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
>> + 17 IRQ_TYPE_LEVEL_HIGH 0
>> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
>> + };
> Nit: please bracket list entries individually. Also for other list
> properties like reg and (*-)gpio(s).
>
> [...]
>
>> + adc0: adc@fffd0000 {
>> + compatible = "atmel,at91sam9260-adc";
>> + reg = <0xfffd0000 0x100>;
>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
>> + atmel,adc-use-external-triggers;
>> + atmel,adc-channels-used = <0xf>;
>> + atmel,adc-vref = <3300>;
>> + atmel,adc-num-channels = <4>;
>> + atmel,adc-startup-time = <15>;
>> + atmel,adc-channel-base = <0x30>;
>> + atmel,adc-drdy-mask = <0x10000>;
>> + atmel,adc-status-register = <0x1c>;
>> + atmel,adc-trigger-register = <0x04>;
>> + atmel,adc-res = <8 10>;
>> + atmel,adc-res-names = "lowres", "highres";
>> + atmel,adc-use-res = "highres";
>> +
>> + trigger@0 {
>> + trigger-name = "timer-counter-0";
>> + trigger-value = <0x1>;
>> + };
> A unit-address should go with a reg value. Either this needs a reg and
> the parent node needs #address-cells and #size-cells, or the
> unit-address should go, and the names made unique through other means.
>
> [...]
>
>> + pinctrl@fffff400 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
> NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
> both; that doesn't make any sense.
>
>> diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
>> index 3651517abedf..d6ee8bb47213 100644
>> --- a/arch/arm/mach-at91/at91sam9rl.c
>> +++ b/arch/arm/mach-at91/at91sam9rl.c
>> @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
>> CLKDEV_CON_ID("pioB", &pioB_clk),
>> CLKDEV_CON_ID("pioC", &pioC_clk),
>> CLKDEV_CON_ID("pioD", &pioD_clk),
>> + /* more lookup table for DT entries */
>> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
>> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
>> + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
>> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
>> + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
>> + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
>> + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
>> + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
> Why can't these clocks be described in the DT?
They're described in the DT in patch 6/8, but we need these static
definitions
in case the user wants to support both legacy and DT boards.
The at91 CCF based implementation is only compatible with DT, and when
legacy
board support is enabled this disables the CCF implementation in favor
of the
old clk implementation.
Best Regards,
Boris
>
> Cheers,
> Mark.
On Wed, Feb 19, 2014 at 05:31:42PM +0000, Alexandre Belloni wrote:
> On 19/02/2014 at 17:00:20 +0000, Mark Rutland wrote :
> > On Wed, Feb 19, 2014 at 03:32:24PM +0000, Alexandre Belloni wrote:
> > > This adds preliminary DT support for the at91sam9rl.
> > >
> > > Signed-off-by: Alexandre Belloni <[email protected]>
> > > ---
> > > arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
> > > arch/arm/mach-at91/at91sam9rl.c | 16 +
> > > 2 files changed, 644 insertions(+)
> > > create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
> >
> > [...]
> >
> > > + tcb0: timer@fffa0000 {
> > > + compatible = "atmel,at91rm9200-tcb";
> > > + reg = <0xfffa0000 0x100>;
> > > + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
> > > + 17 IRQ_TYPE_LEVEL_HIGH 0
> > > + 18 IRQ_TYPE_LEVEL_HIGH 0>;
> > > + };
> >
> > Nit: please bracket list entries individually. Also for other list
> > properties like reg and (*-)gpio(s).
> >
>
> OK.
>
> > [...]
> >
> > > + adc0: adc@fffd0000 {
> > > + compatible = "atmel,at91sam9260-adc";
> > > + reg = <0xfffd0000 0x100>;
> > > + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
> > > + atmel,adc-use-external-triggers;
> > > + atmel,adc-channels-used = <0xf>;
> > > + atmel,adc-vref = <3300>;
> > > + atmel,adc-num-channels = <4>;
> > > + atmel,adc-startup-time = <15>;
> > > + atmel,adc-channel-base = <0x30>;
> > > + atmel,adc-drdy-mask = <0x10000>;
> > > + atmel,adc-status-register = <0x1c>;
> > > + atmel,adc-trigger-register = <0x04>;
> > > + atmel,adc-res = <8 10>;
> > > + atmel,adc-res-names = "lowres", "highres";
> > > + atmel,adc-use-res = "highres";
> > > +
> > > + trigger@0 {
> > > + trigger-name = "timer-counter-0";
> > > + trigger-value = <0x1>;
> > > + };
> >
> > A unit-address should go with a reg value. Either this needs a reg and
> > the parent node needs #address-cells and #size-cells, or the
> > unit-address should go, and the names made unique through other means.
> >
>
> OK, I guess I'll have to fix
> Documentation/devicetree/bindings/arm/atmel-adc.txt too.
Yes please.
>
> > [...]
> >
> > > + pinctrl@fffff400 {
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
> >
> > NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
> > both; that doesn't make any sense.
> >
>
> Simply a copy paste, I'll fix that here and also the 6 other atmel
> dtsi includes.
>
> What is your preference for those using:
> compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ?
A node should by either a bus or a pinctrl node.
If it has chidren then the simple-bus should be separated out into a
separate node. If there are no children simple-bus should go.
Cheers,
Mark.
Hi Mark,
On Wed, Feb 19, 2014 at 05:00:20PM +0000, Mark Rutland wrote:
> > + adc0: adc@fffd0000 {
> > + compatible = "atmel,at91sam9260-adc";
> > + reg = <0xfffd0000 0x100>;
> > + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
> > + atmel,adc-use-external-triggers;
> > + atmel,adc-channels-used = <0xf>;
> > + atmel,adc-vref = <3300>;
> > + atmel,adc-num-channels = <4>;
> > + atmel,adc-startup-time = <15>;
> > + atmel,adc-channel-base = <0x30>;
> > + atmel,adc-drdy-mask = <0x10000>;
> > + atmel,adc-status-register = <0x1c>;
> > + atmel,adc-trigger-register = <0x04>;
> > + atmel,adc-res = <8 10>;
> > + atmel,adc-res-names = "lowres", "highres";
> > + atmel,adc-use-res = "highres";
> > +
> > + trigger@0 {
> > + trigger-name = "timer-counter-0";
> > + trigger-value = <0x1>;
> > + };
>
> A unit-address should go with a reg value. Either this needs a reg and
> the parent node needs #address-cells and #size-cells, or the
> unit-address should go, and the names made unique through other means.
What do you suggest to make the name unique then?
The ePAPR is pretty clear that the above is the way to go, so I'm
unclear on what you have in mind here.
Plus, I haven't seen anywhere that reg was actually mandatory.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
On 19/02/2014 18:10, Boris BREZILLON :
> On 19/02/2014 17:19, Jean-Jacques Hiblot wrote:
>> Hi boris,
>>
>> I don't know if splitting the patch is needed.
>
>> For the 9261 I was
>> asked to keep the patch number low
> Okay, but then you mix DT modifications with source code modification.
>
> IMHO, we should keep these modifications in different patches and prefix
> patch subject differently :
> - "ARM: at91/dt" or "ARM: at91: dt: " : for DT modifications
> - "ARM: at91" : for SoC source code modifications
>
> Note that I might have done the exact same thing (mixing source and DT
> modifications in the same patch) in my previous submissions :-).
>
> Nicolas, what do you think ?
The interesting split is between material that I will use to build my
"cleanup" series on the one hand and the "dt" series on the other hand.
With an order of submission upstream that is always "cleanup" before "dt".
That said, you can imagine that it's always preferable to have a
separation between source and dt.
Concerning the number of patches, as long as it is not excessive, I tend
to pay little attention to that.
Bye,
>> and the board won't boot up if the
>> one of the 2 patches is missing.
>
> That's not exactly true: if you add the clk lookup entries and then add
> at91sam9rl DT support, the board will boot as expected.
>
>>
>> Jean-Jacques
>>
>> 2014-02-19 17:01 GMT+01:00 Boris BREZILLON <[email protected]>:
>>> Hi Alexandre,
>>>
>>>
>>> On 19/02/2014 16:32, Alexandre Belloni wrote:
>>>> This adds preliminary DT support for the at91sam9rl.
>>>>
>>>> Signed-off-by: Alexandre Belloni <[email protected]>
>>>> ---
>>>> arch/arm/boot/dts/at91sam9rl.dtsi | 628
>>>> ++++++++++++++++++++++++++++++++++++++
>>>> arch/arm/mach-at91/at91sam9rl.c | 16 +
>>>> 2 files changed, 644 insertions(+)
>>>> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>>>>
>>>> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi
>>>> b/arch/arm/boot/dts/at91sam9rl.dtsi
>>>> new file mode 100644
>>>> index 000000000000..9a6208b046b6
>>>> --- /dev/null
>>>> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
>>>> @@ -0,0 +1,628 @@
>>>> +/*
>>>> + * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
>>>> + *
>>>> + * Copyright (C) 2014 Alexandre Belloni
>>>> <[email protected]>
>>>> + *
>>>> + * Licensed under GPLv2 or later.
>>>> + */
>>>> +
>>>> +#include "skeleton.dtsi"
>>>> +#include <dt-bindings/pinctrl/at91.h>
>>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>>> +#include <dt-bindings/gpio/gpio.h>
>>>> +
>>>> +/ {
>>>> + model = "Atmel AT91SAM9RL family SoC";
>>>> + compatible = "atmel,at91sam9rl", "atmel,at91sam9";
>>>> + interrupt-parent = <&aic>;
>>>> +
>>>> + aliases {
>>>> + serial0 = &dbgu;
>>>> + serial1 = &usart0;
>>>> + serial2 = &usart1;
>>>> + serial3 = &usart2;
>>>> + serial4 = &usart3;
>>>> + gpio0 = &pioA;
>>>> + gpio1 = &pioB;
>>>> + gpio2 = &pioC;
>>>> + gpio3 = &pioD;
>>>> + tcb0 = &tcb0;
>>>> + i2c0 = &i2c0;
>>>> + i2c1 = &i2c1;
>>>> + ssc0 = &ssc0;
>>>> + ssc1 = &ssc1;
>>>> + };
>>>> +
>>>> + cpus {
>>>> + #address-cells = <0>;
>>>> + #size-cells = <0>;
>>>> +
>>>> + cpu {
>>>> + compatible = "arm,arm926ej-s";
>>>> + device_type = "cpu";
>>>> + };
>>>> + };
>>>> +
>>>> + memory {
>>>> + reg = <0x20000000 0x04000000>;
>>>> + };
>>>> +
>>>> + ahb {
>>>> + compatible = "simple-bus";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + ranges;
>>>> +
>>>> + apb {
>>>> + compatible = "simple-bus";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + ranges;
>>>> +
>>>> + tcb0: timer@fffa0000 {
>>>> + compatible = "atmel,at91rm9200-tcb";
>>>> + reg = <0xfffa0000 0x100>;
>>>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
>>>> + 17 IRQ_TYPE_LEVEL_HIGH 0
>>>> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
>>>> + };
>>>> +
>>>> + mmc0: mmc@fffa4000 {
>>>> + compatible = "atmel,hsmci";
>>>> + reg = <0xfffa4000 0x600>;
>>>> + interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + pinctrl-names = "default";
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + i2c0: i2c@fffa8000 {
>>>> + compatible = "atmel,at91sam9260-i2c";
>>>> + reg = <0xfffa8000 0x100>;
>>>> + interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + i2c1: i2c@fffac000 {
>>>> + compatible = "atmel,at91sam9260-i2c";
>>>> + reg = <0xfffac000 0x100>;
>>>> + interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + usart0: serial@fffb0000 {
>>>> + compatible = "atmel,at91sam9260-usart";
>>>> + reg = <0xfffb0000 0x200>;
>>>> + interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
>>>> + atmel,use-dma-rx;
>>>> + atmel,use-dma-tx;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_usart0>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + usart1: serial@fffb4000 {
>>>> + compatible = "atmel,at91sam9260-usart";
>>>> + reg = <0xfffb4000 0x200>;
>>>> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
>>>> + atmel,use-dma-rx;
>>>> + atmel,use-dma-tx;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_usart1>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + usart2: serial@fffb8000 {
>>>> + compatible = "atmel,at91sam9260-usart";
>>>> + reg = <0xfffb8000 0x200>;
>>>> + interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
>>>> + atmel,use-dma-rx;
>>>> + atmel,use-dma-tx;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_usart2>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + usart3: serial@fffbc000 {
>>>> + compatible = "atmel,at91sam9260-usart";
>>>> + reg = <0xfffbc000 0x200>;
>>>> + interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
>>>> + atmel,use-dma-rx;
>>>> + atmel,use-dma-tx;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_usart3>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + ssc0: ssc@fffc0000 {
>>>> + compatible = "atmel,at91rm9200-ssc";
>>>> + reg = <0xfffc0000 0x4000>;
>>>> + interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_ssc0_tx
>>>> &pinctrl_ssc0_rx>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + ssc1: ssc@fffc4000 {
>>>> + compatible = "atmel,at91rm9200-ssc";
>>>> + reg = <0xfffc4000 0x4000>;
>>>> + interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_ssc1_tx
>>>> &pinctrl_ssc1_rx>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + spi0: spi@fffcc000 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + compatible = "atmel,at91rm9200-spi";
>>>> + reg = <0xfffcc000 0x200>;
>>>> + interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_spi0>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + adc0: adc@fffd0000 {
>>>> + compatible = "atmel,at91sam9260-adc";
>>>> + reg = <0xfffd0000 0x100>;
>>>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
>>>> + atmel,adc-use-external-triggers;
>>>> + atmel,adc-channels-used = <0xf>;
>>>> + atmel,adc-vref = <3300>;
>>>> + atmel,adc-num-channels = <4>;
>>>> + atmel,adc-startup-time = <15>;
>>>> + atmel,adc-channel-base = <0x30>;
>>>> + atmel,adc-drdy-mask = <0x10000>;
>>>> + atmel,adc-status-register = <0x1c>;
>>>> + atmel,adc-trigger-register = <0x04>;
>>>> + atmel,adc-res = <8 10>;
>>>> + atmel,adc-res-names = "lowres", "highres";
>>>> + atmel,adc-use-res = "highres";
>>>> +
>>>> + trigger@0 {
>>>> + trigger-name = "timer-counter-0";
>>>> + trigger-value = <0x1>;
>>>> + };
>>>> + trigger@1 {
>>>> + trigger-name = "timer-counter-1";
>>>> + trigger-value = <0x3>;
>>>> + };
>>>> +
>>>> + trigger@2 {
>>>> + trigger-name = "timer-counter-2";
>>>> + trigger-value = <0x5>;
>>>> + };
>>>> +
>>>> + trigger@3 {
>>>> + trigger-name = "external";
>>>> + trigger-value = <0x13>;
>>>> + trigger-external;
>>>> + };
>>>> + };
>>>> +
>>>> + usb0: gadget@fffd4000 {
>>>> + compatible = "atmel,at91rm9200-udc";
>>>> + reg = <0xfffd4000 0x4000>;
>>>> + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + ramc0: ramc@ffffea00 {
>>>> + compatible = "atmel,at91sam9260-sdramc";
>>>> + reg = <0xffffea00 0x200>;
>>>> + };
>>>> +
>>>> + aic: interrupt-controller@fffff000 {
>>>> + #interrupt-cells = <3>;
>>>> + compatible = "atmel,at91rm9200-aic";
>>>> + interrupt-controller;
>>>> + reg = <0xfffff000 0x200>;
>>>> + atmel,external-irqs = <31>;
>>>> + };
>>>> +
>>>> + dbgu: serial@fffff200 {
>>>> + compatible = "atmel,at91sam9260-usart";
>>>> + reg = <0xfffff200 0x200>;
>>>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_dbgu>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + pinctrl@fffff400 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + compatible = "atmel,at91rm9200-pinctrl",
>>>> "simple-bus";
>>>> + ranges = <0xfffff400 0xfffff400 0x800>;
>>>> +
>>>> + atmel,mux-mask = <
>>>> + /* A B */
>>>> + 0xffffffff 0xe05c6738 /* pioA */
>>>> + 0xffffffff 0x0000c780 /* pioB */
>>>> + 0xffffffff 0xe3ffff0e /* pioC */
>>>> + 0x003fffff 0x0001ff3c /* pioD */
>>>> + >;
>>>> +
>>>> + /* shared pinctrl settings */
>>>> + dbgu {
>>>> + pinctrl_dbgu: dbgu-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 21
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOA 22
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>>> + };
>>>> + };
>>>> +
>>>> + usart0 {
>>>> + pinctrl_usart0: usart0-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 6
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOA 7
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>>> + };
>>>> +
>>>> + pinctrl_usart0_rts: usart0_rts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 9
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart0_cts: usart0_cts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 10
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart0_dtr_dsr:
>>>> usart0_dtr_dsr-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 14
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOD 15
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart0_dcd: usart0_dcd-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 16
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart0_ri: usart0_ri-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 17
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart0_sck: usart0_sck-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 8
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + usart1 {
>>>> + pinctrl_usart1: usart1-0 {
>>>> + atmel,pins =
>>>> + /*TODO check pullup
>>>> necessary*/
>>>> + <AT91_PIOA 11
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOA 12
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart1_rts: usart1_rts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 18
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart1_cts: usart1_cts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 19
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart1_sck: usart1_sck-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 2
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + usart2 {
>>>> + pinctrl_usart2: usart2-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 13
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOA 14
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart2_rts: usart2_rts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 29
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart2_cts: usart2_cts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 30
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart2_sck: usart2_sck-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 9
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + usart3 {
>>>> + pinctrl_usart3: usart3-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOB 0
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOB 1
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart3_rts: usart3_rts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 4
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart3_cts: usart3_cts-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 3
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_usart3_sck: usart3_sck-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 20
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + nand {
>>>> + pinctrl_nand: nand-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 17
>>>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOB 6
>>>> AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
>>>> + };
>>>> +
>>>> + pinctrl_nand0_ale_cle:
>>>> nand_ale_cle-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOB 2
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOB 3
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_nand0_oe_we: nand_oe_we-0
>>>> {
>>>> + atmel,pins =
>>>> + <AT91_PIOB 4
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOB 5
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_nand0_cs: nand_cs-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOB 6
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + mmc0 {
>>>> + pinctrl_mmc0_clk: mmc0_clk-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 2
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_mmc0_slot0_cmd_dat0:
>>>> mmc0_slot0_cmd_dat0-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 0
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOA 1
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>>> + };
>>>> +
>>>> + pinctrl_mmc0_slot0_dat1_3:
>>>> mmc0_slot0_dat1_3-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 3
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOA 4
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP
>>>> + AT91_PIOA 5
>>>> AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
>>>> + };
>>>> + };
>>>> +
>>>> + ssc0 {
>>>> + pinctrl_ssc0_tx: ssc0_tx-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 15
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOC 0
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOC 1
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_ssc0_rx: ssc0_rx-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 10
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>>> + AT91_PIOA 16
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOA 22
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + ssc1 {
>>>> + pinctrl_ssc1_tx: ssc1_tx-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 13
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>>> + AT91_PIOA 29
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>>> + AT91_PIOA 30
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_ssc1_rx: ssc1_rx-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 8
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>>> + AT91_PIOA 9
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE
>>>> + AT91_PIOA 14
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + spi0 {
>>>> + pinctrl_spi0: spi0-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 25
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOA 26
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE
>>>> + AT91_PIOA 27
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + i2c_gpio0 {
>>>> + pinctrl_i2c_gpio0: i2c_gpio0-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOA 23
>>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
>>>> + AT91_PIOA 24
>>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
>>>> + };
>>>> + };
>>>> +
>>>> + i2c_gpio1 {
>>>> + pinctrl_i2c_gpio1: i2c_gpio1-0 {
>>>> + atmel,pins =
>>>> + <AT91_PIOD 10
>>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
>>>> + AT91_PIOD 11
>>>> AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
>>>> + };
>>>> + };
>>>> +
>>>> + tcb0 {
>>>> + pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
>>>> + atmel,pins = <AT91_PIOA 3
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
>>>> + atmel,pins = <AT91_PIOC 31
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
>>>> + atmel,pins = <AT91_PIOD 21
>>>> AT91_PERIPH_A AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
>>>> + atmel,pins = <AT91_PIOA 4
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
>>>> + atmel,pins = <AT91_PIOC 29
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
>>>> + atmel,pins = <AT91_PIOD 10
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
>>>> + atmel,pins = <AT91_PIOA 5
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
>>>> + atmel,pins = <AT91_PIOC 30
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> +
>>>> + pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
>>>> + atmel,pins = <AT91_PIOD 11
>>>> AT91_PERIPH_B AT91_PINCTRL_NONE>;
>>>> + };
>>>> + };
>>>> +
>>>> + pioA: gpio@fffff400 {
>>>> + compatible =
>>>> "atmel,at91rm9200-gpio";
>>>> + reg = <0xfffff400 0x200>;
>>>> + interrupts = <2
>>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>>> + #gpio-cells = <2>;
>>>> + gpio-controller;
>>>> + interrupt-controller;
>>>> + #interrupt-cells = <2>;
>>>> + };
>>>> +
>>>> + pioB: gpio@fffff600 {
>>>> + compatible =
>>>> "atmel,at91rm9200-gpio";
>>>> + reg = <0xfffff600 0x200>;
>>>> + interrupts = <3
>>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>>> + #gpio-cells = <2>;
>>>> + gpio-controller;
>>>> + interrupt-controller;
>>>> + #interrupt-cells = <2>;
>>>> + };
>>>> +
>>>> + pioC: gpio@fffff800 {
>>>> + compatible =
>>>> "atmel,at91rm9200-gpio";
>>>> + reg = <0xfffff800 0x200>;
>>>> + interrupts = <4
>>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>>> + #gpio-cells = <2>;
>>>> + gpio-controller;
>>>> + interrupt-controller;
>>>> + #interrupt-cells = <2>;
>>>> + };
>>>> +
>>>> + pioD: gpio@fffffa00 {
>>>> + compatible =
>>>> "atmel,at91rm9200-gpio";
>>>> + reg = <0xfffffa00 0x200>;
>>>> + interrupts = <5
>>>> IRQ_TYPE_LEVEL_HIGH 1>;
>>>> + #gpio-cells = <2>;
>>>> + gpio-controller;
>>>> + interrupt-controller;
>>>> + #interrupt-cells = <2>;
>>>> + };
>>>> + };
>>>> +
>>>> + pmc: pmc@fffffc00 {
>>>> + compatible = "atmel,at91rm9200-pmc";
>>>> + reg = <0xfffffc00 0x100>;
>>>> + };
>>>> +
>>>> + rstc@fffffd00 {
>>>> + compatible = "atmel,at91sam9260-rstc";
>>>> + reg = <0xfffffd00 0x10>;
>>>> + };
>>>> +
>>>> + shdwc@fffffd10 {
>>>> + compatible = "atmel,at91sam9260-shdwc";
>>>> + reg = <0xfffffd10 0x10>;
>>>> + };
>>>> +
>>>> + pit: timer@fffffd30 {
>>>> + compatible = "atmel,at91sam9260-pit";
>>>> + reg = <0xfffffd30 0xf>;
>>>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>>>> + };
>>>> +
>>>> + watchdog@fffffd40 {
>>>> + compatible = "atmel,at91sam9260-wdt";
>>>> + reg = <0xfffffd40 0x10>;
>>>> + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>>>> + status = "disabled";
>>>> + };
>>>> + };
>>>> +
>>>> + nand0: nand@40000000 {
>>>> + compatible = "atmel,at91rm9200-nand";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + reg = <0x40000000 0x10000000
>>>> + 0xffffe800 0x200
>>>> + >;
>>>> + atmel,nand-addr-offset = <21>;
>>>> + atmel,nand-cmd-offset = <22>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_nand>;
>>>> + gpios = <&pioD 17 GPIO_ACTIVE_HIGH
>>>> + &pioB 6 GPIO_ACTIVE_HIGH
>>>> + 0
>>>> + >;
>>>> + status = "disabled";
>>>> + };
>>>> + };
>>>> +
>>>> + i2c@0 {
>>>> + compatible = "i2c-gpio";
>>>> + gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
>>>> + &pioA 24 GPIO_ACTIVE_HIGH /* scl */
>>>> + >;
>>>> + i2c-gpio,sda-open-drain;
>>>> + i2c-gpio,scl-open-drain;
>>>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_i2c_gpio0>;
>>>> + status = "disabled";
>>>> + };
>>>> +
>>>> + i2c@1 {
>>>> + compatible = "i2c-gpio";
>>>> + gpios = <&pioD 10 GPIO_ACTIVE_HIGH /* sda */
>>>> + &pioD 11 GPIO_ACTIVE_HIGH /* scl */
>>>> + >;
>>>> + i2c-gpio,sda-open-drain;
>>>> + i2c-gpio,scl-open-drain;
>>>> + i2c-gpio,delay-us = <2>; /* ~100 kHz */
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pinctrl_i2c_gpio1>;
>>>> + status = "disabled";
>>>> + };
>>>> +};
>>>> diff --git a/arch/arm/mach-at91/at91sam9rl.c
>>>> b/arch/arm/mach-at91/at91sam9rl.c
>>>> index 3651517abedf..d6ee8bb47213 100644
>>>> --- a/arch/arm/mach-at91/at91sam9rl.c
>>>> +++ b/arch/arm/mach-at91/at91sam9rl.c
>>>
>>> I would have splitted this patch in 2 different patches:
>>> 1) define at91sam9rl DT clock lookup entries
>>> 2) add at91sam9rl DT SoC support
>>>
>>>
>>>> @@ -196,6 +196,22 @@ static struct clk_lookup periph_clocks_lookups[] = {
>>>> CLKDEV_CON_ID("pioB", &pioB_clk),
>>>> CLKDEV_CON_ID("pioC", &pioC_clk),
>>>> CLKDEV_CON_ID("pioD", &pioD_clk),
>>>> + /* more lookup table for DT entries */
>>>> + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
>>>> + CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
>>>> + CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
>>>> + CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
>>>> + CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
>>>> + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
>>>> + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
>>>> + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
>>>> + CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
>>>> + CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
>>>> + CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
>>>> + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
>>>> + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
>>>> + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
>>>> + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
>>>> };
>>>> static struct clk_lookup usart_clocks_lookups[] = {
>>>
>>>
>>> _______________________________________________
>>> linux-arm-kernel mailing list
>>> [email protected]
>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>
>
--
Nicolas Ferre
Hi Mark,
On 19/02/2014 18:54, Mark Rutland wrote:
> On Wed, Feb 19, 2014 at 05:31:42PM +0000, Alexandre Belloni wrote:
>> On 19/02/2014 at 17:00:20 +0000, Mark Rutland wrote :
>>> On Wed, Feb 19, 2014 at 03:32:24PM +0000, Alexandre Belloni wrote:
>>>> This adds preliminary DT support for the at91sam9rl.
>>>>
>>>> Signed-off-by: Alexandre Belloni <[email protected]>
>>>> ---
>>>> arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
>>>> arch/arm/mach-at91/at91sam9rl.c | 16 +
>>>> 2 files changed, 644 insertions(+)
>>>> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>>>
>>> [...]
>>>
>>>> + tcb0: timer@fffa0000 {
>>>> + compatible = "atmel,at91rm9200-tcb";
>>>> + reg = <0xfffa0000 0x100>;
>>>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
>>>> + 17 IRQ_TYPE_LEVEL_HIGH 0
>>>> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
>>>> + };
>>> Nit: please bracket list entries individually. Also for other list
>>> properties like reg and (*-)gpio(s).
>>>
>> OK.
>>
>>> [...]
>>>
>>>> + adc0: adc@fffd0000 {
>>>> + compatible = "atmel,at91sam9260-adc";
>>>> + reg = <0xfffd0000 0x100>;
>>>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
>>>> + atmel,adc-use-external-triggers;
>>>> + atmel,adc-channels-used = <0xf>;
>>>> + atmel,adc-vref = <3300>;
>>>> + atmel,adc-num-channels = <4>;
>>>> + atmel,adc-startup-time = <15>;
>>>> + atmel,adc-channel-base = <0x30>;
>>>> + atmel,adc-drdy-mask = <0x10000>;
>>>> + atmel,adc-status-register = <0x1c>;
>>>> + atmel,adc-trigger-register = <0x04>;
>>>> + atmel,adc-res = <8 10>;
>>>> + atmel,adc-res-names = "lowres", "highres";
>>>> + atmel,adc-use-res = "highres";
>>>> +
>>>> + trigger@0 {
>>>> + trigger-name = "timer-counter-0";
>>>> + trigger-value = <0x1>;
>>>> + };
>>> A unit-address should go with a reg value. Either this needs a reg and
>>> the parent node needs #address-cells and #size-cells, or the
>>> unit-address should go, and the names made unique through other means.
>>>
>> OK, I guess I'll have to fix
>> Documentation/devicetree/bindings/arm/atmel-adc.txt too.
> Yes please.
>
>>> [...]
>>>
>>>> + pinctrl@fffff400 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
>>> NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
>>> both; that doesn't make any sense.
>>>
>> Simply a copy paste, I'll fix that here and also the 6 other atmel
>> dtsi includes.
>>
>> What is your preference for those using:
>> compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ?
> A node should by either a bus or a pinctrl node.
>
> If it has chidren then the simple-bus should be separated out into a
> separate node. If there are no children simple-bus should go.
Doing this clearly break backward compatibility (the current pinctrl
drivers relies on
gpio controller being subnodes of the pinctrl node), but I'm interested
in how you would
have represented this.
Could you give us an example ?
>
> Cheers,
> Mark.
On 20/02/2014 09:59, Boris BREZILLON :
> Hi Mark,
>
> On 19/02/2014 18:54, Mark Rutland wrote:
>> On Wed, Feb 19, 2014 at 05:31:42PM +0000, Alexandre Belloni wrote:
>>> On 19/02/2014 at 17:00:20 +0000, Mark Rutland wrote :
>>>> On Wed, Feb 19, 2014 at 03:32:24PM +0000, Alexandre Belloni wrote:
>>>>> This adds preliminary DT support for the at91sam9rl.
>>>>>
>>>>> Signed-off-by: Alexandre Belloni <[email protected]>
>>>>> ---
>>>>> arch/arm/boot/dts/at91sam9rl.dtsi | 628 ++++++++++++++++++++++++++++++++++++++
>>>>> arch/arm/mach-at91/at91sam9rl.c | 16 +
>>>>> 2 files changed, 644 insertions(+)
>>>>> create mode 100644 arch/arm/boot/dts/at91sam9rl.dtsi
>>>>
>>>> [...]
>>>>
>>>>> + tcb0: timer@fffa0000 {
>>>>> + compatible = "atmel,at91rm9200-tcb";
>>>>> + reg = <0xfffa0000 0x100>;
>>>>> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0
>>>>> + 17 IRQ_TYPE_LEVEL_HIGH 0
>>>>> + 18 IRQ_TYPE_LEVEL_HIGH 0>;
>>>>> + };
>>>> Nit: please bracket list entries individually. Also for other list
>>>> properties like reg and (*-)gpio(s).
>>>>
>>> OK.
>>>
>>>> [...]
>>>>
>>>>> + adc0: adc@fffd0000 {
>>>>> + compatible = "atmel,at91sam9260-adc";
>>>>> + reg = <0xfffd0000 0x100>;
>>>>> + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
>>>>> + atmel,adc-use-external-triggers;
>>>>> + atmel,adc-channels-used = <0xf>;
>>>>> + atmel,adc-vref = <3300>;
>>>>> + atmel,adc-num-channels = <4>;
>>>>> + atmel,adc-startup-time = <15>;
>>>>> + atmel,adc-channel-base = <0x30>;
>>>>> + atmel,adc-drdy-mask = <0x10000>;
>>>>> + atmel,adc-status-register = <0x1c>;
>>>>> + atmel,adc-trigger-register = <0x04>;
>>>>> + atmel,adc-res = <8 10>;
>>>>> + atmel,adc-res-names = "lowres", "highres";
>>>>> + atmel,adc-use-res = "highres";
>>>>> +
>>>>> + trigger@0 {
>>>>> + trigger-name = "timer-counter-0";
>>>>> + trigger-value = <0x1>;
>>>>> + };
>>>> A unit-address should go with a reg value. Either this needs a reg and
>>>> the parent node needs #address-cells and #size-cells, or the
>>>> unit-address should go, and the names made unique through other means.
>>>>
>>> OK, I guess I'll have to fix
>>> Documentation/devicetree/bindings/arm/atmel-adc.txt too.
>> Yes please.
>>
>>>> [...]
>>>>
>>>>> + pinctrl@fffff400 {
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <1>;
>>>>> + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
>>>> NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
>>>> both; that doesn't make any sense.
>>>>
>>> Simply a copy paste, I'll fix that here and also the 6 other atmel
>>> dtsi includes.
>>>
>>> What is your preference for those using:
>>> compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ?
>> A node should by either a bus or a pinctrl node.
>>
>> If it has chidren then the simple-bus should be separated out into a
>> separate node. If there are no children simple-bus should go.
>
> Doing this clearly break backward compatibility (the current pinctrl
> drivers relies on
> gpio controller being subnodes of the pinctrl node), but I'm interested
> in how you would
> have represented this.
Guys, just be warned, I do not plan to rework or even push for a rework
of the pinctrl driver anytime soon.
So I am afraid but you will have to live with this DT representation of
pinctrl for quite some time (even if it doesn't make sense, sorry Mark)...
> Could you give us an example ?
>
>
>>
>> Cheers,
>> Mark.
>
>
>
--
Nicolas Ferre
Hi Mark,
On 20/02/2014 at 10:12:32 +0100, Nicolas Ferre wrote :
> >>>> NAK. Either this is a atmel,at91rm9200-pinctrl node or a simple-bus. Not
> >>>> both; that doesn't make any sense.
> >>>>
> >>> Simply a copy paste, I'll fix that here and also the 6 other atmel
> >>> dtsi includes.
> >>>
> >>> What is your preference for those using:
> >>> compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ?
> >> A node should by either a bus or a pinctrl node.
> >>
> >> If it has chidren then the simple-bus should be separated out into a
> >> separate node. If there are no children simple-bus should go.
> >
> > Doing this clearly break backward compatibility (the current pinctrl
> > drivers relies on
> > gpio controller being subnodes of the pinctrl node), but I'm interested
> > in how you would
> > have represented this.
>
> Guys, just be warned, I do not plan to rework or even push for a rework
> of the pinctrl driver anytime soon.
>
> So I am afraid but you will have to live with this DT representation of
> pinctrl for quite some time (even if it doesn't make sense, sorry Mark)...
>
Those bindings have been merged in july 2012 and like others, I fear we
will definitely have to break backward compatibility when reworking
those. So, in light of what Nicolas said, I've sent v3 taking into
account all your other comments.
I believe we have 3 at91sam9 SoCs that will enter the DT world for 3.15.
I suggest that we finish the DT and CCF transition then we'll take some
time to rework the pinctrl driver.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com