From: "Alvin (Weike) Chen" <[email protected]>
Hi,
Intel Quark X1000 consists of one SDIO host controller which can be PCI enumerated.
SDHCI-PCI layer doesn't support it. Thus, we add support for Intel Quark X1000 SDIO as well.
Derek Browne (1):
Quark SDIO host controller
drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++
drivers/mmc/host/sdhci-pci.h | 1 +
2 files changed, 13 insertions(+)
--
1.7.9.5
From: Derek Browne <[email protected]>
This patch is to enable SDIO host controller for Intel Quark X1000.
Signed-off-by: Derek Browne <[email protected]>
Signed-off-by: Alvin (Weike) Chen <[email protected]>
---
changelog v2:
*Delete '#define PCI_DEVICE_ID_INTEL_QUARK_ILB 0x095E' from 'include/linux/pci_ids.h'.
*Move '#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7' from 'include/linux/pci_ids.h'
to 'driver/mmc/host/sdhci-pci.h'.
*Update the subject and description.
drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++
drivers/mmc/host/sdhci-pci.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 52c42fc..1aeeefc 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -103,6 +103,10 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
};
+static const struct sdhci_pci_fixes sdhci_intel_qrk = {
+ .quirks = SDHCI_QUIRK_NO_HISPD_BIT,
+};
+
static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
{
slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
@@ -753,6 +757,14 @@ static const struct pci_device_id pci_ids[] = {
{
.vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_QRK_SD,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_MRST_SD0,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h
index 6d71871..c101477 100644
--- a/drivers/mmc/host/sdhci-pci.h
+++ b/drivers/mmc/host/sdhci-pci.h
@@ -17,6 +17,7 @@
#define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
#define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
#define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
+#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
/*
* PCI registers
--
1.7.9.5
On 24 June 2014 15:56, Chen, Alvin <[email protected]> wrote:
> From: Derek Browne <[email protected]>
>
> This patch is to enable SDIO host controller for Intel Quark X1000.
>
> Signed-off-by: Derek Browne <[email protected]>
> Signed-off-by: Alvin (Weike) Chen <[email protected]>
Thanks! Applied for next.
Kind regards
Uffe
> ---
> changelog v2:
> *Delete '#define PCI_DEVICE_ID_INTEL_QUARK_ILB 0x095E' from 'include/linux/pci_ids.h'.
> *Move '#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7' from 'include/linux/pci_ids.h'
> to 'driver/mmc/host/sdhci-pci.h'.
> *Update the subject and description.
>
> drivers/mmc/host/sdhci-pci.c | 12 ++++++++++++
> drivers/mmc/host/sdhci-pci.h | 1 +
> 2 files changed, 13 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
> index 52c42fc..1aeeefc 100644
> --- a/drivers/mmc/host/sdhci-pci.c
> +++ b/drivers/mmc/host/sdhci-pci.c
> @@ -103,6 +103,10 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
> SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
> };
>
> +static const struct sdhci_pci_fixes sdhci_intel_qrk = {
> + .quirks = SDHCI_QUIRK_NO_HISPD_BIT,
> +};
> +
> static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
> {
> slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
> @@ -753,6 +757,14 @@ static const struct pci_device_id pci_ids[] = {
>
> {
> .vendor = PCI_VENDOR_ID_INTEL,
> + .device = PCI_DEVICE_ID_INTEL_QRK_SD,
> + .subvendor = PCI_ANY_ID,
> + .subdevice = PCI_ANY_ID,
> + .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
> + },
> +
> + {
> + .vendor = PCI_VENDOR_ID_INTEL,
> .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
> .subvendor = PCI_ANY_ID,
> .subdevice = PCI_ANY_ID,
> diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h
> index 6d71871..c101477 100644
> --- a/drivers/mmc/host/sdhci-pci.h
> +++ b/drivers/mmc/host/sdhci-pci.h
> @@ -17,6 +17,7 @@
> #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
> #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
> #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
> +#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
>
> /*
> * PCI registers
> --
> 1.7.9.5
>
> --
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