This small series adds a flag that allows to specify that a DSI device supports
non-continuous clock mode, and uses it in the Tegra DSI driver to only enable
this mode on panels that support it. Until now, the Tegra DSI driver
unconditionally enabled non-continuous mode, which prevented continous-mode-only
panels from working with it.
This allows us to enable the panel embedded in NVIDIA SHIELD and which only
supports continuous mode.
Changes since v2:
- Changed the flag to enable non-continuous behavior instead of the contrary,
to match the DSI spec more closely and highlight the fact continuous behavior
is the default
Changes since v1:
- Removed unneeded regulator-always-on property for vdd_lcd regulator
Alexandre Courbot (4):
drm/dsi: Flag for non-continuous clock behavior
drm/panel: Set non-continuous clock flag on supporting panels
drm/tegra: dsi - Handle non-continuous clock flag
ARM: tegra: roth: add display DT node
arch/arm/boot/dts/tegra114-roth.dts | 22 +++++++++++++++++++---
drivers/gpu/drm/panel/panel-simple.c | 5 +++--
drivers/gpu/drm/tegra/dsi.c | 3 ++-
include/drm/drm_mipi_dsi.h | 2 ++
4 files changed, 26 insertions(+), 6 deletions(-)
--
2.0.0
As per section 5.6.1 of the DSI specification, all DSI transmitters must
support continuous clock behavior on the clock lane, while non-continuous
mode support is only optional. Add a flag that allows devices to indicate
that they support non-continuous clock mode so host drivers can adapt
their behavior accordingly.
Signed-off-by: Alexandre Courbot <[email protected]>
---
include/drm/drm_mipi_dsi.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 944f33f..efa1b55 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -94,6 +94,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8)
/* disable EoT packets in HS mode */
#define MIPI_DSI_MODE_EOT_PACKET BIT(9)
+/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
+#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
enum mipi_dsi_pixel_format {
MIPI_DSI_FMT_RGB888,
--
2.0.0
Handle the MIPI_DSI_CLOCK_NONCONTINUOUS flag and only set TX-only
clock behavior when this flag is present to allow panels requiring
continuous clock mode to operate with this driver.
Signed-off-by: Alexandre Courbot <[email protected]>
---
drivers/gpu/drm/tegra/dsi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index bd56f2a..eadfeaf 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -474,7 +474,8 @@ static int tegra_output_dsi_enable(struct tegra_output *output)
tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);
value = tegra_dsi_readl(dsi, DSI_CONTROL);
- value |= DSI_CONTROL_HS_CLK_CTRL;
+ if (dsi->flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+ value |= DSI_CONTROL_HS_CLK_CTRL;
value &= ~DSI_CONTROL_TX_TRIG(3);
value &= ~DSI_CONTROL_DCS_ENABLE;
value |= DSI_CONTROL_VIDEO_ENABLE;
--
2.0.0
Tegra DSI support has been fixed to support continuous clock behavior that
the panel used on SHIELD requires, so finally add its device tree node
since it is functional.
Signed-off-by: Alexandre Courbot <[email protected]>
---
arch/arm/boot/dts/tegra114-roth.dts | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
index d20898e..78df4ee 100644
--- a/arch/arm/boot/dts/tegra114-roth.dts
+++ b/arch/arm/boot/dts/tegra114-roth.dts
@@ -28,6 +28,22 @@
reg = <0x80000000 0x79600000>;
};
+ host1x@50000000 {
+ dsi@54300000 {
+ status = "okay";
+
+ vdd-supply = <&vdd_1v2_ap>;
+
+ panel@0 {
+ compatible = "lg,lh500wx1-sd03";
+ reg = <0>;
+
+ power-supply = <&vdd_lcd>;
+ backlight = <&backlight>;
+ };
+ };
+ };
+
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@ -823,7 +839,6 @@
regulator-name = "vdd-1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
- regulator-always-on;
regulator-boot-on;
};
@@ -870,10 +885,11 @@
regulator-name = "vdd-2v8-display";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
+ regulator-always-on;
regulator-boot-on;
};
- ldo3 {
+ vdd_1v2_ap: ldo3 {
regulator-name = "avdd-1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
@@ -1069,7 +1085,7 @@
regulator-boot-on;
};
- regulator@1 {
+ vdd_lcd: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_lcd_1v8";
--
2.0.0
The LG LD070WX3-SL01 and Panasonic VVX10F004B00 are DSI support
non-continuous clock mode. Set the MIPI_DSI_CLOCK_NON_CONTINUOUS
to their definition so host drivers become aware of this capability.
Signed-off-by: Alexandre Courbot <[email protected]>
---
drivers/gpu/drm/panel/panel-simple.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index a251361..869a84e3 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -545,7 +545,7 @@ static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
.height = 151,
},
},
- .flags = MIPI_DSI_MODE_VIDEO,
+ .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
.format = MIPI_DSI_FMT_RGB888,
.lanes = 4,
};
@@ -599,7 +599,8 @@ static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
.height = 136,
},
},
- .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
+ .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS,
.format = MIPI_DSI_FMT_RGB888,
.lanes = 4,
};
--
2.0.0
On Tue, Jul 08, 2014 at 09:32:14PM +0900, Alexandre Courbot wrote:
> Tegra DSI support has been fixed to support continuous clock behavior that
> the panel used on SHIELD requires, so finally add its device tree node
> since it is functional.
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> arch/arm/boot/dts/tegra114-roth.dts | 22 +++++++++++++++++++---
> 1 file changed, 19 insertions(+), 3 deletions(-)
I've applied this to Tegra's for-3.17/dt branch. Thanks.
Thierry
On Fri, Jul 11, 2014 at 10:14 PM, Thierry Reding
<[email protected]> wrote:
> On Tue, Jul 08, 2014 at 09:32:14PM +0900, Alexandre Courbot wrote:
>> Tegra DSI support has been fixed to support continuous clock behavior that
>> the panel used on SHIELD requires, so finally add its device tree node
>> since it is functional.
>>
>> Signed-off-by: Alexandre Courbot <[email protected]>
>> ---
>> arch/arm/boot/dts/tegra114-roth.dts | 22 +++++++++++++++++++---
>> 1 file changed, 19 insertions(+), 3 deletions(-)
>
> I've applied this to Tegra's for-3.17/dt branch. Thanks.
Thanks - how about the other patches of the series? Ideally this one
should be applied last.
On Sun, Jul 13, 2014 at 11:37:14AM +0900, Alexandre Courbot wrote:
> On Fri, Jul 11, 2014 at 10:14 PM, Thierry Reding
> <[email protected]> wrote:
> > On Tue, Jul 08, 2014 at 09:32:14PM +0900, Alexandre Courbot wrote:
> >> Tegra DSI support has been fixed to support continuous clock behavior that
> >> the panel used on SHIELD requires, so finally add its device tree node
> >> since it is functional.
> >>
> >> Signed-off-by: Alexandre Courbot <[email protected]>
> >> ---
> >> arch/arm/boot/dts/tegra114-roth.dts | 22 +++++++++++++++++++---
> >> 1 file changed, 19 insertions(+), 3 deletions(-)
> >
> > I've applied this to Tegra's for-3.17/dt branch. Thanks.
>
> Thanks - how about the other patches of the series? Ideally this one
> should be applied last.
Those will go into separate trees and I haven't gotten to those yet.
I'll probably apply them later today.
Thierry
On Tue, Jul 08, 2014 at 09:32:11PM +0900, Alexandre Courbot wrote:
> As per section 5.6.1 of the DSI specification, all DSI transmitters must
> support continuous clock behavior on the clock lane, while non-continuous
> mode support is only optional. Add a flag that allows devices to indicate
> that they support non-continuous clock mode so host drivers can adapt
> their behavior accordingly.
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> include/drm/drm_mipi_dsi.h | 2 ++
> 1 file changed, 2 insertions(+)
Applied, thanks.
Thierry
On Tue, Jul 08, 2014 at 09:32:12PM +0900, Alexandre Courbot wrote:
> The LG LD070WX3-SL01 and Panasonic VVX10F004B00 are DSI support
> non-continuous clock mode. Set the MIPI_DSI_CLOCK_NON_CONTINUOUS
> to their definition so host drivers become aware of this capability.
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> drivers/gpu/drm/panel/panel-simple.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
Applied, thanks.
Thierry
On Tue, Jul 08, 2014 at 09:32:13PM +0900, Alexandre Courbot wrote:
> Handle the MIPI_DSI_CLOCK_NONCONTINUOUS flag and only set TX-only
> clock behavior when this flag is present to allow panels requiring
> continuous clock mode to operate with this driver.
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> drivers/gpu/drm/tegra/dsi.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Applied, thanks.
Thierry