2014-12-10 08:46:53

by Vivek Gautam

Subject: [PATCH 1/2] Documentation: dt-bindings: Add aliases information for Exynos7 pin controllers

Adding list of aliases for supported Exynos7 pin controller blocks.

Signed-off-by: Vivek Gautam <[email protected]>
Cc: Tomasz Figa <[email protected]>
Cc: Linus Walleij <[email protected]>
---
.../devicetree/bindings/pinctrl/samsung-pinctrl.txt | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index 8425838..742e472 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -171,6 +171,16 @@ Aliases:
All the pin controller nodes should be represented in the aliases node using
the following format 'pinctrl{n}' where n is a unique number for the alias.

+Aliases for controllers compatible with "samsung,exynos7-pinctrl":
+- pinctrl0: pin controller of ALIVE block,
+- pinctrl1: pin controller of BUS0 block,
+- pinctrl2: pin controller of NFC block,
+- pinctrl3: pin controller of TOUCH block,
+- pinctrl4: pin controller of FF block,
+- pinctrl5: pin controller of ESE block,
+- pinctrl6: pin controller of FSYS0 block,
+- pinctrl7: pin controller of FSYS1 block,
+
Example: A pin-controller node with pin banks:

pinctrl_0: pinctrl@11400000 {
--
1.7.10.4

2014-12-10 08:47:05

by Vivek Gautam

Subject: [PATCH V3 2/2] pinctrl: exynos: Add BUS1 pin controller for exynos7

USB and Power regulator on Exynos7 require gpios available
in BUS1 pin controller block.
So adding the BUS1 pinctrl support.

Signed-off-by: Naveen Krishna Ch <[email protected]>
Signed-off-by: Vivek Gautam <[email protected]>
Cc: Tomasz Figa <[email protected]>
Cc: Linus Walleij <[email protected]>
---

Changes since V2:
- Added documentation on alias for BUS1 pin controller block.

Changes since V1:
- Added support for all pin banks which are part of BUS1 pin controller.

.../devicetree/bindings/pinctrl/samsung-pinctrl.txt | 1 +
drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++
2 files changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index 742e472..c88ba35 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -180,6 +180,7 @@ Aliases for controllers compatible with "samsung,exynos7-pinctrl":
- pinctrl5: pin controller of ESE block,
- pinctrl6: pin controller of FSYS0 block,
- pinctrl7: pin controller of FSYS1 block,
+- pinctrl8: pin controller of BUS1 block,

Example: A pin-controller node with pin banks:

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d5d4cfc..44e60dc 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
};

+/* pin banks of exynos7 pin-controller - BUS1 */
+static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
+ EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
+ EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
+ EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
+ EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c),
+ EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
+ EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14),
+ EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18),
+ EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c),
+ EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
+ EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24),
+};
+
const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
{
/* pin-controller instance 0 Alive data */
@@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
.pin_banks = exynos7_pin_banks7,
.nr_banks = ARRAY_SIZE(exynos7_pin_banks7),
.eint_gpio_init = exynos_eint_gpio_init,
+ }, {
+ /* pin-controller instance 8 BUS1 data */
+ .pin_banks = exynos7_pin_banks8,
+ .nr_banks = ARRAY_SIZE(exynos7_pin_banks8),
+ .eint_gpio_init = exynos_eint_gpio_init,
},
};
--
1.7.10.4

2014-12-28 11:23:34

by Tomasz Figa

Subject: Re: [PATCH V3 2/2] pinctrl: exynos: Add BUS1 pin controller for exynos7

On 10.12.2014 17:39, Vivek Gautam wrote:
> USB and Power regulator on Exynos7 require gpios available
> in BUS1 pin controller block.
> So adding the BUS1 pinctrl support.
>
> Signed-off-by: Naveen Krishna Ch <[email protected]>
> Signed-off-by: Vivek Gautam <[email protected]>
> Cc: Tomasz Figa <[email protected]>
> Cc: Linus Walleij <[email protected]>
> ---
>
> Changes since V2:
> - Added documentation on alias for BUS1 pin controller block.
>
> Changes since V1:
> - Added support for all pin banks which are part of BUS1 pin controller.
>
> .../devicetree/bindings/pinctrl/samsung-pinctrl.txt | 1 +
> drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++++++++++++++++++
> 2 files changed, 20 insertions(+)

Acked-by: Tomasz Figa <[email protected]>

Best regards,
Tomasz