This version of the patchset does not contain the interrupt router
driver anymore (MSCM). The driver has been sent in a seperate
patchset with GIC (Cortex-A5) support only:
https://lkml.org/lkml/2014/12/16/454
This patchset extends the NVIC driver to support irq domain
hierarchy and the MSCM driver to support NVIC as a parent irq
controller.
I'm happy with the outcome of the MSCM driver, the irq domain
hierarchy support has proven to work with GIC and NVIC as
intendet.
This version also does not add any new architecture or SoC anymore.
Instead, it allows to select ARCH_MULTIPLATFORM in the !MMU case
and add ARCH_MULTI_V7M as a new CPU choice. This change is based
on patches found in Arnd's git tree, however, it tries to allow
MULTIPLATFORM with !MMU in a way which should not allow to make
other selections than before (except ARCH_MULTI_V7M of course).
This makes ARCH_MXC and SOC_VF610 available for the !MMU CPU V7M.
With a small change, SOC_VF610 is now useable for the Cortex-M4
CPU too.
The patchset has proven to be working on the Cortex-A5 as well as
on the Cortex-M4 of the Vybrid SoC.
Changes since v1:
- Remove MSCM driver
- Support irq domain hierarchy with NVIC irq controller
- Extend MSCM interrupt router with NVIC as parent in the irq
domain hierarchy
- Rebased on v3.19-rc1 with MSCM driver
- NVIC: Register only the amount of IRQ's which vectors are
available for
Changes since RFC:
- Unified addruart calls for MMU/!MMU
- Add MSCM support along with routable IRQ support in NVIC
- Rebased on Shawns for-next tree which made some changes
obsolete (mainly the Vybrid SoC device tree files in for-next
are already prepared for Cortex-M4 support)
- Removed SRC_GPR3 hack, this is now part of a mini boot-loader:
https://github.com/falstaff84/vf610m4bootldr
Arnd Bergmann (1):
ARM: efm32: move into multiplatform
Stefan Agner (11):
genirq: generic chip: support hierarchy domain
irqchip: nvic: support hierarchy irq domain
irqchip: vf610-mscm: support NVIC parent
irqchip: nvic: increase number of external interrupts to 112
clocksource: add dependencies for Vybrid pit clocksource
ARM: unify MMU/!MMU addruart calls
ARM: imx: depend MXC debug board on 3DS machines
ARM: allow MULTIPLATFORM with !MMU
ARM: vf610: enable Cortex-M4 on Vybrid SoC
ARM: dts: add support for Vybrid running on Cortex-M4
ARM: vf610m4: add defconfig for Linux on Vybrids Cortex-M4
Documentation/devicetree/bindings/arm/fsl.txt | 3 ++
arch/arm/Kconfig | 56 +++++++++++++--------------
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/vf610m4-colibri.dts | 52 +++++++++++++++++++++++++
arch/arm/boot/dts/vf610m4.dtsi | 10 +++++
arch/arm/configs/efm32_defconfig | 2 +
arch/arm/configs/vf610m4_defconfig | 53 +++++++++++++++++++++++++
arch/arm/include/debug/efm32.S | 2 +-
arch/arm/kernel/debug.S | 2 +-
arch/arm/kernel/entry-v7m.S | 8 ++--
arch/arm/mach-imx/Kconfig | 37 +++++++++++-------
arch/arm/mach-imx/Makefile.boot | 0
arch/arm/mach-imx/mach-vf610.c | 1 +
drivers/clocksource/Kconfig | 2 +
drivers/irqchip/irq-nvic.c | 37 +++++++++++++++++-
drivers/irqchip/irq-vf610-mscm.c | 31 ++++++++++++---
kernel/irq/generic-chip.c | 5 +--
17 files changed, 243 insertions(+), 59 deletions(-)
create mode 100644 arch/arm/boot/dts/vf610m4-colibri.dts
create mode 100644 arch/arm/boot/dts/vf610m4.dtsi
create mode 100644 arch/arm/configs/vf610m4_defconfig
create mode 100644 arch/arm/mach-imx/Makefile.boot
--
2.2.1
Add support for hierarchy irq domain. Use to support the interrupt
router found in Vybrid SoC, which is between the NVIC and the
peripherals.
Signed-off-by: Stefan Agner <[email protected]>
---
drivers/irqchip/irq-nvic.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
index 4ff0805..5fac910 100644
--- a/drivers/irqchip/irq-nvic.c
+++ b/drivers/irqchip/irq-nvic.c
@@ -49,6 +49,31 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
handle_IRQ(irq, regs);
}
+static int nvic_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ int i, ret;
+ irq_hw_number_t hwirq;
+ unsigned int type = IRQ_TYPE_NONE;
+ struct of_phandle_args *irq_data = arg;
+
+ ret = irq_domain_xlate_onecell(domain, irq_data->np, irq_data->args,
+ irq_data->args_count, &hwirq, &type);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < nr_irqs; i++)
+ irq_map_generic_chip(domain, virq + i, hwirq + i);
+
+ return 0;
+}
+
+static const struct irq_domain_ops nvic_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .alloc = nvic_irq_domain_alloc,
+ .free = irq_domain_free_irqs_top,
+};
+
static int __init nvic_of_init(struct device_node *node,
struct device_node *parent)
{
@@ -70,7 +95,8 @@ static int __init nvic_of_init(struct device_node *node,
irqs = NVIC_MAX_IRQ;
nvic_irq_domain =
- irq_domain_add_linear(node, irqs, &irq_generic_chip_ops, NULL);
+ irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL);
+
if (!nvic_irq_domain) {
pr_warn("Failed to allocate irq domain\n");
return -ENOMEM;
--
2.2.1
In order to support SoC with heterogenous CPU architectures (such
as Freescale Vybrid/i.MXSX) it is preferable to use the same
architecture (ARCH_MXC in this case) for the MMU enabled and !MMU
CPU. Hence allow to select MULTIPLATFORM even without MMU.
Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/Kconfig | 21 ++++++++++-----------
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 97d07ed..95007b9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -228,7 +228,7 @@ config VECTORS_BASE
in size.
config ARM_PATCH_PHYS_VIRT
- bool "Patch physical to virtual translations at runtime" if EMBEDDED
+ bool "Patch physical to virtual translations at runtime" if EMBEDDED || (ARCH_MULTIPLATFORM && MMU)
default y
depends on !XIP_KERNEL && MMU
depends on !ARCH_REALVIEW || !SPARSEMEM
@@ -303,15 +303,12 @@ config MMU
#
choice
prompt "ARM system type"
- default ARCH_VERSATILE if !MMU
- default ARCH_MULTIPLATFORM if MMU
+ default ARCH_MULTIPLATFORM
config ARCH_MULTIPLATFORM
bool "Allow multiple platforms to be selected"
- depends on MMU
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_HAS_SG_CHAIN
- select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR
select CLKSRC_OF
select COMMON_CLK
@@ -783,13 +780,13 @@ comment "CPU Core family selection"
config ARCH_MULTI_V4
bool "ARMv4 based platforms (FA526)"
- depends on !ARCH_MULTI_V6_V7
+ depends on !ARCH_MULTI_V6_V7 && MMU
select ARCH_MULTI_V4_V5
select CPU_FA526
config ARCH_MULTI_V4T
bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
- depends on !ARCH_MULTI_V6_V7
+ depends on !ARCH_MULTI_V6_V7 && MMU
select ARCH_MULTI_V4_V5
select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
@@ -797,7 +794,7 @@ config ARCH_MULTI_V4T
config ARCH_MULTI_V5
bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
- depends on !ARCH_MULTI_V6_V7
+ depends on !ARCH_MULTI_V6_V7 && MMU
select ARCH_MULTI_V4_V5
select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
@@ -808,11 +805,13 @@ config ARCH_MULTI_V4_V5
config ARCH_MULTI_V6
bool "ARMv6 based platforms (ARM11)"
+ depends on MMU
select ARCH_MULTI_V6_V7
select CPU_V6K
config ARCH_MULTI_V7
- bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
+ bool "ARMv7-A based platforms (Cortex-A, PJ4, Scorpion, Krait)"
+ depends on MMU
default y
select ARCH_MULTI_V6_V7
select CPU_V7
@@ -823,7 +822,7 @@ config ARCH_MULTI_V6_V7
select MIGHT_HAVE_CACHE_L2X0
config ARCH_MULTI_CPU_AUTO
- def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
+ def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) && MMU
select ARCH_MULTI_V5
endmenu
@@ -1960,7 +1959,7 @@ endchoice
config XIP_KERNEL
bool "Kernel Execute-In-Place from ROM"
- depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
+ depends on !ARM_LPAE && (!ARCH_MULTIPLATFORM || ARCH_MULTI_V7M)
help
Execute-In-Place allows the kernel to run from non-volatile storage
directly addressable by the CPU, such as NOR flash. This saves RAM
--
2.2.1
Support the NVIC interrupt controller as node parent of the MSCM
interrupt router. On the dual-core variants of Vybird (VF6xx), the
NVIC interrupt controller is used by the Cortex-M4. To support
running Linux on this core too, MSCM needs NVIC parent support too.
Signed-off-by: Stefan Agner <[email protected]>
---
drivers/irqchip/irq-vf610-mscm.c | 31 +++++++++++++++++++++++++------
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/drivers/irqchip/irq-vf610-mscm.c b/drivers/irqchip/irq-vf610-mscm.c
index 7a284d5..f4f7d78 100644
--- a/drivers/irqchip/irq-vf610-mscm.c
+++ b/drivers/irqchip/irq-vf610-mscm.c
@@ -30,6 +30,7 @@ struct vf610_mscm_chip_data {
void __iomem *mscm_base;
u16 cpu_mask;
u16 saved_irsprc[MSCM_IRSPRC_NUM];
+ bool is_nvic;
};
static struct vf610_mscm_chip_data *mscm_data;
@@ -74,6 +75,7 @@ static void vf610_mscm_enable(struct irq_data *data)
{
irq_hw_number_t hwirq = data->hwirq;
struct vf610_mscm_chip_data *chip_data = data->chip_data;
+ struct irq_data *parent = data->parent_data;
u16 irsprc;
irsprc = readw_relaxed(chip_data->mscm_base + MSCM_IRSPRC(hwirq));
@@ -84,17 +86,24 @@ static void vf610_mscm_enable(struct irq_data *data)
writew_relaxed(chip_data->cpu_mask,
chip_data->mscm_base + MSCM_IRSPRC(hwirq));
- irq_chip_unmask_parent(data);
+ if (parent->chip->irq_enable)
+ parent->chip->irq_enable(parent);
+ else
+ parent->chip->irq_unmask(parent);
}
static void vf610_mscm_disable(struct irq_data *data)
{
irq_hw_number_t hwirq = data->hwirq;
struct vf610_mscm_chip_data *chip_data = data->chip_data;
+ struct irq_data *parent = data->parent_data;
writew_relaxed(0x0, chip_data->mscm_base + MSCM_IRSPRC(hwirq));
- irq_chip_mask_parent(data);
+ if (parent->chip->irq_enable)
+ parent->chip->irq_disable(parent);
+ else
+ parent->chip->irq_mask(parent);
}
static struct irq_chip vf610_mscm_irq_chip = {
@@ -126,10 +135,17 @@ static int vf610_mscm_domain_alloc(struct irq_domain *domain, unsigned int virq,
domain->host_data);
gic_data.np = domain->parent->of_node;
- gic_data.args_count = 3;
- gic_data.args[0] = GIC_SPI;
- gic_data.args[1] = irq_data->args[0];
- gic_data.args[2] = irq_data->args[1];
+
+ if (mscm_data->is_nvic) {
+ gic_data.args_count = 1;
+ gic_data.args[0] = irq_data->args[0];
+ } else {
+ gic_data.args_count = 3;
+ gic_data.args[0] = GIC_SPI;
+ gic_data.args[1] = irq_data->args[0];
+ gic_data.args[2] = irq_data->args[1];
+ }
+
return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
}
@@ -171,6 +187,9 @@ static int __init vf610_mscm_of_init(struct device_node *node,
goto out_unmap;
}
+ if (of_device_is_compatible(domain->parent->of_node, "arm,armv7m-nvic"))
+ mscm_data->is_nvic = true;
+
mscm_data->cpu_mask = 0x1 << readl_relaxed(mscm_data->mscm_base + MSCM_CPxNUM);
cpu_pm_register_notifier(&mscm_notifier_block);
--
2.2.1
Use the new helper function irq_domain_set_info to make sure the
function irq_domain_set_hwirq_and_chip is being called, which is
crucial to save irqdomain specific data to irq_data.
Signed-off-by: Stefan Agner <[email protected]>
---
kernel/irq/generic-chip.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index 61024e8..15b370d 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -360,7 +360,7 @@ static struct lock_class_key irq_nested_lock_class;
int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
irq_hw_number_t hw_irq)
{
- struct irq_data *data = irq_get_irq_data(virq);
+ struct irq_data *data = irq_domain_get_irq_data(d, virq);
struct irq_domain_chip_generic *dgc = d->gc;
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
@@ -405,8 +405,7 @@ int irq_map_generic_chip(struct irq_domain *d, unsigned int virq,
else
data->mask = 1 << idx;
- irq_set_chip_and_handler(virq, chip, ct->handler);
- irq_set_chip_data(virq, gc);
+ irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL);
irq_modify_status(virq, dgc->irq_flags_to_clear, dgc->irq_flags_to_set);
return 0;
}
--
2.2.1
From: Arnd Bergmann <[email protected]>
Since the multiplatform configuration can support no-MMU kernels now,
there is nothing stopping us from moving the efm32 platform in there
as well. This introduces a new ARCH_MULTI_V7M CPU architecture selection
option, since v7-M is incompatible with v7-A, and we can have either
of the two enabled for multiplatform, but not both at the same time.
Signed-off-by: Arnd Bergmann <[email protected]>
Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/Kconfig | 35 ++++++++++++++++-------------------
arch/arm/configs/efm32_defconfig | 2 ++
2 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 95007b9..8fe035b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -314,7 +314,7 @@ config ARCH_MULTIPLATFORM
select COMMON_CLK
select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_PCI
- select MULTI_IRQ_HANDLER
+ select MULTI_IRQ_HANDLER if !ARCH_MULTI_V7M
select SPARSE_IRQ
select USE_OF
@@ -400,24 +400,6 @@ config ARCH_EBSA110
Ethernet interface, two PCMCIA sockets, two serial ports and a
parallel port.
-config ARCH_EFM32
- bool "Energy Micro efm32"
- depends on !MMU
- select ARCH_REQUIRE_GPIOLIB
- select ARM_NVIC
- select AUTO_ZRELADDR
- select CLKSRC_OF
- select COMMON_CLK
- select CPU_V7M
- select GENERIC_CLOCKEVENTS
- select NO_DMA
- select NO_IOPORT_MAP
- select SPARSE_IRQ
- select USE_OF
- help
- Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
- processors.
-
config ARCH_EP93XX
bool "EP93xx-based"
select ARCH_HAS_HOLES_MEMORYMODEL
@@ -778,6 +760,14 @@ menu "Multiple platform selection"
comment "CPU Core family selection"
+config ARCH_MULTI_V7M
+ bool "ARMv7-M based platforms (Cortex-M)"
+ depends on !MMU && !(ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7)
+ select CPU_V7M
+ select ARM_NVIC
+ select NO_DMA # for now
+ select NO_IOPORT_MAP # for now
+
config ARCH_MULTI_V4
bool "ARMv4 based platforms (FA526)"
depends on !ARCH_MULTI_V6_V7 && MMU
@@ -834,6 +824,13 @@ config ARCH_VIRT
select ARM_PSCI
select HAVE_ARM_ARCH_TIMER
+config ARCH_EFM32
+ bool "Energy Micro efm32" if ARCH_MULTI_V7M
+ depends on !MMU
+ help
+ Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
+ processors.
+
#
# This is sorted alphabetically by mach-* pathname. However, plat-*
# Kconfigs may be included either alphabetically (according to the
diff --git a/arch/arm/configs/efm32_defconfig b/arch/arm/configs/efm32_defconfig
index f59fffb..7bd2486 100644
--- a/arch/arm/configs/efm32_defconfig
+++ b/arch/arm/configs/efm32_defconfig
@@ -16,6 +16,8 @@ CONFIG_EMBEDDED=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_MMU is not set
+# CONFIG_ARCH_MULTI_V7 is not set
+CONFIG_ARCH_MULTI_V7M=y
CONFIG_ARCH_EFM32=y
# CONFIG_KUSER_HELPERS is not set
CONFIG_SET_MEM_PARAM=y
--
2.2.1
This patch allows to build the Kernel for Vybrid (VF6xx) SoC
when ARMv7-M CPU is selected. The resulting image runs on the
secondary Cortex-M4 core. This core has equally access to all
peripherals as the main Cortex-A5 core. However, there is no
resource control mechanism, hence when both cores are used
simultaneously, orthogonal device tree's are required.
The boot CPU is dependent on the SoC variant, however the
commonly available boards use variants where the Cortex-A5 is
the primary/boot CPU. Booting the secondary Cortex-M4 CPU
needs SoC specific register written. There is no in kernel
support for this right now, a external userspace utility
called "m4boot" can be used to boot the kernel:
m4boot xipImage initramfs.cpio.lzo vf610m4-colibri.dtb
Signed-off-by: Stefan Agner <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.txt | 3 +++
arch/arm/mach-imx/Kconfig | 36 +++++++++++++++++----------
arch/arm/mach-imx/Makefile.boot | 0
arch/arm/mach-imx/mach-vf610.c | 1 +
4 files changed, 27 insertions(+), 13 deletions(-)
create mode 100644 arch/arm/mach-imx/Makefile.boot
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index c830b5b..f396088 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -81,12 +81,15 @@ Freescale Vybrid Platform Device Tree Bindings
For the Vybrid SoC familiy all variants with DDR controller are supported,
which is the VF5xx and VF6xx series. Out of historical reasons, in most
places the kernel uses vf610 to refer to the whole familiy.
+The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
+core support.
Required root node compatible property (one of them):
- compatible = "fsl,vf500";
- compatible = "fsl,vf510";
- compatible = "fsl,vf600";
- compatible = "fsl,vf610";
+ - compatible = "fsl,vf610m4";
Freescale LS1021A Platform Device Tree Bindings
------------------------------------------------
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 96c8eb8..4f26942 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,5 +1,5 @@
menuconfig ARCH_MXC
- bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
+ bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARCH_MULTI_V7M
select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM
select CLKSRC_MMIO
@@ -558,9 +558,11 @@ config MACH_VPR200
endif
+comment "Device tree only"
+
if ARCH_MULTI_V7
-comment "Device tree only"
+comment "Cortex-A platforms"
config SOC_IMX5
bool
@@ -630,10 +632,28 @@ config SOC_IMX6SX
help
This enables support for Freescale i.MX6 SoloX processor.
+
+config SOC_LS1021A
+ bool "Freescale LS1021A support"
+ select ARM_GIC
+ select HAVE_ARM_ARCH_TIMER
+ select PCI_DOMAINS if PCI
+ select ZONE_DMA if ARM_LPAE
+
+ help
+ This enable support for Freescale LS1021A processor.
+
+endif
+
+comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms"
+
+if ARCH_MULTI_V7 || ARCH_MULTI_V7M
+
config SOC_VF610
bool "Vybrid Family VF610 support"
select VF610_MSCM
- select ARM_GIC
+ select ARM_GIC if ARCH_MULTI_V7
+ select ARM_NVIC if ARCH_MULTI_V7M
select PINCTRL_VF610
select PL310_ERRATA_769419 if CACHE_L2X0
@@ -660,16 +680,6 @@ choice
endchoice
-config SOC_LS1021A
- bool "Freescale LS1021A support"
- select ARM_GIC
- select HAVE_ARM_ARCH_TIMER
- select PCI_DOMAINS if PCI
- select ZONE_DMA if ARM_LPAE
-
- help
- This enable support for Freescale LS1021A processor.
-
endif
source "arch/arm/mach-imx/devices/Kconfig"
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
new file mode 100644
index 0000000..e69de29
diff --git a/arch/arm/mach-imx/mach-vf610.c b/arch/arm/mach-imx/mach-vf610.c
index 2e7c75b..b20f6c1 100644
--- a/arch/arm/mach-imx/mach-vf610.c
+++ b/arch/arm/mach-imx/mach-vf610.c
@@ -17,6 +17,7 @@ static const char * const vf610_dt_compat[] __initconst = {
"fsl,vf510",
"fsl,vf600",
"fsl,vf610",
+ "fsl,vf610m4",
NULL,
};
--
2.2.1
This adds an initial device tree to run Linux on the Cortex-M4 on
the Vybrid based Colibri VF61.
Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/vf610m4-colibri.dts | 52 +++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/vf610m4.dtsi | 10 +++++++
3 files changed, 63 insertions(+)
create mode 100644 arch/arm/boot/dts/vf610m4-colibri.dts
create mode 100644 arch/arm/boot/dts/vf610m4.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 91bd5bd..4211dfb 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -271,6 +271,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
ls1021a-twr.dtb \
vf500-colibri-eval-v3.dtb \
vf610-colibri-eval-v3.dtb \
+ vf610m4-colibri.dtb \
vf610-cosmic.dtb \
vf610-twr.dtb
dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
diff --git a/arch/arm/boot/dts/vf610m4-colibri.dts b/arch/arm/boot/dts/vf610m4-colibri.dts
new file mode 100644
index 0000000..ebff03e
--- /dev/null
+++ b/arch/arm/boot/dts/vf610m4-colibri.dts
@@ -0,0 +1,52 @@
+/*
+ * Device tree for Colibri VF61 Cortex-M4 support
+ *
+ * Copyright 2014 Stefan Agner
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "vf610m4.dtsi"
+
+/ {
+ model = "VF610 Cortex-M4";
+ compatible = "fsl,vf610m4";
+
+ chosen {
+ bootargs = "console=ttyLP2,115200 clk_ignore_unused init=/linuxrc rw";
+ };
+
+ memory {
+ reg = <0x8c000000 0x3000000>;
+ };
+};
+
+&esdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esdhc1>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&iomuxc {
+ vf610-colibri {
+ pinctrl_esdhc1: esdhc1grp {
+ fsl,pins = <
+ VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
+ VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
+ VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
+ VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
+ VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
+ VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
+ VF610_PAD_PTB20__GPIO_42 0x219d
+ >;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/vf610m4.dtsi b/arch/arm/boot/dts/vf610m4.dtsi
new file mode 100644
index 0000000..3d8fa02
--- /dev/null
+++ b/arch/arm/boot/dts/vf610m4.dtsi
@@ -0,0 +1,10 @@
+/*
+ * Device tree for VF6xx Cortex-M4 support
+ */
+
+#include "armv7-m.dtsi"
+#include "vfxxx.dtsi"
+
+&mscm {
+ interrupt-parent = <&nvic>;
+};
--
2.2.1
Add defconfig for Linux on Vybrid (vf610) on the secondary Cortex-
M4 CPU. The use of a XIP image has been tested which needs to be
loaded (e.g. using the custom m4boot loader) to the end of the
available RAM at address 0x8f000000. The Cortex-M4 has a code-alias
which makes sure that the instructions get fetched through the code
bus (alias starts at 0x00800000 => 0x80800000 in system address).
Hence, to get optimal performance, use 0x0f000000 as XIP_PHYS_ADDR.
This address is additionally shifted by the length of the minimal
loader which is inserted by m4boot. Currently, this offset is 0x80.
The standard DRAM base address is configured to 0x8C000000, which
gives the Cortex-M4 48MiB of RAM.
Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/configs/vf610m4_defconfig | 53 ++++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 arch/arm/configs/vf610m4_defconfig
diff --git a/arch/arm/configs/vf610m4_defconfig b/arch/arm/configs/vf610m4_defconfig
new file mode 100644
index 0000000..392bc1d
--- /dev/null
+++ b/arch/arm/configs/vf610m4_defconfig
@@ -0,0 +1,53 @@
+CONFIG_NAMESPACES=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZ4 is not set
+# CONFIG_KALLSYMS is not set
+CONFIG_EMBEDDED=y
+# CONFIG_MMU is not set
+CONFIG_ARCH_MULTI_V7M=y
+CONFIG_ARCH_MXC=y
+CONFIG_SOC_VF610=y
+CONFIG_VF_USE_PIT_TIMER=y
+CONFIG_SET_MEM_PARAM=y
+CONFIG_DRAM_BASE=0x8c000000
+CONFIG_FLASH_MEM_BASE=0x8f000000
+CONFIG_FLASH_SIZE=0x01000000
+CONFIG_CMDLINE="console=/dev/ttyLP2"
+CONFIG_XIP_KERNEL=y
+CONFIG_XIP_PHYS_ADDR=0x0f000080
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_SUSPEND is not set
+# CONFIG_UEVENT_HELPER is not set
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+# CONFIG_ALLOW_DEV_COREDUMP is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_XIP=y
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_FSL_LPUART=y
+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_HID is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_EXT4_FS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_FTRACE is not set
+# CONFIG_CRYPTO_HW is not set
--
2.2.1
Depend the MXC debug board on machines which actually support it.
Signed-off-by: Stefan Agner <[email protected]>
---
This configuration appeared lonely when I enabled ARCH_MULTI_V7M.
Afaik, the selection of it only makes sense with one of the supported
boards...
arch/arm/mach-imx/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 3c5859e..96c8eb8 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -21,6 +21,7 @@ config MXC_AVIC
config MXC_DEBUG_BOARD
bool "Enable MXC debug board(for 3-stack)"
+ depends on CONFIG_MACH_MX27_3DS || CONFIG_MACH_MX31_3DS || CONFIG_MACH_MX35_3DS
help
The debug board is an integral part of the MXC 3-stack(PDK)
platforms, it can be attached or removed from the peripheral
--
2.2.1
Add the minimal dependencies required to use the Vybrid PIT
clocksource driver. Those are not part of the SoC dependencies.
Signed-off-by: Stefan Agner <[email protected]>
---
drivers/clocksource/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index fc01ec2..a2eb7a2 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -154,6 +154,8 @@ config FSL_FTM_TIMER
config VF_PIT_TIMER
bool
+ select CLKSRC_MMIO
+ select CLKSRC_OF
help
Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
--
2.2.1
Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.
Signed-off-by: Stefan Agner <[email protected]>
---
arch/arm/include/debug/efm32.S | 2 +-
arch/arm/kernel/debug.S | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/debug/efm32.S b/arch/arm/include/debug/efm32.S
index 2265a19..660fa1e 100644
--- a/arch/arm/include/debug/efm32.S
+++ b/arch/arm/include/debug/efm32.S
@@ -16,7 +16,7 @@
#define UARTn_TXDATA 0x0034
- .macro addruart, rx, tmp
+ .macro addruart, rx, tmp, tmp2
ldr \rx, =(CONFIG_DEBUG_UART_PHYS)
/*
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 78c91b5..ea9646c 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -35,7 +35,7 @@
#else /* !CONFIG_MMU */
.macro addruart_current, rx, tmp1, tmp2
- addruart \rx, \tmp1
+ addruart \rx, \tmp1, \tmp2
.endm
#endif /* CONFIG_MMU */
--
2.2.1
So far, only vectors for up to 48 external interrupts have been
allocated in the vector table. The first 16 vectors of the vector
table are reserved for internal exceptions (Reset, SVC...). The
external interrupts start at offset 16. Hence, by increasing the
vector table to 128 vectors, we increase the amount of vectors
reserved for external interrupts to 112. Also, only register the
amount of IRQ's we have vectors available for.
Note: the vector table must align to the number of entries in the
vector table, hence increase the alignment to 0x200.
Signed-off-by: Stefan Agner <[email protected]>
---
When I started developing, I added UART0 with IRQ 61 to the device
tree. The framework happily accepted that, even though only 48
vectors for external interrupts were available. This was the
initial reason I added the WARN (in v1). However, when thinking
about it, just registering the amount of IRQ's actually supported
according to the vector table makes much more sense, since this
would warn the user on the offending IRQ's request call...
arch/arm/kernel/entry-v7m.S | 8 ++++----
drivers/irqchip/irq-nvic.c | 9 +++++++++
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index 2260f18..c38a5e5 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -115,9 +115,9 @@ ENTRY(__switch_to)
ENDPROC(__switch_to)
.data
- .align 8
+ .align 9
/*
- * Vector table (64 words => 256 bytes natural alignment)
+ * Vector table (128 words => 512 bytes natural alignment)
*/
ENTRY(vector_table)
.long 0 @ 0 - Reset stack pointer
@@ -136,6 +136,6 @@ ENTRY(vector_table)
.long __invalid_entry @ 13 - Reserved
.long __pendsv_entry @ 14 - PendSV
.long __invalid_entry @ 15 - SysTick
- .rept 64 - 16
- .long __irq_entry @ 16..64 - External Interrupts
+ .rept 128 - 16
+ .long __irq_entry @ 16..128 - External Interrupts
.endr
diff --git a/drivers/irqchip/irq-nvic.c b/drivers/irqchip/irq-nvic.c
index 5fac910..740cc55 100644
--- a/drivers/irqchip/irq-nvic.c
+++ b/drivers/irqchip/irq-nvic.c
@@ -38,6 +38,11 @@
* 16 irqs.
*/
#define NVIC_MAX_IRQ ((NVIC_MAX_BANKS - 1) * 32 + 16)
+/*
+ * Number of IRQ's supported is limited by the size of the vector table
+ * defined in entry-v7m.S
+ */
+#define NVIC_MAX_IRQ_VECTORS (128 - 16)
static struct irq_domain *nvic_irq_domain;
@@ -46,6 +51,8 @@ nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs)
{
unsigned int irq = irq_linear_revmap(nvic_irq_domain, hwirq);
+ BUG_ON(hwirq >= NVIC_MAX_IRQ_VECTORS);
+
handle_IRQ(irq, regs);
}
@@ -93,6 +100,8 @@ static int __init nvic_of_init(struct device_node *node,
irqs = numbanks * 32;
if (irqs > NVIC_MAX_IRQ)
irqs = NVIC_MAX_IRQ;
+ if (irqs > NVIC_MAX_IRQ_VECTORS)
+ irqs = NVIC_MAX_IRQ_VECTORS;
nvic_irq_domain =
irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL);
--
2.2.1
Hello.
On 12/30/2014 2:32 AM, Stefan Agner wrote:
> Depend the MXC debug board on machines which actually support it.
> Signed-off-by: Stefan Agner <[email protected]>
> ---
> This configuration appeared lonely when I enabled ARCH_MULTI_V7M.
> Afaik, the selection of it only makes sense with one of the supported
> boards...
> arch/arm/mach-imx/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index 3c5859e..96c8eb8 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -21,6 +21,7 @@ config MXC_AVIC
>
> config MXC_DEBUG_BOARD
> bool "Enable MXC debug board(for 3-stack)"
> + depends on CONFIG_MACH_MX27_3DS || CONFIG_MACH_MX31_3DS || CONFIG_MACH_MX35_3DS
CONFIG_ prefixes are not needed in Kconfig.
[...]
WBR, Sergei
On Mon, Dec 29, 2014 at 5:32 PM, Stefan Agner <[email protected]> wrote:
> In order to support SoC with heterogenous CPU architectures (such
> as Freescale Vybrid/i.MXSX) it is preferable to use the same
> architecture (ARCH_MXC in this case) for the MMU enabled and !MMU
> CPU. Hence allow to select MULTIPLATFORM even without MMU.
This has been submitted before[1], but you obviously have a better
reason now. I also need this for my Versatile series to fix
allnoconfig. However, there are some issues with your implementation.
> Signed-off-by: Stefan Agner <[email protected]>
> ---
> arch/arm/Kconfig | 21 ++++++++++-----------
> 1 file changed, 10 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 97d07ed..95007b9 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -228,7 +228,7 @@ config VECTORS_BASE
> in size.
>
> config ARM_PATCH_PHYS_VIRT
> - bool "Patch physical to virtual translations at runtime" if EMBEDDED
> + bool "Patch physical to virtual translations at runtime" if EMBEDDED || (ARCH_MULTIPLATFORM && MMU)
> default y
> depends on !XIP_KERNEL && MMU
> depends on !ARCH_REALVIEW || !SPARSEMEM
> @@ -303,15 +303,12 @@ config MMU
> #
> choice
> prompt "ARM system type"
> - default ARCH_VERSATILE if !MMU
> - default ARCH_MULTIPLATFORM if MMU
> + default ARCH_MULTIPLATFORM
>
> config ARCH_MULTIPLATFORM
> bool "Allow multiple platforms to be selected"
> - depends on MMU
> select ARCH_WANT_OPTIONAL_GPIOLIB
> select ARM_HAS_SG_CHAIN
> - select ARM_PATCH_PHYS_VIRT
> select AUTO_ZRELADDR
> select CLKSRC_OF
> select COMMON_CLK
> @@ -783,13 +780,13 @@ comment "CPU Core family selection"
>
> config ARCH_MULTI_V4
> bool "ARMv4 based platforms (FA526)"
> - depends on !ARCH_MULTI_V6_V7
> + depends on !ARCH_MULTI_V6_V7 && MMU
This is not right. !MMU does not mean the ARM arch does not have an
MMU, but rather the MMU is already setup with identity mapping (or
some other static mapping).
Rob
[1] http://patchwork.ozlabs.org/patch/278996/
On 2014-12-30 22:42, Rob Herring wrote:
> On Mon, Dec 29, 2014 at 5:32 PM, Stefan Agner <[email protected]> wrote:
>> In order to support SoC with heterogenous CPU architectures (such
>> as Freescale Vybrid/i.MXSX) it is preferable to use the same
>> architecture (ARCH_MXC in this case) for the MMU enabled and !MMU
>> CPU. Hence allow to select MULTIPLATFORM even without MMU.
>
> This has been submitted before[1], but you obviously have a better
> reason now. I also need this for my Versatile series to fix
> allnoconfig. However, there are some issues with your implementation.
>
>> Signed-off-by: Stefan Agner <[email protected]>
>> ---
>> arch/arm/Kconfig | 21 ++++++++++-----------
>> 1 file changed, 10 insertions(+), 11 deletions(-)
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index 97d07ed..95007b9 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -228,7 +228,7 @@ config VECTORS_BASE
>> in size.
>>
>> config ARM_PATCH_PHYS_VIRT
>> - bool "Patch physical to virtual translations at runtime" if EMBEDDED
>> + bool "Patch physical to virtual translations at runtime" if EMBEDDED || (ARCH_MULTIPLATFORM && MMU)
>> default y
>> depends on !XIP_KERNEL && MMU
>> depends on !ARCH_REALVIEW || !SPARSEMEM
>> @@ -303,15 +303,12 @@ config MMU
>> #
>> choice
>> prompt "ARM system type"
>> - default ARCH_VERSATILE if !MMU
>> - default ARCH_MULTIPLATFORM if MMU
>> + default ARCH_MULTIPLATFORM
>>
>> config ARCH_MULTIPLATFORM
>> bool "Allow multiple platforms to be selected"
>> - depends on MMU
>> select ARCH_WANT_OPTIONAL_GPIOLIB
>> select ARM_HAS_SG_CHAIN
>> - select ARM_PATCH_PHYS_VIRT
>> select AUTO_ZRELADDR
>> select CLKSRC_OF
>> select COMMON_CLK
>> @@ -783,13 +780,13 @@ comment "CPU Core family selection"
>>
>> config ARCH_MULTI_V4
>> bool "ARMv4 based platforms (FA526)"
>> - depends on !ARCH_MULTI_V6_V7
>> + depends on !ARCH_MULTI_V6_V7 && MMU
>
> This is not right. !MMU does not mean the ARM arch does not have an
> MMU, but rather the MMU is already setup with identity mapping (or
> some other static mapping).
Yes, I'm aware of that. However, there are several configuration
depending on "!MMU". Allowing !MMU on ARCH_MULTI_V4...V7 would open up
new combination of configurations... This patch avoids this as much as
possible, by making !MMU only available for ARCH_MULTI_V7M.
I'm not sure what tests/verification would be expected before allowing
those new configurations... Personally, I also don't see much value in
allowing these configurations.
--
Stefan
>
> Rob
>
> [1] http://patchwork.ozlabs.org/patch/278996/
On Tuesday 30 December 2014 23:02:31 Stefan Agner wrote:
> On 2014-12-30 22:42, Rob Herring wrote:
> > On Mon, Dec 29, 2014 at 5:32 PM, Stefan Agner <[email protected]> wrote:
> >> @@ -783,13 +780,13 @@ comment "CPU Core family selection"
> >>
> >> config ARCH_MULTI_V4
> >> bool "ARMv4 based platforms (FA526)"
> >> - depends on !ARCH_MULTI_V6_V7
> >> + depends on !ARCH_MULTI_V6_V7 && MMU
> >
> > This is not right. !MMU does not mean the ARM arch does not have an
> > MMU, but rather the MMU is already setup with identity mapping (or
> > some other static mapping).
>
> Yes, I'm aware of that. However, there are several configuration
> depending on "!MMU". Allowing !MMU on ARCH_MULTI_V4...V7 would open up
> new combination of configurations... This patch avoids this as much as
> possible, by making !MMU only available for ARCH_MULTI_V7M.
>
> I'm not sure what tests/verification would be expected before allowing
> those new configurations... Personally, I also don't see much value in
> allowing these configurations.
There is a much bigger question to be answered here. Traditionally we
have allowed non-MMU configurations for all platforms, but with the
introduction of multiplatform support, that was implicitly dropped
for each platform that got converted. This was not really intended, but
we also never got complaints from users that were missing functionality
as a result of this.
In 3.19, we have also removed support for the last ARMv4 platform that
did not have an MMU (Atmel at91x40), so now we have four classes of
nommu systems remaining:
a) ARMv7-M: Cortex-M3 and M4 based platforms. We definitely need to
support these, as that is the entire point of your series and other
users want it too.
b) ARMv7-R and ARMv7-A with MMU disabled: This is almost supported by
the kernel, except we don't have any platform using it. ARMv7-R
support is probably useful if anybody invests the time to make it
work, and being able to test those kernels on ARMv7-A hardware also
seems worthwhile.
c) Out of mainline ARMv4t/ARMv5 platforms (based on arm7tdmi, arm9tdmi,
arm9e, arm740t, arm940t, arm946e, or some unsupported Faraday or
Marvell core), in theory also ARM Integrator with the respective
core tiles. It may just be time now to remove this support from the
kernel, as practically everyone with those cores is already stuck
on ancient kernels, maybe with the exception of Russell's OKI platform
port.
I've asked around at conferences among people that are still interested
in NOMMU hardware in general, and apparently running modern kernels
on this class of hardware isn't interesting to anyone I found.
c) Any other hardware with MMU disabled. I personally don't see a reason
to keep it, but maybe I'm just not creative enough. I have an old
patch series to get this to compile for random configurations that
are currently broken. If we keep this enabled, we should at least
get allmodconfig with MMU disabled to build.
Arnd