This patchset fixes a number of bugs in the Broadcom Kona pwm driver. It also
fixes a bug in the pwm core where the state was incorrect on failed calls to
enable.
Changes from v3:
- Removed setting the pwm set to disabled if enable fails. This is now
done in the pwm core.
- Removed previous change in kona_pwmc_config() that returned right away if
the state was disabled. The loop needs to execute to ensure that the period
and duty cycle are valid. Delaying this check to when the pwm is enabled is
incorrect.
- Added comments to clarify code.
- Changed commit messages to more accurately reflect the code changes.
Jonathan Richardson (3):
pwm: kona: Fix incorrect config, disable, and polarity procedures
pwm: kona: Remove setting default smooth type and polarity for all
channels
pwm: core: Set enable state properly on failed call to enable
drivers/pwm/core.c | 10 +++-
drivers/pwm/pwm-bcm-kona.c | 116 ++++++++++++++++++++++++++++++++++++--------
2 files changed, 104 insertions(+), 22 deletions(-)
--
1.7.9.5
Setting the default polarity in probe to normal for all channels caused
the speaker pwm channel to click. The polarity does need to be set to
normal because the hw default is inversed whereas the pwm framework
defaults to normal. If a channel is enabled without setting the polarity
then the signal would be inversed while linux reports normal. A check
is now done prior to enabling the channel to ensure that the hw polarity
matches the desired polarity and is changed if there is a discrepency. This
prevents unnecessary settings being applied to unused channels but still
ensures the correct polarity to be set.
Reviewed-by: Scott Branden <[email protected]>
Tested-by: Scott Branden <[email protected]>
Signed-off-by: Jonathan Richardson <[email protected]>
---
drivers/pwm/pwm-bcm-kona.c | 41 ++++++++++++++++++++++++++++++++++++-----
1 file changed, 36 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-bcm-kona.c b/drivers/pwm/pwm-bcm-kona.c
index 5ae4bf7..34d434a 100644
--- a/drivers/pwm/pwm-bcm-kona.c
+++ b/drivers/pwm/pwm-bcm-kona.c
@@ -95,6 +95,32 @@ static void kona_pwmc_apply_settings(struct kona_pwmc *kp, unsigned int chan)
ndelay(400);
}
+static void kona_pwmc_check_set_polarity(struct pwm_chip *chip,
+ struct pwm_device *pwm)
+{
+ struct kona_pwmc *kp = to_kona_pwmc(chip);
+ unsigned int chan = pwm->hwpwm;
+ enum pwm_polarity polarity = pwm->polarity;
+ unsigned int hw_pol;
+ unsigned int value = 0;
+
+ value = hw_pol = readl(kp->base + PWM_CONTROL_OFFSET);
+ hw_pol = (hw_pol >> PWM_CONTROL_POLARITY_SHIFT(chan)) & 0x1;
+
+ /*
+ * If current polarity not the same as h/w then set polarity so that
+ * they match.
+ */
+ if (!hw_pol != polarity) {
+ if (polarity == PWM_POLARITY_NORMAL)
+ value |= 1 << PWM_CONTROL_POLARITY_SHIFT(chan);
+ else
+ value &= ~(1 << PWM_CONTROL_POLARITY_SHIFT(chan));
+
+ writel(value, kp->base + PWM_CONTROL_OFFSET);
+ }
+}
+
static int kona_pwmc_config(struct pwm_chip *chip, struct pwm_device *pwm,
int duty_ns, int period_ns)
{
@@ -165,6 +191,14 @@ static int kona_pwmc_config(struct pwm_chip *chip, struct pwm_device *pwm,
* validated immediately instead of on enable.
*/
if (test_bit(PWMF_ENABLED, &pwm->flags)) {
+ /*
+ * Ensure polarity is set properly. The default value
+ * for h/w and the PWM framework are different. If a
+ * channel is enabled without setting the polarity, the
+ * default value would be inconsistent to the signal.
+ */
+ kona_pwmc_check_set_polarity(chip, pwm);
+
value = readl(kp->base + PWM_CONTROL_OFFSET);
/*
@@ -311,12 +345,9 @@ static int kona_pwmc_probe(struct platform_device *pdev)
return ret;
}
- /* Set smooth mode, push/pull, and normal polarity for all channels */
- for (chan = 0; chan < kp->chip.npwm; chan++) {
- value |= (1 << PWM_CONTROL_SMOOTH_SHIFT(chan));
+ /* Set push/pull for all channels */
+ for (chan = 0; chan < kp->chip.npwm; chan++)
value |= (1 << PWM_CONTROL_TYPE_SHIFT(chan));
- value |= (1 << PWM_CONTROL_POLARITY_SHIFT(chan));
- }
writel(value, kp->base + PWM_CONTROL_OFFSET);
--
1.7.9.5
The pwm_enable function didn't clear the enabled bit if a call to a
clients enable function returned an error. The result was that the state
of the pwm core was wrong. Clearing the bit when enable returns an error
ensures the state is properly set.
Signed-off-by: Jonathan Richardson <[email protected]>
---
drivers/pwm/core.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c
index 966497d..641f6ec 100644
--- a/drivers/pwm/core.c
+++ b/drivers/pwm/core.c
@@ -457,8 +457,14 @@ EXPORT_SYMBOL_GPL(pwm_set_polarity);
*/
int pwm_enable(struct pwm_device *pwm)
{
- if (pwm && !test_and_set_bit(PWMF_ENABLED, &pwm->flags))
- return pwm->chip->ops->enable(pwm->chip, pwm);
+ int err;
+
+ if (pwm && !test_and_set_bit(PWMF_ENABLED, &pwm->flags)) {
+ err = pwm->chip->ops->enable(pwm->chip, pwm);
+ if (err)
+ clear_bit(PWMF_ENABLED, &pwm->flags);
+ return err;
+ }
return pwm ? 0 : -EINVAL;
}
--
1.7.9.5
The config procedure didn't follow the spec which periodically resulted
in failing to enable the output signal. This happened one in ten or
twenty attempts. Following the spec and adding a 400ns delay in the
appropriate locations resolves this problem.
The disable procedure now also follows the spec. The old disable
procedure would result in no change in signal when called.
The polarity procedure no longer applies the settings to change the
output signal because it can't be called when the pwm is enabled anyway.
The polarity is only updated in the control register. The correct
polarity will be applied on enable. The old method of applying changes
would result in no signal when the polarity was changed. The new
apply_settings function would fix this problem but it isn't required
anyway.
Reviewed-by: Arun Ramamurthy <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Tested-by: Scott Branden <[email protected]>
Signed-off-by: Jonathan Richardson <[email protected]>
---
drivers/pwm/pwm-bcm-kona.c | 75 +++++++++++++++++++++++++++++++++++---------
1 file changed, 60 insertions(+), 15 deletions(-)
diff --git a/drivers/pwm/pwm-bcm-kona.c b/drivers/pwm/pwm-bcm-kona.c
index 02bc048..5ae4bf7 100644
--- a/drivers/pwm/pwm-bcm-kona.c
+++ b/drivers/pwm/pwm-bcm-kona.c
@@ -80,15 +80,19 @@ static void kona_pwmc_apply_settings(struct kona_pwmc *kp, unsigned int chan)
{
unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET);
- /* Clear trigger bit but set smooth bit to maintain old output */
- value |= 1 << PWM_CONTROL_SMOOTH_SHIFT(chan);
- value &= ~(1 << PWM_CONTROL_TRIGGER_SHIFT(chan));
- writel(value, kp->base + PWM_CONTROL_OFFSET);
+ /*
+ * There must be a min 400ns delay between clearing enable and setting
+ * it. Failing to do this may result in no PWM signal.
+ */
+ ndelay(400);
/* Set trigger bit and clear smooth bit to apply new settings */
value &= ~(1 << PWM_CONTROL_SMOOTH_SHIFT(chan));
value |= 1 << PWM_CONTROL_TRIGGER_SHIFT(chan);
writel(value, kp->base + PWM_CONTROL_OFFSET);
+
+ /* PWMOUT_ENABLE must be held high for at least 400 ns. */
+ ndelay(400);
}
static int kona_pwmc_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -121,20 +125,56 @@ static int kona_pwmc_config(struct pwm_chip *chip, struct pwm_device *pwm,
dc = div64_u64(val, div);
/* If duty_ns or period_ns are not achievable then return */
- if (pc < PERIOD_COUNT_MIN || dc < DUTY_CYCLE_HIGH_MIN)
+ if (pc < PERIOD_COUNT_MIN) {
+ dev_warn(chip->dev,
+ "%s: pwm[%d]: period=%d is not achievable, pc=%lu, prescale=%lu\n",
+ __func__, chan, period_ns, pc, prescale);
+ return -EINVAL;
+ }
+
+ /* If duty_ns is not achievable then return */
+ if (dc < DUTY_CYCLE_HIGH_MIN) {
+ if (0 != duty_ns) {
+ dev_warn(chip->dev,
+ "%s: pwm[%d]: duty cycle=%d is not achievable, dc=%lu, prescale=%lu\n",
+ __func__, chan, duty_ns, dc, prescale);
+ }
return -EINVAL;
+ }
/* If pc and dc are in bounds, the calculation is done */
if (pc <= PERIOD_COUNT_MAX && dc <= DUTY_CYCLE_HIGH_MAX)
break;
/* Otherwise, increase prescale and recalculate pc and dc */
- if (++prescale > PRESCALE_MAX)
+ if (++prescale > PRESCALE_MAX) {
+ dev_warn(chip->dev,
+ "%s: pwm[%d]: Prescale (=%lu) within max (=%d) for period=%d and duty cycle=%d is not achievable\n",
+ __func__, chan, prescale, PRESCALE_MAX,
+ period_ns, duty_ns);
return -EINVAL;
+ }
}
- /* If the PWM channel is enabled, write the settings to the HW */
+ dev_dbg(chip->dev, "pwm[%d]: period=%lu, duty_high=%lu, prescale=%lu\n",
+ chan, pc, dc, prescale);
+
+ /*
+ * Don't apply settings if disabled. The period and duty cycle are
+ * always calculated above to ensure the new values are
+ * validated immediately instead of on enable.
+ */
if (test_bit(PWMF_ENABLED, &pwm->flags)) {
+ value = readl(kp->base + PWM_CONTROL_OFFSET);
+
+ /*
+ * Clear trigger bit but set smooth bit to maintain old
+ * output.
+ */
+ value |= 1 << PWM_CONTROL_SMOOTH_SHIFT(chan);
+ value &= ~(1 << PWM_CONTROL_TRIGGER_SHIFT(chan));
+ writel(value, kp->base + PWM_CONTROL_OFFSET);
+
value = readl(kp->base + PRESCALE_OFFSET);
value &= ~PRESCALE_MASK(chan);
value |= prescale << PRESCALE_SHIFT(chan);
@@ -173,11 +213,6 @@ static int kona_pwmc_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm,
writel(value, kp->base + PWM_CONTROL_OFFSET);
- kona_pwmc_apply_settings(kp, chan);
-
- /* Wait for waveform to settle before gating off the clock */
- ndelay(400);
-
clk_disable_unprepare(kp->clk);
return 0;
@@ -207,13 +242,23 @@ static void kona_pwmc_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
struct kona_pwmc *kp = to_kona_pwmc(chip);
unsigned int chan = pwm->hwpwm;
+ unsigned int value = readl(kp->base + PWM_CONTROL_OFFSET);
+
+ /* Set smooth type to 1 and disable */
+ value |= 1 << PWM_CONTROL_SMOOTH_SHIFT(chan);
+ value &= ~(1 << PWM_CONTROL_TRIGGER_SHIFT(chan));
+ writel(value, kp->base + PWM_CONTROL_OFFSET);
/* Simulate a disable by configuring for zero duty */
writel(0, kp->base + DUTY_CYCLE_HIGH_OFFSET(chan));
- kona_pwmc_apply_settings(kp, chan);
+ writel(0, kp->base + PERIOD_COUNT_OFFSET(chan));
- /* Wait for waveform to settle before gating off the clock */
- ndelay(400);
+ /* Set prescale to 0 for this channel */
+ value = readl(kp->base + PRESCALE_OFFSET);
+ value &= ~PRESCALE_MASK(chan);
+ writel(value, kp->base + PRESCALE_OFFSET);
+
+ kona_pwmc_apply_settings(kp, chan);
clk_disable_unprepare(kp->clk);
}
--
1.7.9.5