From: Dinh Nguyen <[email protected]>
Hi,
This patchset enables and tidy up support for the Arria10 devkit. Along with
this patchset and the patch for enabling clocks on the Arria10, the devkit
can boot Linux.
Dinh Nguyen (7):
ARM: socfpga: add cpu1-start-addr for Arria 10
ARM: socfpga: disable the sdmmc, and uart nodes in the base arria10
ARM: socfpga: dts: enable UART1 for the debug uart
ARM: socfpga: rename socdk board file to socdk_sdmmc
ARM: socfpga: Add support for UART1 debug uart for earlyprintk
ARM: socfpga: remove the need to map uart_io_desc
Documentation: DT bindings: add doc for Altera's SoCFPGA platform
Documentation/devicetree/bindings/arm/altera.txt | 14 ++++++++++++
arch/arm/Kconfig.debug | 25 +++++++++++++++------
arch/arm/boot/dts/Makefile | 2 +-
arch/arm/boot/dts/socfpga_arria10.dtsi | 4 ++++
...rria10_socdk.dts => socfpga_arria10_socdk.dtsi} | 6 ++---
arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 26 ++++++++++++++++++++++
arch/arm/mach-socfpga/socfpga.c | 9 --------
7 files changed, 65 insertions(+), 21 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/altera.txt
rename arch/arm/boot/dts/{socfpga_arria10_socdk.dts => socfpga_arria10_socdk.dtsi} (92%)
mode change 100755 => 100644
create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
--
2.2.1
From: Dinh Nguyen <[email protected]>
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 8a05c47..69d616a 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -284,6 +284,7 @@
sysmgr: sysmgr@ffd06000 {
compatible = "altr,sys-mgr", "syscon";
reg = <0xffd06000 0x300>;
+ cpu1-start-addr = <0xffd06230>;
};
/* Local timer */
--
2.2.1
From: Dinh Nguyen <[email protected]>
Add status = "disabled" in the base DTSI for Arria10. The SDMMC and uart
nodes should be enabled in the appropriate board file.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 69d616a..d843609 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -268,6 +268,7 @@
reg = <0xff808000 0x1000>;
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
fifo-depth = <0x400>;
+ status = "disabled";
};
ocram: sram@ffe00000 {
@@ -324,6 +325,7 @@
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
uart1: serial1@ffc02100 {
@@ -332,6 +334,7 @@
interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ status = "disabled";
};
usbphy0: usbphy@0 {
--
2.2.1
From: Dinh Nguyen <[email protected]>
Arria10 devkit is using UART1 for the debug uart port.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/boot/dts/socfpga_arria10_socdk.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/arch/arm/boot/dts/socfpga_arria10_socdk.dts
index 3015ce8..addec61 100755
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dts
@@ -41,7 +41,7 @@
};
};
- serial0@ffc02000 {
+ serial1@ffc02100 {
status = "okay";
};
};
--
2.2.1
From: Dinh Nguyen <[email protected]>
Rename the socfpga_arria10_socdk board file to socfpga_arria10_socdk_sdmmc
as Arria 10 devkit cannot support SDMMC and QSPI at the same time. Thus
we will need to have 2 separate board files, one for SDMMC and one for
QSPI. We also add a new base board dtsi file, socfpga_arria10_socdk.dtsi
so that we use common peripherals for each flavor of the devkits.
Add the sdmmc node to the socfpga_arria10_socdk_sdmmc.dts board file.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/boot/dts/Makefile | 2 +-
...rria10_socdk.dts => socfpga_arria10_socdk.dtsi} | 4 +---
arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts | 26 ++++++++++++++++++++++
3 files changed, 28 insertions(+), 4 deletions(-)
rename arch/arm/boot/dts/{socfpga_arria10_socdk.dts => socfpga_arria10_socdk.dtsi} (94%)
mode change 100755 => 100644
create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..e50441a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -485,7 +485,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
r8a7794-alt.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
- socfpga_arria10_socdk.dtb \
+ socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb \
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
old mode 100755
new mode 100644
similarity index 94%
rename from arch/arm/boot/dts/socfpga_arria10_socdk.dts
rename to arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
index addec61..2791f09
--- a/arch/arm/boot/dts/socfpga_arria10_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2014 Altera Corporation <http://www.altera.com>
+ * Copyright (C) 2015 Altera Corporation <http://www.altera.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -14,8 +14,6 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-
-/dts-v1/;
#include "socfpga_arria10.dtsi"
/ {
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
new file mode 100644
index 0000000..dbbb751
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2014-2015 Altera Corporation <http://www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+#include "socfpga_arria10_socdk.dtsi"
+
+&mmc {
+ status = "okay";
+ num-slots = <1>;
+ broken-cd;
+ bus-width = <4>;
+};
--
2.2.1
From: Dinh Nguyen <[email protected]>
Add support for hardware uart1 for earlyprintk support on Arria10 devkit.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/Kconfig.debug | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 970de75..0e52b92 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -920,13 +920,22 @@ choice
on SA-11x0 UART ports. The kernel will check for the first
enabled UART in a sequence 3-1-2.
- config DEBUG_SOCFPGA_UART
+ config DEBUG_SOCFPGA_UART0
depends on ARCH_SOCFPGA
- bool "Use SOCFPGA UART for low-level debug"
+ bool "Use SOCFPGA UART0 for low-level debug"
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
- on SOCFPGA based platforms.
+ on SOCFPGA(Cyclone 5 and Arria 5) based platforms.
+
+ config DEBUG_SOCFPGA_UART1
+ depends on ARCH_SOCFPGA
+ bool "Use SOCFPGA UART1 for low-level debug"
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on SOCFPGA(Arria 10) based platforms.
+
config DEBUG_SUN9I_UART0
bool "Kernel low-level debugging messages via sun9i UART0"
@@ -1419,7 +1428,8 @@ config DEBUG_UART_PHYS
default 0xfcb00000 if DEBUG_HI3620_UART
default 0xfe800000 if ARCH_IOP32X
default 0xff690000 if DEBUG_RK32_UART2
- default 0xffc02000 if DEBUG_SOCFPGA_UART
+ default 0xffc02000 if DEBUG_SOCFPGA_UART0
+ default 0xffc02100 if DEBUG_SOCFPGA_UART1
default 0xffd82340 if ARCH_IOP13XX
default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0
default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2
@@ -1497,7 +1507,8 @@ config DEBUG_UART_VIRT
default 0xfeb26000 if DEBUG_RK3X_UART1
default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
- default 0xfec02000 if DEBUG_SOCFPGA_UART
+ default 0xfec02000 if DEBUG_SOCFPGA_UART0
+ default 0xfec02100 if DEBUG_SOCFPGA_UART1
default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
@@ -1542,8 +1553,8 @@ config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
- default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \
- ARCH_KEYSTONE || \
+ default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART0 || \
+ DEBUG_SOCFPGA_UART1 || ARCH_KEYSTONE || \
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
DEBUG_DAVINCI_DA8XX_UART2 || \
DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
--
2.2.1
From: Dinh Nguyen <[email protected]>
All the necessary debug uart mapping is already being done in
debug_ll_io_init, there's no need for it here.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/mach-socfpga/socfpga.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index f5e597c..358f2c7 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -39,13 +39,6 @@ static struct map_desc scu_io_desc __initdata = {
.type = MT_DEVICE,
};
-static struct map_desc uart_io_desc __initdata = {
- .virtual = 0xfec02000,
- .pfn = __phys_to_pfn(0xffc02000),
- .length = SZ_8K,
- .type = MT_DEVICE,
-};
-
static void __init socfpga_scu_map_io(void)
{
unsigned long base;
@@ -60,8 +53,6 @@ static void __init socfpga_scu_map_io(void)
static void __init socfpga_map_io(void)
{
socfpga_scu_map_io();
- iotable_init(&uart_io_desc, 1);
- early_printk("Early printk initialized\n");
}
void __init socfpga_sysmgr_init(void)
--
2.2.1
From: Dinh Nguyen <[email protected]>
Document "altr,socfpga-cyclone5", "altr,socfpga-arria5", and
"altr,socfpga-arria10".
Signed-off-by: Dinh Nguyen <[email protected]>
---
Documentation/devicetree/bindings/arm/altera.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/altera.txt
diff --git a/Documentation/devicetree/bindings/arm/altera.txt b/Documentation/devicetree/bindings/arm/altera.txt
new file mode 100644
index 0000000..558735a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera.txt
@@ -0,0 +1,14 @@
+Altera's SoCFPGA platform device tree bindings
+---------------------------------------------
+
+Boards with Cyclone 5 SoC:
+Required root node properties:
+compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+Boards with Arria 5 SoC:
+Required root node properties:
+compatible = "altr,socfpga-arria5", "altr,socfpga";
+
+Boards with Arria 10 SoC:
+Required root node properties:
+compatible = "altr,socfpga-arria10", "altr,socfpga";
--
2.2.1
On Thu 2015-04-02 23:39:51, [email protected] wrote:
> From: Dinh Nguyen <[email protected]>
>
> Hi,
>
> This patchset enables and tidy up support for the Arria10 devkit. Along with
> this patchset and the patch for enabling clocks on the Arria10, the devkit
> can boot Linux.
For the whole series:
Acked-by: Pavel Machek <[email protected]>
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html