2015-05-11 13:26:07

by Nicolas Ferre

[permalink] [raw]
Subject: [PATCH 1/2] ARM: at91/dt: sama5d4: add usart0, usart1 dt nodes

From: Josh Wu <[email protected]>

Also add the pinctrl for usart0, usart1.

Signed-off-by: Josh Wu <[email protected]>
Signed-off-by: Nicolas Ferre <[email protected]>
---
arch/arm/boot/dts/sama5d4.dtsi | 68 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 6b1bb58f9c0b..9900abc5f00c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -59,6 +59,8 @@
serial0 = &usart3;
serial1 = &usart4;
serial2 = &usart2;
+ serial3 = &usart0;
+ serial4 = &usart1;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
@@ -977,6 +979,42 @@
reg = <0xf8028000 0x60>;
};

+ usart0: serial@f802c000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xf802c000 0x100>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(36))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(37))>;
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart1: serial@f8030000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xf8030000 0x100>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ dmas = <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(38))>,
+ <&dma0
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(39))>;
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
mmc1: mmc@fc000000 {
compatible = "atmel,hsmci";
reg = <0xfc000000 0x600>;
@@ -1623,6 +1661,36 @@
};
};

+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
+ AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
+ >;
+ };
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
+ AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* TXD */
+ >;
+ };
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
--
2.1.3


2015-05-11 13:26:29

by Nicolas Ferre

[permalink] [raw]
Subject: [PATCH 2/2] ARM: at91/dt: sama5d4: add uart0, uart1 dt nodes

From: Suchang Ko <[email protected]>

Add sama5d4 uart0, uart1 dt nodes, pinctrl and related aliases.

Signed-off-by: Suchang Ko <[email protected]>
[[email protected]: split patch, reorder & whitespace fixes]
Signed-off-by: Nicolas Ferre <[email protected]>
---
arch/arm/boot/dts/sama5d4.dtsi | 56 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 9900abc5f00c..dcde334c1ff2 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -61,6 +61,8 @@
serial2 = &usart2;
serial3 = &usart0;
serial4 = &usart1;
+ serial5 = &uart0;
+ serial6 = &uart1;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
@@ -849,6 +851,24 @@
clock-names = "mci_clk";
};

+ uart0: serial@f8004000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xf8004000 0x100>;
+ interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
+ dmas = <&dma1
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(22))>,
+ <&dma1
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(23))>;
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ clocks = <&uart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
ssc0: ssc@f8008000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf8008000 0x4000>;
@@ -1032,6 +1052,24 @@
clock-names = "mci_clk";
};

+ uart1: serial@fc004000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfc004000 0x100>;
+ interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
+ dmas = <&dma1
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(24))>,
+ <&dma1
+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
+ | AT91_XDMAC_DT_PERID(25))>;
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&uart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
usart2: serial@fc008000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfc008000 0x100>;
@@ -1661,6 +1699,24 @@
};
};

+ uart0 {
+ pinctrl_uart0: uart0-0 {
+ atmel,pins =
+ <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
+ AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* TXD */
+ >;
+ };
+ };
+
+ uart1 {
+ pinctrl_uart1: uart1-0 {
+ atmel,pins =
+ <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE /* RXD */
+ AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* TXD */
+ >;
+ };
+ };
+
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
--
2.1.3