Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.
Signed-off-by: Hai Li <[email protected]>
---
drivers/clk/qcom/clk-rcg2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 4d3e2f7..b344899 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -615,10 +615,11 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
if (!parent)
return -EINVAL;
+ src_rate = parent_rate;
+
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
- src_rate = __clk_round_rate(parent, request);
if ((src_rate < (request - delta)) ||
(src_rate > (request + delta)))
continue;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
On 06/26/2015 04:05 AM, Hai Li wrote:
> Since the parent rate has been recalculated, pixel RCG clock
> should rely on it to find the correct M/N values during set_rate,
> instead of calling __clk_round_rate() to its parent again.
Tested-by: Archit Taneja <[email protected]>
>
> Signed-off-by: Hai Li <[email protected]>
> ---
> drivers/clk/qcom/clk-rcg2.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
> index 4d3e2f7..b344899 100644
> --- a/drivers/clk/qcom/clk-rcg2.c
> +++ b/drivers/clk/qcom/clk-rcg2.c
> @@ -615,10 +615,11 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
> if (!parent)
> return -EINVAL;
>
> + src_rate = parent_rate;
> +
> for (; frac->num; frac++) {
> request = (rate * frac->den) / frac->num;
>
> - src_rate = __clk_round_rate(parent, request);
> if ((src_rate < (request - delta)) ||
> (src_rate > (request + delta)))
> continue;
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 06/25, Hai Li wrote:
> Since the parent rate has been recalculated, pixel RCG clock
> should rely on it to find the correct M/N values during set_rate,
> instead of calling __clk_round_rate() to its parent again.
>
> Signed-off-by: Hai Li <[email protected]>
> ---
Applied to clk-fixes, but please send patches based on
clk-fixes/clk-next instead of whatever was done here. I had to fixup
conflicts.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.
v2: Rebase on clk-next and avoid build warning
Signed-off-by: Hai Li <[email protected]>
Tested-by: Archit Taneja <[email protected]>
Fixes: 99cbd064b059 ("clk: qcom: Support display RCG clocks")
Signed-off-by: Stephen Boyd <[email protected]>
---
drivers/clk/qcom/clk-rcg2.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index b95d17f..92936f0 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -530,19 +530,16 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
struct freq_tbl f = *rcg->freq_tbl;
const struct frac_entry *frac = frac_table_pixel;
- unsigned long request, src_rate;
+ unsigned long request;
int delta = 100000;
u32 mask = BIT(rcg->hid_width) - 1;
u32 hid_div;
- int index = qcom_find_src_index(hw, rcg->parent_map, f.src);
- struct clk *parent = clk_get_parent_by_index(hw->clk, index);
for (; frac->num; frac++) {
request = (rate * frac->den) / frac->num;
- src_rate = __clk_round_rate(parent, request);
- if ((src_rate < (request - delta)) ||
- (src_rate > (request + delta)))
+ if ((parent_rate < (request - delta)) ||
+ (parent_rate > (request + delta)))
continue;
regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
On 07/06/2015 07:49 AM, Hai Li wrote:
> Since the parent rate has been recalculated, pixel RCG clock
> should rely on it to find the correct M/N values during set_rate,
> instead of calling __clk_round_rate() to its parent again.
>
> v2: Rebase on clk-next and avoid build warning
>
> Signed-off-by: Hai Li <[email protected]>
> Tested-by: Archit Taneja <[email protected]>
> Fixes: 99cbd064b059 ("clk: qcom: Support display RCG clocks")
> Signed-off-by: Stephen Boyd <[email protected]>
> ---
Huh? I didn't sign this off. The original patch was already applied, so
a new patch on top of the patch in -next that removed the index and
parent lines and renamed the variable should have been sent. Then we
have the option of applying the new patch on top to silence the warning,
or to squash it into the original patch if we want to redo clk-fixes.
I've opted to redo clk-fixes this time.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project