2015-07-19 18:26:57

by Mathias Krause

[permalink] [raw]
Subject: [PATCH] x86, cpufeature: add feature bit for SDBG

Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature found
on recent Intel systems starting with Haswell.

Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least detect
if SDBG has been enabled by the firmware and if it has been used or not.

Signed-off-by: Mathias Krause <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: Ingo Molnar <[email protected]>
Cc: Thomas Gleixner <[email protected]>
---
arch/x86/include/asm/cpufeature.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3d6606fb97d0..4b11974b4ea7 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -119,6 +119,7 @@
#define X86_FEATURE_TM2 ( 4*32+ 8) /* Thermal Monitor 2 */
#define X86_FEATURE_SSSE3 ( 4*32+ 9) /* Supplemental SSE-3 */
#define X86_FEATURE_CID ( 4*32+10) /* Context ID */
+#define X86_FEATURE_SDBG ( 4*32+11) /* Silicon Debug */
#define X86_FEATURE_FMA ( 4*32+12) /* Fused multiply-add */
#define X86_FEATURE_CX16 ( 4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR ( 4*32+14) /* Send Task Priority Messages */
--
1.7.10.4


2015-07-20 11:54:15

by Borislav Petkov

[permalink] [raw]
Subject: Re: [PATCH] x86, cpufeature: add feature bit for SDBG

On Sun, Jul 19, 2015 at 08:26:43PM +0200, Mathias Krause wrote:
> Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature found
> on recent Intel systems starting with Haswell.
>
> Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least detect
> if SDBG has been enabled by the firmware and if it has been used or not.
>
> Signed-off-by: Mathias Krause <[email protected]>
> Cc: Borislav Petkov <[email protected]>
> Cc: H. Peter Anvin <[email protected]>
> Cc: Ingo Molnar <[email protected]>
> Cc: Thomas Gleixner <[email protected]>
> ---
> arch/x86/include/asm/cpufeature.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 3d6606fb97d0..4b11974b4ea7 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -119,6 +119,7 @@
> #define X86_FEATURE_TM2 ( 4*32+ 8) /* Thermal Monitor 2 */
> #define X86_FEATURE_SSSE3 ( 4*32+ 9) /* Supplemental SSE-3 */
> #define X86_FEATURE_CID ( 4*32+10) /* Context ID */
> +#define X86_FEATURE_SDBG ( 4*32+11) /* Silicon Debug */
> #define X86_FEATURE_FMA ( 4*32+12) /* Fused multiply-add */
> #define X86_FEATURE_CX16 ( 4*32+13) /* CMPXCHG16B */
> #define X86_FEATURE_XTPR ( 4*32+14) /* Send Task Priority Messages */

Acked-by: Borislav Petkov <[email protected]>

--
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.
--

2015-07-20 15:41:54

by Borislav Petkov

[permalink] [raw]
Subject: Re: [PATCH] x86, cpufeature: add feature bit for SDBG

On Mon, Jul 20, 2015 at 01:54:05PM +0200, Borislav Petkov wrote:
> Acked-by: Borislav Petkov <[email protected]>

... and applied, thanks.

--
Regards/Gruss,
Boris.

ECO tip #101: Trim your mails when you reply.
--

Subject: [tip:x86/cpu] x86/cpufeature: Add feature bit for Intel' s Silicon Debug CPUID bit

Commit-ID: b1c599b8ff80ea79b9f8277a3f9f36a7b0cfedce
Gitweb: http://git.kernel.org/tip/b1c599b8ff80ea79b9f8277a3f9f36a7b0cfedce
Author: Mathias Krause <[email protected]>
AuthorDate: Fri, 24 Jul 2015 09:15:11 +0200
Committer: Ingo Molnar <[email protected]>
CommitDate: Fri, 31 Jul 2015 10:34:07 +0200

x86/cpufeature: Add feature bit for Intel's Silicon Debug CPUID bit

Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature
found on recent Intel systems starting with Haswell.

Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least
detect if SDBG has been enabled by the firmware and if it has
been used or not.

Signed-off-by: Mathias Krause <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Cc: Aaron Lu <[email protected]>
Cc: Dave Hansen <[email protected]>
Cc: Dirk Brandewie <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: Josh Triplett <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Ross Zwisler <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
---
arch/x86/include/asm/cpufeature.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3d6606f..4b11974 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -119,6 +119,7 @@
#define X86_FEATURE_TM2 ( 4*32+ 8) /* Thermal Monitor 2 */
#define X86_FEATURE_SSSE3 ( 4*32+ 9) /* Supplemental SSE-3 */
#define X86_FEATURE_CID ( 4*32+10) /* Context ID */
+#define X86_FEATURE_SDBG ( 4*32+11) /* Silicon Debug */
#define X86_FEATURE_FMA ( 4*32+12) /* Fused multiply-add */
#define X86_FEATURE_CX16 ( 4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR ( 4*32+14) /* Send Task Priority Messages */