2015-11-09 14:36:41

by Daniel Lezcano

Subject: [PATCH 1/3] h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]

For the sake of consistency, let rename all ctrl_out/in calls to the write/read
calls so we have the same API consistent with the other architectures hence
open the door for the increasing of the test compilation coverage.

The unsigned long coercive cast is removed because all variables are set to
the right type "void __iomem *".

Signed-off-by: Daniel Lezcano <[email protected]>
---
arch/h8300/include/asm/io.h | 39 +++++++++++++++++++++---------------
arch/h8300/kernel/setup.c | 8 ++++----
drivers/clocksource/h8300_timer16.c | 28 +++++++++++++-------------
drivers/clocksource/h8300_timer8.c | 34 +++++++++++++++----------------
drivers/clocksource/h8300_tpu.c | 28 +++++++++++++-------------
drivers/irqchip/irq-renesas-h8300h.c | 8 ++++----
6 files changed, 76 insertions(+), 69 deletions(-)

diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index 1d09b2f..2d15508 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -3,40 +3,45 @@

#ifdef __KERNEL__

-#include <asm-generic/io.h>
-
/* H8/300 internal I/O functions */
-static inline unsigned char ctrl_inb(unsigned long addr)
+
+#define __raw_readb __raw_readb
+static inline u8 __raw_readb(const volatile void __iomem *addr)
{
- return *(volatile unsigned char *)addr;
+ return *(volatile u8 *)addr;
}

-static inline unsigned short ctrl_inw(unsigned long addr)
+#define __raw_readw __raw_readw
+static inline u16 __raw_readw(const volatile void __iomem *addr)
{
- return *(volatile unsigned short *)addr;
+ return *(volatile u16 *)addr;
}

-static inline unsigned long ctrl_inl(unsigned long addr)
+#define __raw_readl __raw_readl
+static inline u32 __raw_readl(const volatile void __iomem *addr)
{
- return *(volatile unsigned long *)addr;
+ return *(volatile u32 *)addr;
}

-static inline void ctrl_outb(unsigned char b, unsigned long addr)
+#define __raw_writeb __raw_writeb
+static inline void __raw_writeb(u8 b, const volatile void __iomem *addr)
{
- *(volatile unsigned char *)addr = b;
+ *(volatile u8 *)addr = b;
}

-static inline void ctrl_outw(unsigned short b, unsigned long addr)
+#define __raw_writew __raw_writew
+static inline void __raw_writew(u16 b, const volatile void __iomem *addr)
{
- *(volatile unsigned short *)addr = b;
+ *(volatile u16 *)addr = b;
}

-static inline void ctrl_outl(unsigned long b, unsigned long addr)
+#define __raw_writel __raw_writel
+static inline void __raw_writel(u32 b, const volatile void __iomem *addr)
{
- *(volatile unsigned long *)addr = b;
+ *(volatile u32 *)addr = b;
}

-static inline void ctrl_bclr(int b, unsigned long addr)
+static inline void ctrl_bclr(int b, void __iomem *addr)
{
if (__builtin_constant_p(b))
__asm__("bclr %1,%0" : : "WU"(addr), "i"(b));
@@ -44,7 +49,7 @@ static inline void ctrl_bclr(int b, unsigned long addr)
__asm__("bclr %w1,%0" : : "WU"(addr), "r"(b));
}

-static inline void ctrl_bset(int b, unsigned long addr)
+static inline void ctrl_bset(int b, void __iomem *addr)
{
if (__builtin_constant_p(b))
__asm__("bset %1,%0" : : "WU"(addr), "i"(b));
@@ -52,6 +57,8 @@ static inline void ctrl_bset(int b, unsigned long addr)
__asm__("bset %w1,%0" : : "WU"(addr), "r"(b));
}

+#include <asm-generic/io.h>
+
#endif /* __KERNEL__ */

#endif /* _H8300_IO_H */
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
index 0fd1fe6..68a7714 100644
--- a/arch/h8300/kernel/setup.c
+++ b/arch/h8300/kernel/setup.c
@@ -206,14 +206,14 @@ device_initcall(device_probe);
#define get_wait(base, addr) ({ \
int baddr; \
baddr = ((addr) / 0x200000 * 2); \
- w *= (ctrl_inw((unsigned long)(base) + 2) & (3 << baddr)) + 1; \
+ w *= (readw((base) + 2) & (3 << baddr)) + 1; \
})
#endif
#if defined(CONFIG_CPU_H8S)
#define get_wait(base, addr) ({ \
int baddr; \
baddr = ((addr) / 0x200000 * 16); \
- w *= (ctrl_inl((unsigned long)(base) + 2) & (7 << baddr)) + 1; \
+ w *= (readl((base) + 2) & (7 << baddr)) + 1; \
})
#endif

@@ -227,8 +227,8 @@ static __init int access_timing(void)

bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc");
base = of_iomap(bsc, 0);
- w = (ctrl_inb((unsigned long)base + 0) & bit)?2:1;
- if (ctrl_inb((unsigned long)base + 1) & bit)
+ w = (readb(base + 0) & bit)?2:1;
+ if (readb(base + 1) & bit)
w *= get_wait(base, addr);
else
w *= 2;
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index f396605..fc14a3f 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -23,8 +23,8 @@
struct timer16_priv {
struct clocksource cs;
unsigned long total_cycles;
- unsigned long mapbase;
- unsigned long mapcommon;
+ void __iomem *mapbase;
+ void __iomem *mapcommon;
unsigned short cs_enabled;
unsigned char enb;
unsigned char imfa;
@@ -38,15 +38,15 @@ static unsigned long timer16_get_counter(struct timer16_priv *p)
unsigned long v1, v2, v3;
int o1, o2;

- o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf;
+ o1 = readb(p->mapcommon + TISRC) & p->ovf;

/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
o2 = o1;
- v1 = ctrl_inw(p->mapbase + TCNT);
- v2 = ctrl_inw(p->mapbase + TCNT);
- v3 = ctrl_inw(p->mapbase + TCNT);
- o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf;
+ v1 = readw(p->mapbase + TCNT);
+ v2 = readw(p->mapbase + TCNT);
+ v3 = readw(p->mapbase + TCNT);
+ o1 = readb(p->mapcommon + TISRC) & p->ovf;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));

@@ -59,7 +59,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id)
{
struct timer16_priv *p = (struct timer16_priv *)dev_id;

- ctrl_outb(ctrl_inb(p->mapcommon + TISRA) & ~p->imfa,
+ writeb(readb(p->mapcommon + TISRA) & ~p->imfa,
p->mapcommon + TISRA);
p->total_cycles += 0x10000;

@@ -89,9 +89,9 @@ static int timer16_enable(struct clocksource *cs)
WARN_ON(p->cs_enabled);

p->total_cycles = 0;
- ctrl_outw(0x0000, p->mapbase + TCNT);
- ctrl_outb(0x83, p->mapbase + TCR);
- ctrl_outb(ctrl_inb(p->mapcommon + TSTR) | p->enb,
+ writew(0x0000, p->mapbase + TCNT);
+ writeb(0x83, p->mapbase + TCR);
+ writeb(readb(p->mapcommon + TSTR) | p->enb,
p->mapcommon + TSTR);

p->cs_enabled = true;
@@ -104,7 +104,7 @@ static void timer16_disable(struct clocksource *cs)

WARN_ON(!p->cs_enabled);

- ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enb,
+ writeb(readb(p->mapcommon + TSTR) & ~p->enb,
p->mapcommon + TSTR);

p->cs_enabled = false;
@@ -158,8 +158,8 @@ static void __init h8300_16timer_init(struct device_node *node)

of_property_read_u32(node, "renesas,channel", &ch);

- timer16_priv.mapbase = (unsigned long)base[REG_CH];
- timer16_priv.mapcommon = (unsigned long)base[REG_COMM];
+ timer16_priv.mapbase = base[REG_CH];
+ timer16_priv.mapcommon = base[REG_COMM];
timer16_priv.enb = 1 << ch;
timer16_priv.imfa = 1 << ch;
timer16_priv.imiea = 1 << (4 + ch);
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 187c416..aa4b2a98 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -30,7 +30,7 @@

struct timer8_priv {
struct clock_event_device ced;
- unsigned long mapbase;
+ void __iomem *mapbase;
unsigned long flags;
unsigned int rate;
unsigned int tcora;
@@ -41,15 +41,15 @@ static unsigned long timer8_get_counter(struct timer8_priv *p)
unsigned long v1, v2, v3;
int o1, o2;

- o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
+ o1 = readb(p->mapbase + _8TCSR) & 0x20;

/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
o2 = o1;
- v1 = ctrl_inw(p->mapbase + _8TCNT);
- v2 = ctrl_inw(p->mapbase + _8TCNT);
- v3 = ctrl_inw(p->mapbase + _8TCNT);
- o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
+ v1 = readw(p->mapbase + _8TCNT);
+ v2 = readw(p->mapbase + _8TCNT);
+ v3 = readw(p->mapbase + _8TCNT);
+ o1 = readb(p->mapbase + _8TCSR) & 0x20;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));

@@ -61,13 +61,13 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
{
struct timer8_priv *p = dev_id;

- ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40,
+ writeb(readb(p->mapbase + _8TCSR) & ~0x40,
p->mapbase + _8TCSR);

- ctrl_outw(p->tcora, p->mapbase + TCORA);
+ writew(p->tcora, p->mapbase + TCORA);

if (clockevent_state_oneshot(&p->ced))
- ctrl_outw(0x0000, p->mapbase + _8TCR);
+ writew(0x0000, p->mapbase + _8TCR);

p->ced.event_handler(&p->ced);

@@ -82,18 +82,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
pr_warn("delta out of range\n");
now = timer8_get_counter(p);
p->tcora = delta;
- ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
+ writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
if (delta > now)
- ctrl_outw(delta, p->mapbase + TCORA);
+ writew(delta, p->mapbase + TCORA);
else
- ctrl_outw(now + 1, p->mapbase + TCORA);
+ writew(now + 1, p->mapbase + TCORA);
}

static int timer8_enable(struct timer8_priv *p)
{
- ctrl_outw(0xffff, p->mapbase + TCORA);
- ctrl_outw(0x0000, p->mapbase + _8TCNT);
- ctrl_outw(0x0c02, p->mapbase + _8TCR);
+ writew(0xffff, p->mapbase + TCORA);
+ writew(0x0000, p->mapbase + _8TCNT);
+ writew(0x0c02, p->mapbase + _8TCR);

return 0;
}
@@ -114,7 +114,7 @@ static int timer8_start(struct timer8_priv *p)

static void timer8_stop(struct timer8_priv *p)
{
- ctrl_outw(0x0000, p->mapbase + _8TCR);
+ writew(0x0000, p->mapbase + _8TCR);
}

static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
@@ -213,7 +213,7 @@ static void __init h8300_8timer_init(struct device_node *node)
goto unmap_reg;
}

- timer8_priv.mapbase = (unsigned long)base;
+ timer8_priv.mapbase = base;

rate = clk_get_rate(clk) / SCALE;
if (!rate) {
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index c1eef42..91bf1992 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -21,8 +21,8 @@

struct tpu_priv {
struct clocksource cs;
- unsigned long mapbase1;
- unsigned long mapbase2;
+ void __iomem *mapbase1;
+ void __iomem *mapbase2;
raw_spinlock_t lock;
unsigned int cs_enabled;
};
@@ -31,8 +31,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p)
{
unsigned long tcnt;

- tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16;
- tcnt |= ctrl_inw(p->mapbase2 + TCNT);
+ tcnt = readw(p->mapbase1 + TCNT) << 16;
+ tcnt |= readw(p->mapbase2 + TCNT);
return tcnt;
}

@@ -41,7 +41,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
unsigned long v1, v2, v3;
int o1, o2;

- o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
+ o1 = readb(p->mapbase1 + TSR) & 0x10;

/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
@@ -49,7 +49,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
v1 = read_tcnt32(p);
v2 = read_tcnt32(p);
v3 = read_tcnt32(p);
- o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
+ o1 = readb(p->mapbase1 + TSR) & 0x10;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));

@@ -82,10 +82,10 @@ static int tpu_clocksource_enable(struct clocksource *cs)

WARN_ON(p->cs_enabled);

- ctrl_outw(0, p->mapbase1 + TCNT);
- ctrl_outw(0, p->mapbase2 + TCNT);
- ctrl_outb(0x0f, p->mapbase1 + TCR);
- ctrl_outb(0x03, p->mapbase2 + TCR);
+ writew(0, p->mapbase1 + TCNT);
+ writew(0, p->mapbase2 + TCNT);
+ writeb(0x0f, p->mapbase1 + TCR);
+ writeb(0x03, p->mapbase2 + TCR);

p->cs_enabled = true;
return 0;
@@ -97,8 +97,8 @@ static void tpu_clocksource_disable(struct clocksource *cs)

WARN_ON(!p->cs_enabled);

- ctrl_outb(0, p->mapbase1 + TCR);
- ctrl_outb(0, p->mapbase2 + TCR);
+ writeb(0, p->mapbase1 + TCR);
+ writeb(0, p->mapbase2 + TCR);
p->cs_enabled = false;
}

@@ -139,8 +139,8 @@ static void __init h8300_tpu_init(struct device_node *node)
goto unmap_L;
}

- tpu_priv.mapbase1 = (unsigned long)base[CH_L];
- tpu_priv.mapbase2 = (unsigned long)base[CH_H];
+ tpu_priv.mapbase1 = base[CH_L];
+ tpu_priv.mapbase2 = base[CH_H];

clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);

diff --git a/drivers/irqchip/irq-renesas-h8300h.c b/drivers/irqchip/irq-renesas-h8300h.c
index 6fd30d5..c378768 100644
--- a/drivers/irqchip/irq-renesas-h8300h.c
+++ b/drivers/irqchip/irq-renesas-h8300h.c
@@ -21,9 +21,9 @@ static const char ipr_bit[] = {
10, 10, 10, 10, 9, 9, 9, 9,
};

-static void *intc_baseaddr;
+static void __iomem *intc_baseaddr;

-#define IPR ((unsigned long)intc_baseaddr + 6)
+#define IPR (intc_baseaddr + 6)

static void h8300h_disable_irq(struct irq_data *data)
{
@@ -81,8 +81,8 @@ static int __init h8300h_intc_of_init(struct device_node *intc,
BUG_ON(!intc_baseaddr);

/* All interrupt priority low */
- ctrl_outb(0x00, IPR + 0);
- ctrl_outb(0x00, IPR + 1);
+ writeb(0x00, IPR + 0);
+ writeb(0x00, IPR + 1);

domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL);
BUG_ON(!domain);
--
1.9.1

2015-11-09 14:36:47

by Daniel Lezcano

Subject: [PATCH 2/3] clocksource/drivers/h8300_timer8: Separate the Kconfig option from the arch

The current Kconfig option is the H8300 arch option. In order to comply to the
current rule, let's create a specific option for the timer8 and select it
from the arch's Kconfig.

Signed-off-by: Daniel Lezcano <[email protected]>
---
arch/h8300/Kconfig | 1 +
drivers/clocksource/Kconfig | 3 +++
drivers/clocksource/Makefile | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index db58916..7a17112 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -16,6 +16,7 @@ config H8300
select OF_EARLY_FLATTREE
select HAVE_MEMBLOCK
select HAVE_DMA_ATTRS
+ select H8300_TMR8

config RWSEM_GENERIC_SPINLOCK
def_bool y
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index aaad6ff..2f20460 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -344,6 +344,9 @@ config CLKSRC_PXA
This enables OST0 support available on PXA and SA-11x0
platforms.

+config H8300_TMR8
+ bool
+
config H8300_TMR16
bool

diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index fc9348d..83063e8 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -59,7 +59,7 @@ obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o
obj-$(CONFIG_CLKSRC_TANGO_XTAL) += tango_xtal.o
obj-$(CONFIG_CLKSRC_IMX_GPT) += timer-imx-gpt.o
obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o
-obj-$(CONFIG_H8300) += h8300_timer8.o
+obj-$(CONFIG_H8300_TMR8) += h8300_timer8.o
obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o
obj-$(CONFIG_H8300_TPU) += h8300_tpu.o
obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o
--
1.9.1

2015-11-09 14:36:49

by Daniel Lezcano

Subject: [PATCH 3/3] clocksource/drivers/h8300: Increase the compilation test coverage

Add the COMPILE_TEST option so the drivers can be compiled on different
architecture with the 'allyesconfig' kernel configuration.

Signed-off-by: Daniel Lezcano <[email protected]>
---
drivers/clocksource/Kconfig | 17 ++++++++++++++---
1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 2f20460..ecf9855 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -345,13 +345,24 @@ config CLKSRC_PXA
platforms.

config H8300_TMR8
- bool
+ bool "Clockevent timer for the H8300 platform" if COMPILE_TEST
+ depends on GENERIC_CLOCKEVENTS
+ help
+ This enables the 8 bits timer for the H8300 platform.

config H8300_TMR16
- bool
+ bool "Clockevent timer for the H83069 platform" if COMPILE_TEST
+ depends on GENERIC_CLOCKEVENTS
+ help
+ This enables the 16 bits timer for the H8300 platform with the
+ H83069 cpu.

config H8300_TPU
- bool
+ bool "Clocksource for the H8300 platform" if COMPILE_TEST
+ depends on GENERIC_CLOCKEVENTS
+ help
+ This enables the clocksource for the H8300 platform with the
+ H8S2678 cpu.

config CLKSRC_IMX_GPT
bool "Clocksource using i.MX GPT" if COMPILE_TEST
--
1.9.1

2015-11-09 14:38:25

by Daniel Lezcano

Subject: Re: [PATCH 1/3] h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]

On 11/09/2015 03:36 PM, Daniel Lezcano wrote:
> For the sake of consistency, let rename all ctrl_out/in calls to the write/read
> calls so we have the same API consistent with the other architectures hence
> open the door for the increasing of the test compilation coverage.
>
> The unsigned long coercive cast is removed because all variables are set to
> the right type "void __iomem *".
>
> Signed-off-by: Daniel Lezcano <[email protected]>

Series compiled on X86, ARM, ARM64, PARISC and H8300. Not tested.


--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

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2015-11-11 05:52:09

by Daniel Lezcano

Subject: Re: [PATCH 1/3] h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]

On 11/09/2015 03:36 PM, Daniel Lezcano wrote:
> For the sake of consistency, let rename all ctrl_out/in calls to the write/read
> calls so we have the same API consistent with the other architectures hence
> open the door for the increasing of the test compilation coverage.
>
> The unsigned long coercive cast is removed because all variables are set to
> the right type "void __iomem *".
>
> Signed-off-by: Daniel Lezcano <[email protected]>
> ---

Hi all,

is there anyone who is willing to test this series and the previous one
https://lkml.org/lkml/2015/11/9/153 ?

Thanks !

-- Daniel


--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

2015-11-11 15:01:43

by Yoshinori Sato

Subject: Re: [PATCH 1/3] h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]

On Wed, 11 Nov 2015 14:52:04 +0900,
Daniel Lezcano wrote:
>
> On 11/09/2015 03:36 PM, Daniel Lezcano wrote:
> > For the sake of consistency, let rename all ctrl_out/in calls to the write/read
> > calls so we have the same API consistent with the other architectures hence
> > open the door for the increasing of the test compilation coverage.
> >
> > The unsigned long coercive cast is removed because all variables are set to
> > the right type "void __iomem *".
> >
> > Signed-off-by: Daniel Lezcano <[email protected]>
> > ---
>
> Hi all,
>
> is there anyone who is willing to test this series and the previous
> one https://lkml.org/lkml/2015/11/9/153 ?
>
> Thanks !

I'm looking now.
Please wait a moment.

> -- Daniel
>
>
> --
> <http://www.linaro.org/> Linaro.org $B("(B Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
>
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--
Yoshinori Sato
<[email protected]>

2015-11-14 11:51:12

by Yoshinori Sato

Subject: [PATCH] h8300: Replace read/write to ioread/write

read[bwl] and write[bwl] is only little-endian I/O.
But h8300's peripheral of big-endian. So use ioread/write.

And h8300 specific __raw_read/write is same of generic.
It can remove.

Signed-off-by: Daniel Lezcano <[email protected]>
Signed-off-by: Yoshinori Sato <[email protected]>
---
arch/h8300/include/asm/io.h | 45 ++++--------------------------------
arch/h8300/kernel/setup.c | 9 ++++----
drivers/clk/h8300/clk-h8s2678.c | 6 ++---
drivers/clocksource/h8300_timer16.c | 35 +++++++++++++---------------
drivers/clocksource/h8300_timer8.c | 19 ++++++++-------
drivers/clocksource/h8300_tpu.c | 18 +++++++--------
drivers/irqchip/irq-renesas-h8300h.c | 4 ++--
drivers/irqchip/irq-renesas-h8s.c | 19 +++++++--------
8 files changed, 60 insertions(+), 95 deletions(-)

diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index 2d15508..976e51d 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -4,57 +4,20 @@
#ifdef __KERNEL__

/* H8/300 internal I/O functions */
-
-#define __raw_readb __raw_readb
-static inline u8 __raw_readb(const volatile void __iomem *addr)
-{
- return *(volatile u8 *)addr;
-}
-
-#define __raw_readw __raw_readw
-static inline u16 __raw_readw(const volatile void __iomem *addr)
-{
- return *(volatile u16 *)addr;
-}
-
-#define __raw_readl __raw_readl
-static inline u32 __raw_readl(const volatile void __iomem *addr)
-{
- return *(volatile u32 *)addr;
-}
-
-#define __raw_writeb __raw_writeb
-static inline void __raw_writeb(u8 b, const volatile void __iomem *addr)
-{
- *(volatile u8 *)addr = b;
-}
-
-#define __raw_writew __raw_writew
-static inline void __raw_writew(u16 b, const volatile void __iomem *addr)
-{
- *(volatile u16 *)addr = b;
-}
-
-#define __raw_writel __raw_writel
-static inline void __raw_writel(u32 b, const volatile void __iomem *addr)
-{
- *(volatile u32 *)addr = b;
-}
-
static inline void ctrl_bclr(int b, void __iomem *addr)
{
if (__builtin_constant_p(b))
- __asm__("bclr %1,%0" : : "WU"(addr), "i"(b));
+ __asm__("bclr %1,%0" : "+WU"(*((u8 *)addr)): "i"(b));
else
- __asm__("bclr %w1,%0" : : "WU"(addr), "r"(b));
+ __asm__("bclr %w1,%0" : "+WU"(*((u8 *)addr)): "r"(b));
}

static inline void ctrl_bset(int b, void __iomem *addr)
{
if (__builtin_constant_p(b))
- __asm__("bset %1,%0" : : "WU"(addr), "i"(b));
+ __asm__("bset %1,%0" : "+WU"(*((u8 *)addr)): "i"(b));
else
- __asm__("bset %w1,%0" : : "WU"(addr), "r"(b));
+ __asm__("bset %w1,%0" : "+WU"(*((u8 *)addr)): "r"(b));
}

#include <asm-generic/io.h>
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
index 68a7714..e523d0a 100644
--- a/arch/h8300/kernel/setup.c
+++ b/arch/h8300/kernel/setup.c
@@ -206,14 +206,14 @@ device_initcall(device_probe);
#define get_wait(base, addr) ({ \
int baddr; \
baddr = ((addr) / 0x200000 * 2); \
- w *= (readw((base) + 2) & (3 << baddr)) + 1; \
+ w *= (ioread16be((base) + 4) & (3 << baddr)) + 1; \
})
#endif
#if defined(CONFIG_CPU_H8S)
#define get_wait(base, addr) ({ \
int baddr; \
baddr = ((addr) / 0x200000 * 16); \
- w *= (readl((base) + 2) & (7 << baddr)) + 1; \
+ w *= (ioread32be((base) + 4) & (7 << baddr)) + 1; \
})
#endif

@@ -227,8 +227,8 @@ static __init int access_timing(void)

bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc");
base = of_iomap(bsc, 0);
- w = (readb(base + 0) & bit)?2:1;
- if (readb(base + 1) & bit)
+ w = (ioread8(base + 2) & bit) ? 2 : 1;
+ if (ioread8(base + 3) & bit)
w *= get_wait(base, addr);
else
w *= 2;
@@ -252,4 +252,5 @@ void __init calibrate_delay(void)
void __init time_init(void)
{
of_clk_init(NULL);
+ clocksource_probe();
}
diff --git a/drivers/clk/h8300/clk-h8s2678.c b/drivers/clk/h8300/clk-h8s2678.c
index 6cf38dc..2f89f35 100644
--- a/drivers/clk/h8300/clk-h8s2678.c
+++ b/drivers/clk/h8300/clk-h8s2678.c
@@ -27,7 +27,7 @@ static unsigned long pll_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
struct pll_clock *pll_clock = to_pll_clock(hw);
- int mul = 1 << (readb(pll_clock->pllcr) & 3);
+ int mul = 1 << (ioread8(pll_clock->pllcr) & 3);

return parent_rate * mul;
}
@@ -64,10 +64,10 @@ static int pll_set_rate(struct clk_hw *hw, unsigned long rate,

pll = ((rate / parent_rate) / 2) & 0x03;
spin_lock_irqsave(&clklock, flags);
- val = readb(pll_clock->sckcr);
+ val = ioread8(pll_clock->sckcr);
val |= 0x08;
writeb(val, pll_clock->sckcr);
- val = readb(pll_clock->pllcr);
+ val = ioread8(pll_clock->pllcr);
val &= ~0x03;
val |= pll;
writeb(val, pll_clock->pllcr);
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index fc14a3f..5b35224 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -14,7 +14,6 @@
#include <linux/of_irq.h>

#define TSTR 0
-#define TISRA 4
#define TISRC 6

#define TCR 0
@@ -38,15 +37,15 @@ static unsigned long timer16_get_counter(struct timer16_priv *p)
unsigned long v1, v2, v3;
int o1, o2;

- o1 = readb(p->mapcommon + TISRC) & p->ovf;
+ o1 = ioread8(p->mapcommon + TISRC) & p->ovf;

/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
o2 = o1;
- v1 = readw(p->mapbase + TCNT);
- v2 = readw(p->mapbase + TCNT);
- v3 = readw(p->mapbase + TCNT);
- o1 = readb(p->mapcommon + TISRC) & p->ovf;
+ v1 = ioread16be(p->mapbase + TCNT);
+ v2 = ioread16be(p->mapbase + TCNT);
+ v3 = ioread16be(p->mapbase + TCNT);
+ o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));

@@ -59,8 +58,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id)
{
struct timer16_priv *p = (struct timer16_priv *)dev_id;

- writeb(readb(p->mapcommon + TISRA) & ~p->imfa,
- p->mapcommon + TISRA);
+ ctrl_bclr(p->ovf, p->mapcommon + TISRC);
p->total_cycles += 0x10000;

return IRQ_HANDLED;
@@ -89,10 +87,10 @@ static int timer16_enable(struct clocksource *cs)
WARN_ON(p->cs_enabled);

p->total_cycles = 0;
- writew(0x0000, p->mapbase + TCNT);
- writeb(0x83, p->mapbase + TCR);
- writeb(readb(p->mapcommon + TSTR) | p->enb,
- p->mapcommon + TSTR);
+ iowrite16be(0x0000, p->mapbase + TCNT);
+ iowrite8(0x83, p->mapbase + TCR);
+ ctrl_bset(p->ovie, p->mapcommon + TISRC);
+ ctrl_bset(p->enb, p->mapcommon + TSTR);

p->cs_enabled = true;
return 0;
@@ -103,9 +101,8 @@ static void timer16_disable(struct clocksource *cs)
struct timer16_priv *p = cs_to_priv(cs);

WARN_ON(!p->cs_enabled);
-
- writeb(readb(p->mapcommon + TSTR) & ~p->enb,
- p->mapcommon + TSTR);
+ ctrl_bclr(p->ovie, p->mapcommon + TISRC);
+ ctrl_bclr(p->enb, p->mapcommon + TSTR);

p->cs_enabled = false;
}
@@ -160,9 +157,9 @@ static void __init h8300_16timer_init(struct device_node *node)

timer16_priv.mapbase = base[REG_CH];
timer16_priv.mapcommon = base[REG_COMM];
- timer16_priv.enb = 1 << ch;
- timer16_priv.imfa = 1 << ch;
- timer16_priv.imiea = 1 << (4 + ch);
+ timer16_priv.enb = ch;
+ timer16_priv.ovf = ch;
+ timer16_priv.ovie = 4 + ch;

ret = request_irq(irq, timer16_interrupt,
IRQF_TIMER, timer16_priv.cs.name, &timer16_priv);
@@ -172,7 +169,7 @@ static void __init h8300_16timer_init(struct device_node *node)
}

clocksource_register_hz(&timer16_priv.cs,
- clk_get_rate(timer16_priv.clk) / 8);
+ clk_get_rate(clk) / 8);
return;

unmap_comm:
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index aa4b2a98..816a8c5 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -24,6 +24,8 @@
#define TCORB 6
#define _8TCNT 8

+#define CMIEA 6
+#define CMFA 6
#define FLAG_STARTED (1 << 3)

#define SCALE 64
@@ -67,10 +69,11 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
writew(p->tcora, p->mapbase + TCORA);

if (clockevent_state_oneshot(&p->ced))
- writew(0x0000, p->mapbase + _8TCR);
+ iowrite16be(0x0000, p->mapbase + _8TCR);

p->ced.event_handler(&p->ced);

+ ctrl_bclr(CMFA, p->mapbase + _8TCSR);
return IRQ_HANDLED;
}

@@ -82,18 +85,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
pr_warn("delta out of range\n");
now = timer8_get_counter(p);
p->tcora = delta;
- writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
+ ctrl_bset(CMIEA, p->mapbase + _8TCR);
if (delta > now)
- writew(delta, p->mapbase + TCORA);
+ iowrite16be(delta, p->mapbase + TCORA);
else
- writew(now + 1, p->mapbase + TCORA);
+ iowrite16be(now + 1, p->mapbase + TCORA);
}

static int timer8_enable(struct timer8_priv *p)
{
- writew(0xffff, p->mapbase + TCORA);
- writew(0x0000, p->mapbase + _8TCNT);
- writew(0x0c02, p->mapbase + _8TCR);
+ iowrite16be(0xffff, p->mapbase + TCORA);
+ iowrite16be(0x0000, p->mapbase + _8TCNT);
+ iowrite16be(0x0c02, p->mapbase + _8TCR);

return 0;
}
@@ -114,7 +117,7 @@ static int timer8_start(struct timer8_priv *p)

static void timer8_stop(struct timer8_priv *p)
{
- writew(0x0000, p->mapbase + _8TCR);
+ iowrite16be(0x0000, p->mapbase + _8TCR);
}

static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index 91bf1992..e8e8381 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -31,8 +31,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p)
{
unsigned long tcnt;

- tcnt = readw(p->mapbase1 + TCNT) << 16;
- tcnt |= readw(p->mapbase2 + TCNT);
+ tcnt = ioread16be(p->mapbase1 + TCNT) << 16;
+ tcnt |= ioread16be(p->mapbase2 + TCNT);
return tcnt;
}

@@ -41,7 +41,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
unsigned long v1, v2, v3;
int o1, o2;

- o1 = readb(p->mapbase1 + TSR) & 0x10;
+ o1 = ioread8(p->mapbase1 + TSR) & 0x10;

/* Make sure the timer value is stable. Stolen from acpi_pm.c */
do {
@@ -82,10 +82,10 @@ static int tpu_clocksource_enable(struct clocksource *cs)

WARN_ON(p->cs_enabled);

- writew(0, p->mapbase1 + TCNT);
- writew(0, p->mapbase2 + TCNT);
- writeb(0x0f, p->mapbase1 + TCR);
- writeb(0x03, p->mapbase2 + TCR);
+ iowrite16be(0, p->mapbase1 + TCNT);
+ iowrite16be(0, p->mapbase2 + TCNT);
+ iowrite8(0x0f, p->mapbase1 + TCR);
+ iowrite8(0x03, p->mapbase2 + TCR);

p->cs_enabled = true;
return 0;
@@ -97,8 +97,8 @@ static void tpu_clocksource_disable(struct clocksource *cs)

WARN_ON(!p->cs_enabled);

- writeb(0, p->mapbase1 + TCR);
- writeb(0, p->mapbase2 + TCR);
+ iowrite8(0, p->mapbase1 + TCR);
+ iowrite8(0, p->mapbase2 + TCR);
p->cs_enabled = false;
}

diff --git a/drivers/irqchip/irq-renesas-h8300h.c b/drivers/irqchip/irq-renesas-h8300h.c
index c378768..9e57b73 100644
--- a/drivers/irqchip/irq-renesas-h8300h.c
+++ b/drivers/irqchip/irq-renesas-h8300h.c
@@ -81,8 +81,8 @@ static int __init h8300h_intc_of_init(struct device_node *intc,
BUG_ON(!intc_baseaddr);

/* All interrupt priority low */
- writeb(0x00, IPR + 0);
- writeb(0x00, IPR + 1);
+ iowrite8(0x00, IPR + 0);
+ iowrite8(0x00, IPR + 1);

domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL);
BUG_ON(!domain);
diff --git a/drivers/irqchip/irq-renesas-h8s.c b/drivers/irqchip/irq-renesas-h8s.c
index 8098ead..1f990cd 100644
--- a/drivers/irqchip/irq-renesas-h8s.c
+++ b/drivers/irqchip/irq-renesas-h8s.c
@@ -10,8 +10,9 @@
#include <linux/of_irq.h>
#include <asm/io.h>

-static void *intc_baseaddr;
-#define IPRA ((unsigned long)intc_baseaddr)
+static void __iomem *intc_baseaddr;
+#define IPRA (intc_baseaddr)

static const unsigned char ipr_table[] = {
0x03, 0x02, 0x01, 0x00, 0x13, 0x12, 0x11, 0x10, /* 16 - 23 */
@@ -33,30 +33,30 @@ static const unsigned char ipr_table[] = {
static void h8s_disable_irq(struct irq_data *data)
{
int pos;
- unsigned int addr;
+ void __iomem *addr;
unsigned short pri;
int irq = data->irq;

addr = IPRA + ((ipr_table[irq - 16] & 0xf0) >> 3);
pos = (ipr_table[irq - 16] & 0x0f) * 4;
pri = ~(0x000f << pos);
- pri &= ctrl_inw(addr);
- ctrl_outw(pri, addr);
+ pri &= ioread16be(addr);
+ iowrite16be(pri, addr);
}

static void h8s_enable_irq(struct irq_data *data)
{
int pos;
- unsigned int addr;
+ void __iomem *addr;
unsigned short pri;
int irq = data->irq;

addr = IPRA + ((ipr_table[irq - 16] & 0xf0) >> 3);
pos = (ipr_table[irq - 16] & 0x0f) * 4;
pri = ~(0x000f << pos);
- pri &= ctrl_inw(addr);
+ pri &= ioread16be(addr);
pri |= 1 << pos;
- ctrl_outw(pri, addr);
+ iowrite16be(pri, addr);
}

struct irq_chip h8s_irq_chip = {
@@ -90,7 +90,7 @@ static int __init h8s_intc_of_init(struct device_node *intc,
/* All interrupt priority is 0 (disable) */
/* IPRA to IPRK */
for (n = 0; n <= 'k' - 'a'; n++)
- ctrl_outw(0x0000, IPRA + (n * 2));
+ iowrite16be(0x0000, IPRE + (n * 2));

domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL);
BUG_ON(!domain);
--
2.6.1

2015-11-18 22:28:27

by Stephen Boyd

Subject: Re: [PATCH] h8300: Replace read/write to ioread/write

On 11/14, Yoshinori Sato wrote:
> read[bwl] and write[bwl] is only little-endian I/O.
> But h8300's peripheral of big-endian. So use ioread/write.
>
> And h8300 specific __raw_read/write is same of generic.
> It can remove.
>
> Signed-off-by: Daniel Lezcano <[email protected]>
> Signed-off-by: Yoshinori Sato <[email protected]>
> ---
> drivers/clk/h8300/clk-h8s2678.c | 6 ++---

Acked-by: Stephen Boyd <[email protected]>

--
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