2015-11-17 19:55:34

by Jon Mason

Subject: [PATCH 0/2] ARM: dts: NSP: clean-ups and I2C support

Minor changes to the Broadcom Northstar Plus device tree to make it more
organized and clean, and adding I2C support (device tree only change
needed for support).


Jon Mason (2):
ARM: dts: NSP: Device Tree clean-ups
ARM: dts: NSP: Add I2C support to the DT

arch/arm/boot/dts/bcm-nsp.dtsi | 59 ++++++++++++++++++++++++------------------
1 file changed, 34 insertions(+), 25 deletions(-)

--
1.9.1

2015-11-17 19:55:56

by Jon Mason

Subject: [PATCH 1/2] ARM: dts: NSP: Device Tree clean-ups

Minor changes to the Broadcom Northstar Plus device tree to make it more
organized and clean. Firstly, move the GIC and L2 cache entries to be
sequential with respect to the memory addresses. Secondly, modify the
address portion of the entry names to reflect the difference from the
range modification.

Signed-off-by: Jon Mason <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 50 +++++++++++++++++++++---------------------
1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 4bcdd28..7335a74 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -58,30 +58,14 @@
};
};

- L2: l2-cache {
- compatible = "arm,pl310-cache";
- reg = <0x2000 0x1000>;
- cache-unified;
- cache-level = <2>;
- };
-
- gic: interrupt-controller@19021000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x1000 0x1000>,
- <0x0100 0x100>;
- };
-
- timer@19020200 {
+ timer@0200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x0200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&periph_clk>;
};

- twd-timer@19020600 {
+ twd-timer@0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x0600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
@@ -89,13 +73,29 @@
clocks = <&periph_clk>;
};

- twd-watchdog@19020620 {
+ twd-watchdog@0620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x0620 0x20>;
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&periph_clk>;
};
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+ <0x0100 0x100>;
+ };
+
+ L2: l2-cache {
+ compatible = "arm,pl310-cache";
+ reg = <0x2000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
};

clocks {
@@ -116,7 +116,7 @@
#address-cells = <1>;
#size-cells = <1>;

- uart0: serial@18000300 {
+ uart0: serial@0300 {
compatible = "ns16550a";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@
status = "disabled";
};

- uart1: serial@18000400 {
+ uart1: serial@0400 {
compatible = "ns16550a";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -132,7 +132,7 @@
status = "disabled";
};

- pcie0: pcie@18012000 {
+ pcie0: pcie@12000 {
compatible = "brcm,iproc-pcie";
reg = <0x12000 0x1000>;

@@ -156,7 +156,7 @@
status = "disabled";
};

- pcie1: pcie@18013000 {
+ pcie1: pcie@13000 {
compatible = "brcm,iproc-pcie";
reg = <0x13000 0x1000>;

@@ -180,7 +180,7 @@
status = "disabled";
};

- pcie2: pcie@18014000 {
+ pcie2: pcie@14000 {
compatible = "brcm,iproc-pcie";
reg = <0x14000 0x1000>;

@@ -204,7 +204,7 @@
status = "disabled";
};

- nand: nand@18026000 {
+ nand: nand@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x026000 0x600>,
<0x11b408 0x600>,
--
1.9.1

2015-11-17 19:55:55

by Jon Mason

Subject: [PATCH 2/2] ARM: dts: NSP: Add I2C support to the DT

Add I2C support to the Broadcom Northstar Plus Device Tree. Since no
driver changes are needed to enable this hardware, only the device tree
changes are required to make this functional.

Signed-off-by: Jon Mason <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 7335a74..b74438c 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -217,5 +217,14 @@

brcm,nand-has-wp;
};
+
+ i2c0: i2c@38000 {
+ compatible = "brcm,iproc-i2c";
+ reg = <0x38000 0x50>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
+ clock-frequency = <100000>;
+ };
};
};
--
1.9.1

2015-11-19 23:37:18

by Florian Fainelli

Subject: Re: [PATCH 0/2] ARM: dts: NSP: clean-ups and I2C support

On 17/11/15 11:55, Jon Mason wrote:
>
> Minor changes to the Broadcom Northstar Plus device tree to make it more
> organized and clean, and adding I2C support (device tree only change
> needed for support).

Series applied, thanks Jon!

>
>
> Jon Mason (2):
> ARM: dts: NSP: Device Tree clean-ups
> ARM: dts: NSP: Add I2C support to the DT
>
> arch/arm/boot/dts/bcm-nsp.dtsi | 59 ++++++++++++++++++++++++------------------
> 1 file changed, 34 insertions(+), 25 deletions(-)
>


--
Florian