This patch enales PCIe PHY in device tree for Broadcom Cygnus based platforms
This patch is developed based on v4.4-rc1 and available here:
https://github.com/Broadcom/cygnus-linux/tree/cygnus-pcie-phy-dt-v1
Ray Jui (1):
ARM: dts: enable PCIe PHY support for Cygnus
arch/arm/boot/dts/bcm-cygnus.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
--
1.9.1
Enable PCIe PHY for both PCIe root complexes on Cygnus
Signed-off-by: Ray Jui <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 2778533..5df5300 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -91,6 +91,21 @@
#address-cells = <1>;
#size-cells = <1>;
+ pcie_phy: phy@0301d0a0 {
+ compatible = "brcm,cygnus-pcie-phy";
+ reg = <0x0301d0a0 0x14>;
+
+ pcie0_phy: phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+
+ pcie1_phy: phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+ };
+
pinctrl: pinctrl@0x0301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x30>,
@@ -161,6 +176,9 @@
ranges = <0x81000000 0 0 0x28000000 0 0x00010000
0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+ phys = <&pcie0_phy>;
+ phy-names = "pcie-phy";
+
status = "disabled";
};
@@ -182,6 +200,9 @@
ranges = <0x81000000 0 0 0x48000000 0 0x00010000
0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+ phys = <&pcie1_phy>;
+ phy-names = "pcie-phy";
+
status = "disabled";
};
--
1.9.1
Any comment on this DT change to enable PCIe PHY support for Cygnus?
Note the PHY driver has been accepted and is in v4.4.
Thanks,
Ray
On 11/18/2015 10:16 AM, Ray Jui wrote:
> Enable PCIe PHY for both PCIe root complexes on Cygnus
>
> Signed-off-by: Ray Jui <[email protected]>
> ---
> arch/arm/boot/dts/bcm-cygnus.dtsi | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 2778533..5df5300 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -91,6 +91,21 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> + pcie_phy: phy@0301d0a0 {
> + compatible = "brcm,cygnus-pcie-phy";
> + reg = <0x0301d0a0 0x14>;
> +
> + pcie0_phy: phy@0 {
> + reg = <0>;
> + #phy-cells = <0>;
> + };
> +
> + pcie1_phy: phy@1 {
> + reg = <1>;
> + #phy-cells = <0>;
> + };
> + };
> +
> pinctrl: pinctrl@0x0301d0c8 {
> compatible = "brcm,cygnus-pinmux";
> reg = <0x0301d0c8 0x30>,
> @@ -161,6 +176,9 @@
> ranges = <0x81000000 0 0 0x28000000 0 0x00010000
> 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
>
> + phys = <&pcie0_phy>;
> + phy-names = "pcie-phy";
> +
> status = "disabled";
> };
>
> @@ -182,6 +200,9 @@
> ranges = <0x81000000 0 0 0x48000000 0 0x00010000
> 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
>
> + phys = <&pcie1_phy>;
> + phy-names = "pcie-phy";
> +
> status = "disabled";
> };
>
>
Ray,
Patch looks good.
On 15-11-18 10:16 AM, Ray Jui wrote:
> Enable PCIe PHY for both PCIe root complexes on Cygnus
>
> Signed-off-by: Ray Jui <[email protected]>
Acked-by: Scott Branden <[email protected]>
> ---
> arch/arm/boot/dts/bcm-cygnus.dtsi | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 2778533..5df5300 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -91,6 +91,21 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> + pcie_phy: phy@0301d0a0 {
> + compatible = "brcm,cygnus-pcie-phy";
> + reg = <0x0301d0a0 0x14>;
> +
> + pcie0_phy: phy@0 {
> + reg = <0>;
> + #phy-cells = <0>;
> + };
> +
> + pcie1_phy: phy@1 {
> + reg = <1>;
> + #phy-cells = <0>;
> + };
> + };
> +
> pinctrl: pinctrl@0x0301d0c8 {
> compatible = "brcm,cygnus-pinmux";
> reg = <0x0301d0c8 0x30>,
> @@ -161,6 +176,9 @@
> ranges = <0x81000000 0 0 0x28000000 0 0x00010000
> 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
>
> + phys = <&pcie0_phy>;
> + phy-names = "pcie-phy";
> +
> status = "disabled";
> };
>
> @@ -182,6 +200,9 @@
> ranges = <0x81000000 0 0 0x48000000 0 0x00010000
> 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
>
> + phys = <&pcie1_phy>;
> + phy-names = "pcie-phy";
> +
> status = "disabled";
> };
>
>
On 18/11/15 10:16, Ray Jui wrote:
> This patch enales PCIe PHY in device tree for Broadcom Cygnus based platforms
>
> This patch is developed based on v4.4-rc1 and available here:
> https://github.com/Broadcom/cygnus-linux/tree/cygnus-pcie-phy-dt-v1
>
> Ray Jui (1):
> ARM: dts: enable PCIe PHY support for Cygnus
Applied to devicetree/next with Scott's Acked-by, thanks!
--
Florian
On 24/11/15 16:12, Florian Fainelli wrote:
> On 18/11/15 10:16, Ray Jui wrote:
>> This patch enales PCIe PHY in device tree for Broadcom Cygnus based platforms
>>
>> This patch is developed based on v4.4-rc1 and available here:
>> https://github.com/Broadcom/cygnus-linux/tree/cygnus-pcie-phy-dt-v1
>>
>> Ray Jui (1):
>> ARM: dts: enable PCIe PHY support for Cygnus
>
> Applied to devicetree/next with Scott's Acked-by, thanks!
This caused the DTC compiler to warn:
Warning (reg_format): "reg" property in /axi/phy@0301d0a0/phy@0 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (reg_format): "reg" property in /axi/phy@0301d0a0/phy@1 has
invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
Warning (avoid_default_addr_size): Relying on default #address-cells
value for /axi/phy@0301d0a0/phy@0
Warning (avoid_default_addr_size): Relying on default #size-cells value
for /axi/phy@0301d0a0/phy@0
Warning (avoid_default_addr_size): Relying on default #address-cells
value for /axi/phy@0301d0a0/phy@1
Warning (avoid_default_addr_size): Relying on default #size-cells value
for /axi/phy@0301d0a0/phy@1
CC drivers/base/power/runtime.o
DTC arch/arm/boot/dts/bcm911360k.dtb
CC lib/bitmap.o
I added an #address-cells = <0> and #size-cells = <1> to fix this, since
your reg property is a single digit.
--
Florian
On 12/1/2015 3:12 PM, Florian Fainelli wrote:
> On 24/11/15 16:12, Florian Fainelli wrote:
>> On 18/11/15 10:16, Ray Jui wrote:
>>> This patch enales PCIe PHY in device tree for Broadcom Cygnus based platforms
>>>
>>> This patch is developed based on v4.4-rc1 and available here:
>>> https://github.com/Broadcom/cygnus-linux/tree/cygnus-pcie-phy-dt-v1
>>>
>>> Ray Jui (1):
>>> ARM: dts: enable PCIe PHY support for Cygnus
>>
>> Applied to devicetree/next with Scott's Acked-by, thanks!
>
> This caused the DTC compiler to warn:
>
> Warning (reg_format): "reg" property in /axi/phy@0301d0a0/phy@0 has
> invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /axi/phy@0301d0a0/phy@1 has
> invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (avoid_default_addr_size): Relying on default #address-cells
> value for /axi/phy@0301d0a0/phy@0
> Warning (avoid_default_addr_size): Relying on default #size-cells value
> for /axi/phy@0301d0a0/phy@0
> Warning (avoid_default_addr_size): Relying on default #address-cells
> value for /axi/phy@0301d0a0/phy@1
> Warning (avoid_default_addr_size): Relying on default #size-cells value
> for /axi/phy@0301d0a0/phy@1
> CC drivers/base/power/runtime.o
> DTC arch/arm/boot/dts/bcm911360k.dtb
> CC lib/bitmap.o
>
> I added an #address-cells = <0> and #size-cells = <1> to fix this, since
> your reg property is a single digit.
>
Sorry I missed that. Both are required properties.
Thanks!
Ray
On Tuesday 01 December 2015 15:12:41 Florian Fainelli wrote:
> CC lib/bitmap.o
>
> I added an #address-cells = <0> and #size-cells = <1> to fix this, since
> your reg property is a single digit.
Did you mean #address-cells = <1> and #size-cells = <0>?
Arnd
On 01/12/15 15:18, Arnd Bergmann wrote:
> On Tuesday 01 December 2015 15:12:41 Florian Fainelli wrote:
>> CC lib/bitmap.o
>>
>> I added an #address-cells = <0> and #size-cells = <1> to fix this, since
>> your reg property is a single digit.
>
> Did you mean #address-cells = <1> and #size-cells = <0>?
Ermm, yes, thanks for catching this..
--
Florian