Add socfpga_arria10_socdk_nand.dts board file for supporting NAND
on Altera Arria10.
Signed-off-by: Graham Moore <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts | 44 ++++++++++++++++++++++++
2 files changed, 45 insertions(+)
create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 30bbc37..7031603 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -556,6 +556,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
+ socfpga_arria10_socdk_nand.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_de0_sockit.dtb \
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
new file mode 100644
index 0000000..e69144b
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2015 Altera Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+#include "socfpga_arria10_socdk.dtsi"
+
+/ {
+ soc {
+ nand: nand@ffb90000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "denali,denali-nand-dt";
+ reg = <0xffb90000 0x72000>, <0xffb80000 0x10000>;
+ reg-names = "nand_data", "denali_reg";
+ interrupts = <0 99 4>;
+ dma-mask = <0xffffffff>;
+ clocks = <&nand_clk>;
+ have-hw-ecc-fixup;
+ status = "okay";
+
+ partition@nand-boot {
+ label = "Boot and fpga data";
+ reg = <0x0 0x1C00000>;
+ };
+ partition@nand-rootfs {
+ label = "Root Filesystem - JFFS2";
+ reg = <0x1C00000 0x6400000>;
+ };
+ };
+ };
+};
--
2.5.0
On 12/10/2015 09:43 AM, Graham Moore wrote:
> Add socfpga_arria10_socdk_nand.dts board file for supporting NAND
> on Altera Arria10.
>
> Signed-off-by: Graham Moore <[email protected]>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts | 44 ++++++++++++++++++++++++
> 2 files changed, 45 insertions(+)
> create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 30bbc37..7031603 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -556,6 +556,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
> sh73a0-kzm9g.dtb
> dtb-$(CONFIG_ARCH_SOCFPGA) += \
> socfpga_arria5_socdk.dtb \
> + socfpga_arria10_socdk_nand.dtb \
This patch does not apply:
error: patch failed: arch/arm/boot/dts/Makefile:556
error: arch/arm/boot/dts/Makefile: patch does not apply
Can you please rebase this patch to my branch:
https://git.kernel.org/cgit/linux/kernel/git/dinguyen/linux.git/log/?h=socfpga_for_next_v4.5_dts
> socfpga_arria10_socdk_sdmmc.dtb \
> socfpga_cyclone5_socdk.dtb \
> socfpga_cyclone5_de0_sockit.dtb \
> diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
> new file mode 100644
> index 0000000..e69144b
> --- /dev/null
> +++ b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
> @@ -0,0 +1,44 @@
> +/*
> + * Copyright (C) 2015 Altera Corporation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
> + * more details.
> + *
> + * You should have received a copy of the GNU General Public License along with
> + * this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +/dts-v1/;
> +#include "socfpga_arria10_socdk.dtsi"
> +
> +/ {
> + soc {
> + nand: nand@ffb90000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "denali,denali-nand-dt";
> + reg = <0xffb90000 0x72000>, <0xffb80000 0x10000>;
> + reg-names = "nand_data", "denali_reg";
> + interrupts = <0 99 4>;
> + dma-mask = <0xffffffff>;
> + clocks = <&nand_clk>;
> + have-hw-ecc-fixup;
"have-hw-ecc-fixup" is not documented anywhere. What is this?
Also, for v2, please resend this patch with to the appropriate people
per what get_maintainers.pl reports:
Dinh Nguyen <[email protected]> (maintainer:ARM/SOCFPGA
ARCHITECTURE)
Rob Herring <[email protected]> (maintainer:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
Pawel Moll <[email protected]> (maintainer:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
Mark Rutland <[email protected]> (maintainer:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Ian Campbell <[email protected]> (maintainer:OPEN FIRMWARE
AND FLATTENED DEVICE TREE BINDINGS)
Kumar Gala <[email protected]> (maintainer:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Russell King <[email protected]> (maintainer:ARM PORT)
[email protected] (open list:OPEN FIRMWARE AND FLATTENED DEVICE
TREE BINDINGS)
[email protected] (moderated list:ARM PORT)
[email protected] (open list)
Thanks,
Dinh