This short patch series adds the ability to sample the interrupted
machine state for each hardware sample.
To test this patchset,
Eg:
$ perf record -I? # list supported registers
output:
available registers: gpr0 gpr1 gpr2 gpr3 gpr4 gpr5 gpr6 gpr7 gpr8 gpr9 gpr10 gpr11 gpr12 gpr13 gpr14 gpr15 gpr16 gpr17 gpr18 gpr19 gpr20 gpr21 gpr22 gpr23 gpr24 gpr25 gpr26 gpr27 gpr28 gpr29 gpr30 gpr31 nip msr orig_r3 ctr link xer ccr trap dar dsisr
usage: perf record [<options>] [<command>]
or: perf record [<options>] -- <command> [<options>]
-I, --intr-regs[=<any register>]
sample selected machine registers on interrupt, use -I ? to list register names
$ perf record -I ls # record machine state at interrupt
$ perf script -D # read the perf.data file
Samplfdoutput obtained for this patchset/ output looks like as follows:
178329381464 0x138 [0x180]: PERF_RECORD_SAMPLE(IP, 0x1): 7803/7803: 0xc00000000000fd9c period: 1 addr: 0
... intr regs: mask 0x3ffffffffff ABI 64-bit
.... gpr0 0xc0000000001a6420
.... gpr1 0xc000001e4df039b0
.... gpr2 0xc000000000cdd100
.... gpr3 0x1
.... gpr4 0xc000001e4a96d000
.... gpr5 0x29854255ba
.... gpr6 0xc000000ffa3050b8
.... gpr7 0x0
.... gpr8 0x0
.... gpr9 0x0
.... gpr10 0x0
.... gpr11 0x0
.... gpr12 0x24022822
.... gpr13 0xc00000000fe03000
.... gpr14 0x0
.... gpr15 0xc000000000d763f8
.... gpr16 0x0
.... gpr17 0xc000001e4ddcf000
.... gpr18 0x0
.... gpr19 0xc000000ffa305000
.... gpr20 0xc000001e4df038c0
.... gpr21 0xc000001e40ed7a00
.... gpr22 0xc0000000000aa28c
.... gpr23 0xc000000000cdd100
.... gpr24 0x0
.... gpr25 0xc000000000cdd100
.... gpr26 0xc000001e4df038b0
.... gpr27 0xfffffffffffffeae
.... gpr28 0xc000001e4df03880
.... gpr29 0xc000000000dce900
.... gpr30 0xc000001e4df03890
.... gpr31 0xc000001e355c7a30
.... nip 0xc0000000001a62d8
.... msr 0x9000000000009032
.... orig_r3 0xc0000000001a6320
.... ctr 0xc0000000000a7be0
.... lnk 0xc0000000001a6428
.... xer 0x0
.... ccr 0x24022888
.... trap 0xf01
.... dar 0xc000001e40ed7a00
.... dsisr 0x3000c0060000004
... thread: :7803:7803
...... dso: /root/.debug/.build-id/d0/eb47b06c0d294143af13c50616f638c2d88658
:7803 7803 178.329381: 1 cycles: c00000000000fd9c .arch_local_irq_restore (/boot/vmlinux)
Changes from V5:
- Enabled perf_sample_regs_user also in this patch set.Functions added in
arch/powerpc/perf/perf_regs.c
- Added Maddy's patch to this patchset for enabling -I? option which will
list the supported register names.
Changes from V4:
- Removed the softe and MQ from all patches
- Switch case is replaced with an array in the 3rd patch
Changes from V3:
- Addressed the comments by Sukadev regarding the nits in the descriptions.
- Modified the subject of first patch.
- Included the sample output in the 3rd patch also.
Changes from V2:
- tools/perf/config/Makefile is moved to the patch tools/perf.
- The patchset is reordered.
- perf_regs_load() function is used for the dwarf unwind test.Since it is not required here,
it is removed from tools/perf/arch/powerpc/include/perf_regs.h
- PERF_REGS_POWERPC_RESULT is removed.
Changes from V1:
- Solved the name missmatch issue in the from and signed-off field of the patch series.
- Added necessary comments in the 3rd patch ie perf/powerpc ,as suggested by Maddy.
Anju T (3):
perf/powerpc: assign an id to each powerpc register
perf/powerpc: add support for sampling intr machine state
tools/perf: Map the ID values with register names
Madhavan Srinivasan (1):
tool/perf: Add sample_reg_mask to include all perf_regs regs
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/uapi/asm/perf_regs.h | 49 +++++++++++++++++
arch/powerpc/perf/Makefile | 1 +
arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++
tools/perf/arch/powerpc/include/perf_regs.h | 65 ++++++++++++++++++++++
tools/perf/arch/powerpc/util/Build | 1 +
tools/perf/arch/powerpc/util/perf_regs.c | 48 ++++++++++++++++
tools/perf/config/Makefile | 5 ++
8 files changed, 255 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
create mode 100644 arch/powerpc/perf/perf_regs.c
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
--
2.1.0
The enum definition assigns an 'id' to each register in "struct pt_regs"
of arch/powerpc. The order of these values in the enum definition are
based on the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h.
Signed-off-by: Anju T <[email protected]>
Reviewed-by : Madhavan Srinivasan <[email protected]>
---
arch/powerpc/include/uapi/asm/perf_regs.h | 49 +++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
new file mode 100644
index 0000000..cfbd068
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -0,0 +1,49 @@
+#ifndef _ASM_POWERPC_PERF_REGS_H
+#define _ASM_POWERPC_PERF_REGS_H
+
+enum perf_event_powerpc_regs {
+ PERF_REG_POWERPC_GPR0,
+ PERF_REG_POWERPC_GPR1,
+ PERF_REG_POWERPC_GPR2,
+ PERF_REG_POWERPC_GPR3,
+ PERF_REG_POWERPC_GPR4,
+ PERF_REG_POWERPC_GPR5,
+ PERF_REG_POWERPC_GPR6,
+ PERF_REG_POWERPC_GPR7,
+ PERF_REG_POWERPC_GPR8,
+ PERF_REG_POWERPC_GPR9,
+ PERF_REG_POWERPC_GPR10,
+ PERF_REG_POWERPC_GPR11,
+ PERF_REG_POWERPC_GPR12,
+ PERF_REG_POWERPC_GPR13,
+ PERF_REG_POWERPC_GPR14,
+ PERF_REG_POWERPC_GPR15,
+ PERF_REG_POWERPC_GPR16,
+ PERF_REG_POWERPC_GPR17,
+ PERF_REG_POWERPC_GPR18,
+ PERF_REG_POWERPC_GPR19,
+ PERF_REG_POWERPC_GPR20,
+ PERF_REG_POWERPC_GPR21,
+ PERF_REG_POWERPC_GPR22,
+ PERF_REG_POWERPC_GPR23,
+ PERF_REG_POWERPC_GPR24,
+ PERF_REG_POWERPC_GPR25,
+ PERF_REG_POWERPC_GPR26,
+ PERF_REG_POWERPC_GPR27,
+ PERF_REG_POWERPC_GPR28,
+ PERF_REG_POWERPC_GPR29,
+ PERF_REG_POWERPC_GPR30,
+ PERF_REG_POWERPC_GPR31,
+ PERF_REG_POWERPC_NIP,
+ PERF_REG_POWERPC_MSR,
+ PERF_REG_POWERPC_ORIG_R3,
+ PERF_REG_POWERPC_CTR,
+ PERF_REG_POWERPC_LNK,
+ PERF_REG_POWERPC_XER,
+ PERF_REG_POWERPC_CCR,
+ PERF_REG_POWERPC_TRAP,
+ PERF_REG_POWERPC_DAR,
+ PERF_REG_POWERPC_DSISR,
+ PERF_REG_POWERPC_MAX,
+};
+#endif /* _ASM_POWERPC_PERF_REGS_H */
--
2.1.0
The perf infrastructure uses a bit mask to find out valid
registers to display. Define a register mask for supported
registers defined in asm/perf_regs.h. The bit positions also
correspond to register IDs which is used by perf infrastructure
to fetch the register values. CONFIG_HAVE_PERF_REGS enables
sampling of the interrupted machine state.
Signed-off-by: Anju T <[email protected]>
Reviewed-by : Madhavan Srinivasan <[email protected]>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/perf/Makefile | 1 +
arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 87 insertions(+)
create mode 100644 arch/powerpc/perf/perf_regs.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9a7057e..c4ce60d 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -119,6 +119,7 @@ config PPC
select GENERIC_ATOMIC64 if PPC32
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select HAVE_PERF_EVENTS
+ select HAVE_PERF_REGS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
select ARCH_WANT_IPC_PARSE_VERSION
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index f9c083a..2f2d3d2 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile
@@ -8,6 +8,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
power8-pmu.o
obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
+obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
new file mode 100644
index 0000000..d32581763
--- /dev/null
+++ b/arch/powerpc/perf/perf_regs.c
@@ -0,0 +1,85 @@
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/bug.h>
+#include <linux/stddef.h>
+#include <asm/ptrace.h>
+#include <asm/perf_regs.h>
+
+#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
+
+#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
+
+static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
+};
+
+u64 perf_reg_value(struct pt_regs *regs, int idx)
+{
+ if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
+ return 0;
+
+ return regs_get_register(regs, pt_regs_offset[idx]);
+}
+
+int perf_reg_validate(u64 mask)
+{
+ if (!mask || mask & REG_RESERVED)
+ return -EINVAL;
+ return 0;
+}
+
+u64 perf_reg_abi(struct task_struct *task)
+{
+ return PERF_SAMPLE_REGS_ABI_64;
+}
+
+void perf_get_regs_user(struct perf_regs *regs_user,
+ struct pt_regs *regs,
+ struct pt_regs *regs_user_copy)
+{
+ regs_user->regs = task_pt_regs(current);
+ regs_user->abi = perf_reg_abi(current);
+}
--
2.1.0
Map ID values with corresponding register names. These names are then
displayed when user issues perf record with the -I option
followed by perf report/script with -D option.
To test this patchset,
Eg:
$ perf record -I ls # record machine state at interrupt
$ perf script -D # read the perf.data file
Sample output obtained for this patch / output looks like as follows:
178329381464 0x138 [0x180]: PERF_RECORD_SAMPLE(IP, 0x1): 7803/7803: 0xc00000000000fd9c period: 1 addr: 0
... intr regs: mask 0x3ffffffffff ABI 64-bit
.... gpr0 0xc0000000001a6420
.... gpr1 0xc000001e4df039b0
.... gpr2 0xc000000000cdd100
.... gpr3 0x1
.... gpr4 0xc000001e4a96d000
.... gpr5 0x29854255ba
.... gpr6 0xc000000ffa3050b8
.... gpr7 0x0
.... gpr8 0x0
.... gpr9 0x0
.... gpr10 0x0
.... gpr11 0x0
.... gpr12 0x24022822
.... gpr13 0xc00000000fe03000
.... gpr14 0x0
.... gpr15 0xc000000000d763f8
.... gpr16 0x0
.... gpr17 0xc000001e4ddcf000
.... gpr18 0x0
.... gpr19 0xc000000ffa305000
.... gpr20 0xc000001e4df038c0
.... gpr21 0xc000001e40ed7a00
.... gpr22 0xc0000000000aa28c
.... gpr23 0xc000000000cdd100
.... gpr24 0x0
.... gpr25 0xc000000000cdd100
.... gpr26 0xc000001e4df038b0
.... gpr27 0xfffffffffffffeae
.... gpr28 0xc000001e4df03880
.... gpr29 0xc000000000dce900
.... gpr30 0xc000001e4df03890
.... gpr31 0xc000001e355c7a30
.... nip 0xc0000000001a62d8
.... msr 0x9000000000009032
.... orig_r3 0xc0000000001a6320
.... ctr 0xc0000000000a7be0
.... lnk 0xc0000000001a6428
.... xer 0x0
.... ccr 0x24022888
.... trap 0xf01
.... dar 0xc000001e40ed7a00
.... dsisr 0x3000c0060000004
... thread: :7803:7803
...... dso: /root/.debug/.build-id/d0/eb47b06c0d294143af13c50616f638c2d88658
:7803 7803 178.329381: 1 cycles: c00000000000fd9c .arch_local_irq_restore (/boot/vmlinux)
Signed-off-by: Anju T <[email protected]>
Reviewed-by : Madhavan Srinivasan <[email protected]>
---
tools/perf/arch/powerpc/include/perf_regs.h | 65 +++++++++++++++++++++++++++++
tools/perf/config/Makefile | 5 +++
2 files changed, 70 insertions(+)
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
new file mode 100644
index 0000000..b4f62a3
--- /dev/null
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -0,0 +1,65 @@
+#ifndef ARCH_PERF_REGS_H
+#define ARCH_PERF_REGS_H
+
+#include <stdlib.h>
+#include <linux/types.h>
+#include <asm/perf_regs.h>
+
+#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
+#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
+#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
+
+#define PERF_REG_IP PERF_REG_POWERPC_NIP
+#define PERF_REG_SP PERF_REG_POWERPC_R1
+
+static const char *perf_reg_names[] = {
+ [PERF_REG_POWERPC_GPR0] = "gpr0",
+ [PERF_REG_POWERPC_GPR1] = "gpr1",
+ [PERF_REG_POWERPC_GPR2] = "gpr2",
+ [PERF_REG_POWERPC_GPR3] = "gpr3",
+ [PERF_REG_POWERPC_GPR4] = "gpr4",
+ [PERF_REG_POWERPC_GPR5] = "gpr5",
+ [PERF_REG_POWERPC_GPR6] = "gpr6",
+ [PERF_REG_POWERPC_GPR7] = "gpr7",
+ [PERF_REG_POWERPC_GPR8] = "gpr8",
+ [PERF_REG_POWERPC_GPR9] = "gpr9",
+ [PERF_REG_POWERPC_GPR10] = "gpr10",
+ [PERF_REG_POWERPC_GPR11] = "gpr11",
+ [PERF_REG_POWERPC_GPR12] = "gpr12",
+ [PERF_REG_POWERPC_GPR13] = "gpr13",
+ [PERF_REG_POWERPC_GPR14] = "gpr14",
+ [PERF_REG_POWERPC_GPR15] = "gpr15",
+ [PERF_REG_POWERPC_GPR16] = "gpr16",
+ [PERF_REG_POWERPC_GPR17] = "gpr17",
+ [PERF_REG_POWERPC_GPR18] = "gpr18",
+ [PERF_REG_POWERPC_GPR19] = "gpr19",
+ [PERF_REG_POWERPC_GPR20] = "gpr20",
+ [PERF_REG_POWERPC_GPR21] = "gpr21",
+ [PERF_REG_POWERPC_GPR22] = "gpr22",
+ [PERF_REG_POWERPC_GPR23] = "gpr23",
+ [PERF_REG_POWERPC_GPR24] = "gpr24",
+ [PERF_REG_POWERPC_GPR25] = "gpr25",
+ [PERF_REG_POWERPC_GPR26] = "gpr26",
+ [PERF_REG_POWERPC_GPR27] = "gpr27",
+ [PERF_REG_POWERPC_GPR28] = "gpr28",
+ [PERF_REG_POWERPC_GPR29] = "gpr29",
+ [PERF_REG_POWERPC_GPR30] = "gpr30",
+ [PERF_REG_POWERPC_GPR31] = "gpr31",
+ [PERF_REG_POWERPC_NIP] = "nip",
+ [PERF_REG_POWERPC_MSR] = "msr",
+ [PERF_REG_POWERPC_ORIG_R3] = "orig_r3",
+ [PERF_REG_POWERPC_CTR] = "ctr",
+ [PERF_REG_POWERPC_LNK] = "lnk",
+ [PERF_REG_POWERPC_XER] = "xer",
+ [PERF_REG_POWERPC_CCR] = "ccr",
+ [PERF_REG_POWERPC_TRAP] = "trap",
+ [PERF_REG_POWERPC_DAR] = "dar",
+ [PERF_REG_POWERPC_DSISR] = "dsisr"
+};
+
+static inline const char *perf_reg_name(int id)
+{
+
+ return perf_reg_names[id];
+}
+#endif /* ARCH_PERF_REGS_H */
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 38a0853..acf0302 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -23,6 +23,11 @@ $(call detected_var,ARCH)
NO_PERF_REGS := 1
+# Additional ARCH settings for ppc64
+ifeq ($(ARCH),powerpc)
+ NO_PERF_REGS := 0
+endif
+
# Additional ARCH settings for x86
ifeq ($(ARCH),x86)
$(call detected,CONFIG_X86)
--
2.1.0
From: Madhavan Srinivasan <[email protected]>
Add sample_reg_mask array with pt_regs registers.
This is needed for printing supported regs ( -I? option).
Signed-off-by: Madhavan Srinivasan <[email protected]>
---
tools/perf/arch/powerpc/util/Build | 1 +
tools/perf/arch/powerpc/util/perf_regs.c | 48 ++++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
diff --git a/tools/perf/arch/powerpc/util/Build b/tools/perf/arch/powerpc/util/Build
index 7b8b0d1..3deb1bc 100644
--- a/tools/perf/arch/powerpc/util/Build
+++ b/tools/perf/arch/powerpc/util/Build
@@ -1,5 +1,6 @@
libperf-y += header.o
libperf-y += sym-handling.o
+libperf-y += perf_regs.o
libperf-$(CONFIG_DWARF) += dwarf-regs.o
libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c b/tools/perf/arch/powerpc/util/perf_regs.c
new file mode 100644
index 0000000..0b0ec65
--- /dev/null
+++ b/tools/perf/arch/powerpc/util/perf_regs.c
@@ -0,0 +1,48 @@
+#include "../../perf.h"
+#include "../../util/perf_regs.h"
+
+const struct sample_reg sample_reg_masks[] = {
+ SMPL_REG(gpr0, PERF_REG_POWERPC_GPR0),
+ SMPL_REG(gpr1, PERF_REG_POWERPC_GPR1),
+ SMPL_REG(gpr2, PERF_REG_POWERPC_GPR2),
+ SMPL_REG(gpr3, PERF_REG_POWERPC_GPR3),
+ SMPL_REG(gpr4, PERF_REG_POWERPC_GPR4),
+ SMPL_REG(gpr5, PERF_REG_POWERPC_GPR5),
+ SMPL_REG(gpr6, PERF_REG_POWERPC_GPR6),
+ SMPL_REG(gpr7, PERF_REG_POWERPC_GPR7),
+ SMPL_REG(gpr8, PERF_REG_POWERPC_GPR8),
+ SMPL_REG(gpr9, PERF_REG_POWERPC_GPR9),
+ SMPL_REG(gpr10, PERF_REG_POWERPC_GPR10),
+ SMPL_REG(gpr11, PERF_REG_POWERPC_GPR11),
+ SMPL_REG(gpr12, PERF_REG_POWERPC_GPR12),
+ SMPL_REG(gpr13, PERF_REG_POWERPC_GPR13),
+ SMPL_REG(gpr14, PERF_REG_POWERPC_GPR14),
+ SMPL_REG(gpr15, PERF_REG_POWERPC_GPR15),
+ SMPL_REG(gpr16, PERF_REG_POWERPC_GPR16),
+ SMPL_REG(gpr17, PERF_REG_POWERPC_GPR17),
+ SMPL_REG(gpr18, PERF_REG_POWERPC_GPR18),
+ SMPL_REG(gpr19, PERF_REG_POWERPC_GPR19),
+ SMPL_REG(gpr20, PERF_REG_POWERPC_GPR20),
+ SMPL_REG(gpr21, PERF_REG_POWERPC_GPR21),
+ SMPL_REG(gpr22, PERF_REG_POWERPC_GPR22),
+ SMPL_REG(gpr23, PERF_REG_POWERPC_GPR23),
+ SMPL_REG(gpr24, PERF_REG_POWERPC_GPR24),
+ SMPL_REG(gpr25, PERF_REG_POWERPC_GPR25),
+ SMPL_REG(gpr26, PERF_REG_POWERPC_GPR26),
+ SMPL_REG(gpr27, PERF_REG_POWERPC_GPR27),
+ SMPL_REG(gpr28, PERF_REG_POWERPC_GPR28),
+ SMPL_REG(gpr29, PERF_REG_POWERPC_GPR29),
+ SMPL_REG(gpr30, PERF_REG_POWERPC_GPR30),
+ SMPL_REG(gpr31, PERF_REG_POWERPC_GPR31),
+ SMPL_REG(nip, PERF_REG_POWERPC_NIP),
+ SMPL_REG(msr, PERF_REG_POWERPC_MSR),
+ SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
+ SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
+ SMPL_REG(link, PERF_REG_POWERPC_LNK),
+ SMPL_REG(xer, PERF_REG_POWERPC_XER),
+ SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
+ SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
+ SMPL_REG(dar, PERF_REG_POWERPC_DAR),
+ SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
+ SMPL_REG_END
+};
--
2.1.0