2015-12-16 05:51:27

by Tang Yuantian

Subject: [PATCH 1/2] ahci: qoriq: Adjust the default register values on ls1043a

From: Tang Yuantian <[email protected]>

Updated the registers' values to enhance SATA performance and
reliability.

Signed-off-by: Tang Yuantian <[email protected]>
---
drivers/ata/ahci_qoriq.c | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index d0f9de9..4d613f8 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c
@@ -39,6 +39,8 @@
#define AHCI_PORT_PHY_4_CFG 0x00480811
#define AHCI_PORT_PHY_5_CFG 0x192c96a4
#define AHCI_PORT_TRANS_CFG 0x08000025
+#define LS1043A_PORT_PHY2 0x28184d1f
+#define LS1043A_PORT_PHY3 0x0e081509

#define SATA_ECC_DISABLE 0x00020000

@@ -159,6 +161,12 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
break;

case AHCI_LS1043A:
+ writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
+ writel(LS1043A_PORT_PHY2, reg_base + PORT_PHY2);
+ writel(LS1043A_PORT_PHY3, reg_base + PORT_PHY3);
+ writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
+ break;
+
case AHCI_LS2080A:
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
break;
--
2.1.0.27.g96db324

2015-12-16 05:51:33

by Tang Yuantian

Subject: [PATCH 2/2] ahci: qoriq: Update the default Rx watermark value

From: Tang Yuantian <[email protected]>

The PTC[RXWM] sets the watermark value for Rx FIFO. The default
value 0x20 might be insufficient for some hard drives. If the
watermark value is too small, a single-cycle overflow may occur
and is reported as a CRC or internal error in the PxSERR register.
Updated the value to 0x29 according to the validation test.
All LS platforms are affected.

Signed-off-by: Tang Yuantian <[email protected]>
---
drivers/ata/ahci_qoriq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq.c
index 4d613f8..256d911 100644
--- a/drivers/ata/ahci_qoriq.c
+++ b/drivers/ata/ahci_qoriq.c
@@ -38,7 +38,7 @@
#define AHCI_PORT_PHY_3_CFG 0x0e081004
#define AHCI_PORT_PHY_4_CFG 0x00480811
#define AHCI_PORT_PHY_5_CFG 0x192c96a4
-#define AHCI_PORT_TRANS_CFG 0x08000025
+#define AHCI_PORT_TRANS_CFG 0x08000029
#define LS1043A_PORT_PHY2 0x28184d1f
#define LS1043A_PORT_PHY3 0x0e081509

@@ -169,6 +169,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)

case AHCI_LS2080A:
writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
+ writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
break;
}

--
2.1.0.27.g96db324

2015-12-16 15:25:24

by Tejun Heo

Subject: Re: [PATCH 2/2] ahci: qoriq: Update the default Rx watermark value

On Wed, Dec 16, 2015 at 01:43:50PM +0800, [email protected] wrote:
> From: Tang Yuantian <[email protected]>
>
> The PTC[RXWM] sets the watermark value for Rx FIFO. The default
> value 0x20 might be insufficient for some hard drives. If the
> watermark value is too small, a single-cycle overflow may occur
> and is reported as a CRC or internal error in the PxSERR register.
> Updated the value to 0x29 according to the validation test.
> All LS platforms are affected.
>
> Signed-off-by: Tang Yuantian <[email protected]>

Applied 1-2 to libata/for-4.5.

Thanks.

--
tejun