2015-12-31 17:47:21

by Roman Volkov

[permalink] [raw]
Subject: [PATCH v3 RESEND 0/2] WM8505/WM8650 DT fixes for SD card controller

From: Roman Volkov <[email protected]>

This patch set enables SD controller support for WM8650 and
fixes minor errors in WM8505 Device Tree file.

Changes in v3:
1. Add minor fixes for WM8505 SDHC node

Tested on both WM8505 and WM8650.

Roman Volkov (2):
dts: vt8500: Add SDHC node to DTS file for WM8650
dts: vt8500: Fix errors in SDHC node for WM8505

arch/arm/boot/dts/wm8505.dtsi | 4 ++--
arch/arm/boot/dts/wm8650.dtsi | 9 +++++++++
2 files changed, 11 insertions(+), 2 deletions(-)

--
Hi maintainers, I see my previous versions were not applied. Could this
little patch set be applied for the linux-next? I don't think this is new
functionality, this must be considered as bugfix for existing Device Tree.

Any other suggestions?

2.3.1


2015-12-31 17:48:10

by Roman Volkov

[permalink] [raw]
Subject: [PATCH v3 RESEND 1/2] dts: vt8500: Add SDHC node to DTS file for WM8650

From: Roman Volkov <[email protected]>

Since WM8650 has the same 'WMT' SDHC controller as WM8505, and the driver
is already in the kernel, this node enables the controller support for
WM8650

Signed-off-by: Roman Volkov <[email protected]>
Reviewed-by: Alexey Charkov <[email protected]>
---
arch/arm/boot/dts/wm8650.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index b1c59a7..e12213d 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -187,6 +187,15 @@
interrupts = <43>;
};

+ sdhc@d800a000 {
+ compatible = "wm,wm8505-sdhc";
+ reg = <0xd800a000 0x400>;
+ interrupts = <20>, <21>;
+ clocks = <&clksdhc>;
+ bus-width = <4>;
+ sdon-inverted;
+ };
+
fb: fb@d8050800 {
compatible = "wm,wm8505-fb";
reg = <0xd8050800 0x200>;
--
2.3.1

2015-12-31 17:48:17

by Roman Volkov

[permalink] [raw]
Subject: [PATCH v3 RESEND 2/2] dts: vt8500: Fix errors in SDHC node for WM8505

From: Roman Volkov <[email protected]>

According to datasheet, the registers space of SDHC controller is 1Kb,
not '0x1000', the correct value should be '0x400'. Bracket interrupt
numbers individually per recommendations.

Signed-off-by: Roman Volkov <[email protected]>
---
arch/arm/boot/dts/wm8505.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index a1a854b..e9ef539 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -281,8 +281,8 @@

sdhc@d800a000 {
compatible = "wm,wm8505-sdhc";
- reg = <0xd800a000 0x1000>;
- interrupts = <20 21>;
+ reg = <0xd800a000 0x400>;
+ interrupts = <20>, <21>;
clocks = <&clksdhc>;
bus-width = <4>;
};
--
2.3.1