Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe-siram
Changes for v3
- Add SoC specific caompatible strings to qe-si and qe-siram
.../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 50 ++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f89302..7ab21cb 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,56 @@ Example:
};
};
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
+ };
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+ si1: si@700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,t1040-qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+ siram1: siram@1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
* QE Firmware Node
This node defines a firmware binary that is embedded in the device tree, for
--
2.1.0.27.g96db324
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v2
- rebase
Changes for v3
- rebase
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi | 39 +++++++++++++++++++++++++
2 files changed, 84 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index e0f4da5..012f813 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
@@ -673,3 +673,48 @@
};
};
};
+
+&qe {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ compatible = "fsl,qe";
+ fsl,qe-num-riscs = <1>;
+ fsl,qe-num-snums = <28>;
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
+ };
+
+ ucc@2000 {
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ };
+
+ ucc@2200 {
+ cell-index = <3>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
+ };
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0x0 0x10000 0x6000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0x0 0x6000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
index 3f6d7c6..d9e89d5 100644
--- a/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi
@@ -212,4 +212,43 @@
0 0x00010000>;
};
};
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
};
--
2.1.0.27.g96db324
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v2
- rebase
Changes for v3
- rebase
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 39 +++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..79d923e 100644
--- a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
@@ -186,4 +186,43 @@
0 0x00010000>;
};
};
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
};
--
2.1.0.27.g96db324
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v2
- NA
.../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
new file mode 100644
index 0000000..436c71c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
@@ -0,0 +1,19 @@
+* Serial
+
+Currently defined compatibles:
+- ucc_uart
+
+Properties for ucc_uart:
+port-number : port number of UCC-UART
+tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source,
+ should be "clk1"-"clk28" for external clock source.
+
+Example:
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
--
2.1.0.27.g96db324
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v3
- NA
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/brg.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/i2c.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/pic.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/usb.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/network.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt | 0
.../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/firmware.txt | 0
.../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/par_io.txt | 0
.../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/pincfg.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/ucc.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/usb.txt | 0
Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/serial.txt | 0
.../devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/uqe_serial.txt | 0
15 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/brg.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/i2c.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/pic.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/cpm/usb.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/gpio.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/network.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/firmware.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/par_io.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/pincfg.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/ucc.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/qe/usb.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/serial.txt (100%)
rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/cpm_qe/uqe_serial.txt (100%)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/brg.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/brg.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/i2c.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/pic.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/pic.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/cpm/usb.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/usb.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/gpio.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/firmware.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/firmware.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/firmware.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/firmware.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/par_io.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/par_io.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/par_io.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/par_io.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/pincfg.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/pincfg.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ucc.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ucc.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ucc.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/usb.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/usb.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/usb.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/serial.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/serial.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/serial.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/serial.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/uqe_serial.txt
similarity index 100%
rename from Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
rename to Documentation/devicetree/bindings/soc/fsl/cpm_qe/uqe_serial.txt
--
2.1.0.27.g96db324
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
Changes for v3
- use fsl,tx-timeslot-mask instead of fsl,tx-timeslot
- use fsl,rx-timeslot-mask instead of fsl,rx-timeslot
- add more info
.../bindings/powerpc/fsl/cpm_qe/network.txt | 81 ++++++++++++++++++++++
1 file changed, 81 insertions(+)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
index 29b28b8..03c7416 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
@@ -41,3 +41,84 @@ Example:
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
};
+
+* HDLC
+
+Currently defined compatibles:
+- fsl,ucc-hdlc
+
+Properties for fsl,ucc-hdlc:
+- rx-clock-name
+- tx-clock-name
+ Usage: required
+ Value type: <string>
+ Definition : Must be "brg1"-"brg16" for internal clock source,
+ Must be "clk1"-"clk24" for external clock source.
+
+- fsl,tdm-interface
+ Usage: optional
+ Value type: <empty>
+ Definition : Specify that hdlc is based on tdm-interface
+
+The property below is dependent on fsl,tdm-interface:
+- fsl,rx-sync-clock
+ Usage: required
+ Value type: <string>
+ Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tx-sync-clock
+ Usage: required
+ Value type: <string>
+ Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
+
+- fsl,tdm-framer-type
+ Usage: required for tdm interface
+ Value type: <string>
+ Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
+ are not supported.
+
+- fsl,tdm-id
+ Usage: required for tdm interface
+ Value type: <u32>
+ Definition : number of TDM ID
+
+- fsl,tx-timeslot-mask
+- fsl,rx-timeslot-mask
+ Usage: required for tdm interface
+ Value type: <u32>
+ Definition : time slot mask for TDM operation. Indicates which time
+ slots used for transmitting and receiving.
+
+- fsl,siram-entry-id
+ Usage: required for tdm interface
+ Value type: <u32>
+ Definition : Must be 0,2,4...64. the number of TDM entry.
+
+- fsl,tdm-internal-loopback
+ usage: optional for tdm interface
+ value type: <empty>
+ Definition : Internal loopback connecting on TDM layer.
+
+Example for tdm interface:
+
+ ucc@2000 {
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+Example for hdlc without tdm interface:
+
+ ucc@2000 {
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "brg1";
+ tx-clock-name = "brg1";
+ };
--
2.1.0.27.g96db324
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <[email protected]>
---
Changes for v2
- rebase
Changes for v3
- rebase
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 39 +++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
index 1498d1e..ab5f081 100644
--- a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
@@ -190,4 +190,43 @@
0 0x00010000>;
};
};
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ fsl,tdm-interface;
+ };
+
+ ucc_serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
};
--
2.1.0.27.g96db324
On Tue, Mar 01, 2016 at 03:09:37PM +0800, Zhao Qiang wrote:
> Add IC, SI and SIRAM document of QE to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
>
> Signed-off-by: Zhao Qiang <[email protected]>
> ---
> Changes for v2
> - Add interrupt-controller in Required properties
> - delete address-cells and size-cells for qe-si and qe-siram
> Changes for v3
> - Add SoC specific caompatible strings to qe-si and qe-siram
>
> .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 50 ++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
Acked-by: Rob Herring <[email protected]>
On Tue, Mar 01, 2016 at 03:09:38PM +0800, Zhao Qiang wrote:
> Add ucc hdlc document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
>
> Signed-off-by: Zhao Qiang <[email protected]>
> ---
> Changes for v2
> - use ucc-hdlc instead of ucc_hdlc
> - add more information to properties.
> Changes for v3
> - use fsl,tx-timeslot-mask instead of fsl,tx-timeslot
> - use fsl,rx-timeslot-mask instead of fsl,rx-timeslot
> - add more info
>
> .../bindings/powerpc/fsl/cpm_qe/network.txt | 81 ++++++++++++++++++++++
> 1 file changed, 81 insertions(+)
Acked-by: Rob Herring <[email protected]>
On Tue, Mar 01, 2016 at 03:09:39PM +0800, Zhao Qiang wrote:
> Add uqe_serial document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
>
> Signed-off-by: Zhao Qiang <[email protected]>
> ---
> Changes for v2
> - modify tx/rx-clock-name specification
> Changes for v2
> - NA
>
> .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> new file mode 100644
> index 0000000..436c71c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> @@ -0,0 +1,19 @@
> +* Serial
> +
> +Currently defined compatibles:
> +- ucc_uart
I guess this is in use already and okay. However, looking at the driver
there really should be SoC specific compatible strings here since the
driver is looking up the SoC compatible string and composing the
firmware filename from that.
> +
> +Properties for ucc_uart:
> +port-number : port number of UCC-UART
> +tx/rx-clock-name : should be "brg1"-"brg16" for internal clock source,
> + should be "clk1"-"clk28" for external clock source.
> +
> +Example:
> +
> + ucc_serial: ucc@2200 {
> + device_type = "serial";
Drop device_type. It should only be used in a few legacy cases.
Looks like the driver is matching on this. Please drop it from the
driver too. I'd leave dts files for now, but they should be updated too
later.
> + compatible = "ucc_uart";
> + port-number = <1>;
> + rx-clock-name = "brg2";
> + tx-clock-name = "brg2";
> + };
> --
> 2.1.0.27.g96db324
>
On Tue, Mar 01, 2016 at 03:09:40PM +0800, Zhao Qiang wrote:
> cpm_qe is supported on both powerpc and arm.
> and the QE code has been moved from arch/powerpc into
> drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
> to soc/fsl
>
> Signed-off-by: Zhao Qiang <[email protected]>
> ---
I already acked this. In the future, please add acks on subsequent revs.
Acked-by: Rob Herring <[email protected]>
On Tue, Mar 05, 2016 at 12:26PM, Rob Herring wrote:
> -----Original Message-----
> From: Rob Herring [mailto:[email protected]]
> Sent: Saturday, March 05, 2016 12:26 PM
> To: Qiang Zhao <[email protected]>
> Cc: [email protected]; Yang-Leo Li <[email protected]>; Xiaobo Xie
> <[email protected]>; [email protected];
> [email protected]; [email protected]
> Subject: Re: [PATCH v3 3/7] QE: Add uqe_serial document to bindings
>
> On Tue, Mar 01, 2016 at 03:09:39PM +0800, Zhao Qiang wrote:
> > Add uqe_serial document to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> >
> > Signed-off-by: Zhao Qiang <[email protected]>
> > ---
> > Changes for v2
> > - modify tx/rx-clock-name specification Changes for v2
> > - NA
> >
> > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19
> +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> >
> > diff --git
> > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > new file mode 100644
> > index 0000000..436c71c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > +++ txt
> > @@ -0,0 +1,19 @@
> > +* Serial
> > +
> > +Currently defined compatibles:
> > +- ucc_uart
>
> I guess this is in use already and okay. However, looking at the driver there
> really should be SoC specific compatible strings here since the driver is looking
> up the SoC compatible string and composing the firmware filename from that.
Ok, I will changed both driver and this compatible.
>
> > +
> > +Properties for ucc_uart:
> > +port-number : port number of UCC-UART tx/rx-clock-name : should be
> > +"brg1"-"brg16" for internal clock source,
> > + should be "clk1"-"clk28" for external clock source.
> > +
> > +Example:
> > +
> > + ucc_serial: ucc@2200 {
> > + device_type = "serial";
>
> Drop device_type. It should only be used in a few legacy cases.
>
> Looks like the driver is matching on this. Please drop it from the driver too. I'd
> leave dts files for now, but they should be updated too later.
Ok, Thank you for your Reviewing, I will drop it
>
> > + compatible = "ucc_uart";
> > + port-number = <1>;
> > + rx-clock-name = "brg2";
> > + tx-clock-name = "brg2";
> > + };
> > --
> > 2.1.0.27.g96db324
> >
On Mon, 2016-03-07 at 02:35 +0000, Qiang Zhao wrote:
> On Tue, Mar 05, 2016 at 12:26PM, Rob Herring wrote:
> > -----Original Message-----
> > From: Rob Herring [mailto:[email protected]]
> > Sent: Saturday, March 05, 2016 12:26 PM
> > To: Qiang Zhao <[email protected]>
> > Cc: [email protected]; Yang-Leo Li <[email protected]>; Xiaobo Xie
> > <[email protected]>; [email protected];
> > [email protected]; [email protected]
> > Subject: Re: [PATCH v3 3/7] QE: Add uqe_serial document to bindings
> >
> > On Tue, Mar 01, 2016 at 03:09:39PM +0800, Zhao Qiang wrote:
> > > Add uqe_serial document to
> > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > >
> > > Signed-off-by: Zhao Qiang <[email protected]>
> > > ---
> > > Changes for v2
> > > - modify tx/rx-clock-name specification Changes for v2
> > > - NA
> > >
> > > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19
> > +++++++++++++++++++
> > > 1 file changed, 19 insertions(+)
> > > create mode 100644
> > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
> > > new file mode 100644
> > > index 0000000..436c71c
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > +++ txt
> > > @@ -0,0 +1,19 @@
> > > +* Serial
> > > +
> > > +Currently defined compatibles:
> > > +- ucc_uart
> >
> > I guess this is in use already and okay. However, looking at the driver
> > there
> > really should be SoC specific compatible strings here since the driver is
> > looking
> > up the SoC compatible string and composing the firmware filename from
> > that.
>
> Ok, I will changed both driver and this compatible.
But don't break existing device trees while doing so.
-Scott
On Tue, Mar 08, 2016 at 1:28AM, Scott Wood wrote:
> -----Original Message-----
> From: Scott Wood [mailto:[email protected]]
> Sent: Tuesday, March 08, 2016 1:28 AM
> To: Qiang Zhao <[email protected]>; Rob Herring <[email protected]>
> Cc: Yang-Leo Li <[email protected]>; Xiaobo Xie <[email protected]>;
> [email protected]; [email protected]; linuxppc-
> [email protected]
> Subject: Re: [PATCH v3 3/7] QE: Add uqe_serial document to bindings
>
> On Mon, 2016-03-07 at 02:35 +0000, Qiang Zhao wrote:
> > On Tue, Mar 05, 2016 at 12:26PM, Rob Herring wrote:
> > > -----Original Message-----
> > > From: Rob Herring [mailto:[email protected]]
> > > Sent: Saturday, March 05, 2016 12:26 PM
> > > To: Qiang Zhao <[email protected]>
> > > Cc: [email protected]; Yang-Leo Li <[email protected]>; Xiaobo Xie
> > > <[email protected]>; [email protected];
> > > [email protected]; [email protected]
> > > Subject: Re: [PATCH v3 3/7] QE: Add uqe_serial document to bindings
> > >
> > > On Tue, Mar 01, 2016 at 03:09:39PM +0800, Zhao Qiang wrote:
> > > > Add uqe_serial document to
> > > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.tx
> > > > t
> > > >
> > > > Signed-off-by: Zhao Qiang <[email protected]>
> > > > ---
> > > > Changes for v2
> > > > - modify tx/rx-clock-name specification Changes for v2
> > > > - NA
> > > >
> > > > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19
> > > +++++++++++++++++++
> > > > 1 file changed, 19 insertions(+)
> > > > create mode 100644
> > > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.tx
> > > > t
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > > txt
> > > > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > > txt
> > > > new file mode 100644
> > > > index 0000000..436c71c
> > > > --- /dev/null
> > > > +++
> b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > > +++ txt
> > > > @@ -0,0 +1,19 @@
> > > > +* Serial
> > > > +
> > > > +Currently defined compatibles:
> > > > +- ucc_uart
> > >
> > > I guess this is in use already and okay. However, looking at the
> > > driver there really should be SoC specific compatible strings here
> > > since the driver is looking up the SoC compatible string and
> > > composing the firmware filename from that.
> >
> > Ok, I will changed both driver and this compatible.
>
> But don't break existing device trees while doing so.
Do I need to send driver patch in this patchset or a individual patch?
BR
-Zhao Qiang
On Tue, 2016-03-08 at 01:16 +0000, Qiang Zhao wrote:
> On Tue, Mar 08, 2016 at 1:28AM, Scott Wood wrote:
> > -----Original Message-----
> > From: Scott Wood [mailto:[email protected]]
> > Sent: Tuesday, March 08, 2016 1:28 AM
> > To: Qiang Zhao <[email protected]>; Rob Herring <[email protected]>
> > Cc: Yang-Leo Li <[email protected]>; Xiaobo Xie <[email protected]>;
> > [email protected]; [email protected]; linuxppc-
> > [email protected]
> > Subject: Re: [PATCH v3 3/7] QE: Add uqe_serial document to bindings
> >
> > On Mon, 2016-03-07 at 02:35 +0000, Qiang Zhao wrote:
> > > On Tue, Mar 05, 2016 at 12:26PM, Rob Herring wrote:
> > > > -----Original Message-----
> > > > From: Rob Herring [mailto:[email protected]]
> > > > Sent: Saturday, March 05, 2016 12:26 PM
> > > > To: Qiang Zhao <[email protected]>
> > > > Cc: [email protected]; Yang-Leo Li <[email protected]>; Xiaobo Xie
> > > > <[email protected]>; [email protected];
> > > > [email protected]; [email protected]
> > > > Subject: Re: [PATCH v3 3/7] QE: Add uqe_serial document to bindings
> > > >
> > > > On Tue, Mar 01, 2016 at 03:09:39PM +0800, Zhao Qiang wrote:
> > > > > Add uqe_serial document to
> > > > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.tx
> > > > > t
> > > > >
> > > > > Signed-off-by: Zhao Qiang <[email protected]>
> > > > > ---
> > > > > Changes for v2
> > > > > - modify tx/rx-clock-name specification Changes for v2
> > > > > - NA
> > > > >
> > > > > .../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt | 19
> > > > +++++++++++++++++++
> > > > > 1 file changed, 19 insertions(+)
> > > > > create mode 100644
> > > > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.tx
> > > > > t
> > > > >
> > > > > diff --git
> > > > > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > > > txt
> > > > > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > > > txt
> > > > > new file mode 100644
> > > > > index 0000000..436c71c
> > > > > --- /dev/null
> > > > > +++
> > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.
> > > > > +++ txt
> > > > > @@ -0,0 +1,19 @@
> > > > > +* Serial
> > > > > +
> > > > > +Currently defined compatibles:
> > > > > +- ucc_uart
> > > >
> > > > I guess this is in use already and okay. However, looking at the
> > > > driver there really should be SoC specific compatible strings here
> > > > since the driver is looking up the SoC compatible string and
> > > > composing the firmware filename from that.
> > >
> > > Ok, I will changed both driver and this compatible.
> >
> > But don't break existing device trees while doing so.
>
> Do I need to send driver patch in this patchset or a individual patch?
Doesn't matter.
-Scott